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From: "Xu, Quan" <quan.xu@intel.com>
To: "xen-devel@lists.xen.org" <xen-devel@lists.xen.org>,
	Julien Grall <julien.grall@arm.com>,
	Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
	"jbeulich@suse.com" <jbeulich@suse.com>,
	"Tian, Kevin" <kevin.tian@intel.com>
Cc: "dario.faggioli@citrix.com" <dario.faggioli@citrix.com>,
	"Wu, Feng" <feng.wu@intel.com>
Subject: Re: [Patch v11 3/3] vt-d: fix vt-d Device-TLB flush timeout issue (+ crash logic )
Date: Fri, 17 Jun 2016 08:51:50 +0000	[thread overview]
Message-ID: <945CA011AD5F084CBEA3E851C0AB28894B8E6F02@SHSMSX103.ccr.corp.intel.com> (raw)

+ arm/amd maintainers..

On June 01, 2016 5:05 PM, Xu, Quan <quan.xu@intel.com> wrote:
> If Device-TLB flush timed out, we hide the target ATS device immediately and
> crash the domain owning this ATS device. If impacted domain is hardware
> domain, just throw out a warning.
> By hiding the device, we make sure it can't be assigned to any domain any
> longer (see device_assigned).

DomU (other than Dom0) gets crashed when a device IOTLB flush times out. I suppose that's what you will want on ARM/AMD then too.
We need to move up the crash logic , as similar as iommu_map_page() / iommu_unmap_page().

    - add the crash logic to iommu_iotlb_flush() / iommu_iotlb_flush_all().

    - when IOMMU/MMU share page tables, we need to fix it one by one.
        -- on amd, we need to add the crash logic to amd_iommu_flush_pages().
        -- on intel, we need to add the crash logic to iommu_pte_flush().
        -- on arm, we benefit that we add the crash logic to iommu_iotlb_flush().

Taken together, we need to add crash logic to
                         iommu_iotlb_flush() / iommu_iotlb_flush_all() / iommu_pte_flush() / amd_iommu_flush_pages().



Xen-devel mailing list

             reply	other threads:[~2016-06-17  8:51 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-17  8:51 Xu, Quan [this message]
2016-06-17 13:34 ` Julien Grall
2016-06-18  9:54   ` Xu, Quan
2016-06-20  6:53     ` Xu, Quan

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