Re: [PATCH v8 6/6] tools/xen-access: add test-case for ARM SMC

[Tamas K Lengyel <tamas.lengyel@zentific.com>]

On Thu, Jul 7, 2016 at 4:05 AM, Julien Grall <julien.grall@arm.com> wrote:
>
>
> On 05/07/16 19:37, Tamas K Lengyel wrote:
>>
>> +#if defined(__arm__) || defined(__aarch64__)
>> +            case VM_EVENT_REASON_PRIVILEGED_CALL:
>> +                {
>> +                    const struct vm_event_regs_arm *in_regs =
>> &req.data.regs.arm;
>> +                    struct vm_event_regs_arm *out_regs =
>> &rsp.data.regs.arm;
>> +                    bool is32bit = !!(in_regs->cpsr & PSR_MODE_BIT);
>> +                    uint64_t pc;
>> +
>> +                    *out_regs = *in_regs;
>> +
>> +                    if ( is32bit ) {
>
>
> The open-bracket should be on a separate line.
>
>> +                        pc = in_regs->arch.arm32.pc;
>> +                        out_regs->arch.arm32.pc += 4;
>
>
> I suspect you will have to update the CSPR if the SMC instruction is part of
> an IT block (see advance_pc code in arch/arm/traps.c).
>
>> +                    } else {
>
>
> The open-bracket should be on a separate line.
>
>> +                        pc = in_regs->arch.arm64.pc;
>> +                        out_regs->arch.arm64.pc += 8;
>
>
> SMC instruction length is 4 bytes not 8 (see encoding in C6.2.165 in DDI
> 0487A.j).
>
>> +                    }
>> +
>> +                    printf("Privileged call: pc=%016"PRIx64" (vcpu
>> %d)\n",
>> +                           pc, req.vcpu_id);
>> +
>> +                    rsp.flags |= VM_EVENT_FLAG_SET_REGISTERS;
>> +                }
>> +                break;
>> +#endif
>>               default:
>>                   fprintf(stderr, "UNKNOWN REASON CODE %d\n", req.reason);
>>               }
>>
>
> Regards,
>
> --
> Julien Grall

Good points, thanks!

Tamas

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel