From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 24542C6FA8B for ; Mon, 19 Sep 2022 23:31:56 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.409081.651972 (Exim 4.92) (envelope-from ) id 1oaQEn-00047u-GN; Mon, 19 Sep 2022 23:31:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 409081.651972; Mon, 19 Sep 2022 23:31:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1oaQEn-00047n-Dj; Mon, 19 Sep 2022 23:31:41 +0000 Received: by outflank-mailman (input) for mailman id 409081; Mon, 19 Sep 2022 23:31:39 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1oaQEl-00047h-EP for xen-devel@lists.xenproject.org; Mon, 19 Sep 2022 23:31:39 +0000 Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [2607:f8b0:4864:20::102e]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 34b6bc07-3873-11ed-bad8-01ff208a15ba; Tue, 20 Sep 2022 01:31:38 +0200 (CEST) Received: by mail-pj1-x102e.google.com with SMTP id q35-20020a17090a752600b002038d8a68fbso4969217pjk.0 for ; Mon, 19 Sep 2022 16:31:38 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 34b6bc07-3873-11ed-bad8-01ff208a15ba DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date; bh=NSIvRNfXT4BgiWoAffM4RsDVDd2SOkBJz5nw83+ZE0Q=; b=dIO7rKlwpt1a4Rr55TM/1OaCkqXzxn5HQ5hnLXBRwWHTkpqxju5K46xUcpujcqqOhY UT1qtY65c18HaDPPSpvVTvhQ9+fVBIzAfgdO1ePcqTnS8abQ/ssqUdN4PA8+BBbGscY4 zcHOxvhGd/Rw79kJ916G+ztNW9eW1CWpGEOd7bJnYuq86Ev2kMsm0q8+XzwBszG8pjQ2 Pve2h3B9fmVc6VWU3tTQ2teTgIPA46kmE7p9DGMxzzCgzN9yNZgGgirx1IC7zm5IGED/ gjezyCWZTWWjo3xYAtiH58mh8QAjO7bV/tNRRbQG7XhlchTkciQZvl7gHKj0RWl+10FH DxUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date; bh=NSIvRNfXT4BgiWoAffM4RsDVDd2SOkBJz5nw83+ZE0Q=; b=HSIfk0WUtqqhJTUazxxQBl1KTYUsfdAFrOIu7EpsL9lEBB8zypW3bbYYv2cN9EXvp3 phQNQsagibPvJneeEGyEbV/Za/mKJXbvoUX933SbaKZV8lYbiACeg4guJFO3idRNvzFj 5zJDCMRORLVocEo6f3iASPOkCrti6RrmDbgXggkwB+nouLZmgkgoHqkskJYmamiXkhKn z8Enzdf9srlnZ9UwqOh7Tu/cdysH8xFfpCJIpNiCazncT5XKWakF0Het5y8qoMsHskA6 vjIvNdVK3UYgMzNUKg2wBsiMK7Kkxjd1sSXIkEoZ9d8aiEAe1cfRQsBldZ35mvXnOBsL Mlow== X-Gm-Message-State: ACrzQf1MOBMX2oh0VN44pZj7+Edo1VMI0Oo4qr+5tVBQZlVEY+h43RFD pf4wdlZ8BDpL1I2WWqg3Np/cIprUc1GLrAdyXc0= X-Google-Smtp-Source: AMsMyM5CNfH4JqOtjO62MVBjvYF0+2r5Smy7El5C/g8RoLI2QIg17MckqusD++UPU8lggRnlhnNJDkN9NdqBYMgnYv8= X-Received: by 2002:a17:90b:1b50:b0:202:f495:6b43 with SMTP id nv16-20020a17090b1b5000b00202f4956b43mr680878pjb.85.1663630296957; Mon, 19 Sep 2022 16:31:36 -0700 (PDT) MIME-Version: 1.0 References: <20220919231720.163121-1-shentey@gmail.com> <20220919231720.163121-2-shentey@gmail.com> In-Reply-To: <20220919231720.163121-2-shentey@gmail.com> From: Alistair Francis Date: Tue, 20 Sep 2022 09:31:10 +1000 Message-ID: Subject: Re: [PATCH 1/9] hw/riscv/sifive_e: Fix inheritance of SiFiveEState To: Bernhard Beschow Cc: "qemu-devel@nongnu.org Developers" , "Michael S. Tsirkin" , Magnus Damm , Aleksandar Rikalo , Bandan Das , Matthew Rosato , Daniel Henrique Barboza , Sergio Lopez , Alexey Kardashevskiy , Xiaojuan Yang , Cameron Esfahani , Michael Rolnik , Song Gao , Jagannathan Raman , Greg Kurz , Kamil Rytarowski , Peter Xu , Joel Stanley , Alistair Francis , "Dr. David Alan Gilbert" , Paolo Bonzini , haxm-team@intel.com, Roman Bolshakov , Markus Armbruster , Eric Auger , David Gibson , =?UTF-8?Q?Daniel_P=2E_Berrang=C3=A9?= , Christian Borntraeger , =?UTF-8?Q?C=C3=A9dric_Le_Goater?= , Stefan Hajnoczi , Qemu-block , Eduardo Habkost , =?UTF-8?Q?Herv=C3=A9_Poussineau?= , "open list:New World" , Cornelia Huck , Palmer Dabbelt , Helge Deller , Stefano Stabellini , =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= , "open list:RISC-V" , Stafford Horne , Paul Durrant , Havard Skinnemoen , Elena Ufimtseva , Alexander Graf , Thomas Huth , Alex Williamson , Wenchao Wang , Tony Krowiak , Marcel Apfelbaum , qemu-s390x , =?UTF-8?B?TWFyYy1BbmRyw6kgTHVyZWF1?= , Mark Cave-Ayland , Eric Farman , Reinoud Zandijk , Alexander Bulekov , Yanan Wang , "Edgar E. Iglesias" , Gerd Hoffmann , Tyrone Ting , "open list:X86" , Yoshinori Sato , John Snow , Richard Henderson , Darren Kenny , "open list:Overall" , Qiuhao Li , John G Johnson , Bin Meng , Sunil Muthuswamy , Max Filippov , qemu-arm , Marcelo Tosatti , Peter Maydell , Anthony Perard , Andrew Jeffery , Artyom Tarasenko , Halil Pasic , "Maciej S. Szmigiero" , Jason Wang , David Hildenbrand , Laurent Vivier , Alistair Francis , Jason Herne Content-Type: text/plain; charset="UTF-8" On Tue, Sep 20, 2022 at 9:18 AM Bernhard Beschow wrote: > > SiFiveEState inherits from SysBusDevice while it's TypeInfo claims it to > inherit from TYPE_MACHINE. This is an inconsistency which can cause > undefined behavior such as memory corruption. > > Change SiFiveEState to inherit from MachineState since it is registered > as a machine. > > Signed-off-by: Bernhard Beschow Reviewed-by: Alistair Francis Alistair > --- > include/hw/riscv/sifive_e.h | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h > index 83604da805..d738745925 100644 > --- a/include/hw/riscv/sifive_e.h > +++ b/include/hw/riscv/sifive_e.h > @@ -22,6 +22,7 @@ > #include "hw/riscv/riscv_hart.h" > #include "hw/riscv/sifive_cpu.h" > #include "hw/gpio/sifive_gpio.h" > +#include "hw/boards.h" > > #define TYPE_RISCV_E_SOC "riscv.sifive.e.soc" > #define RISCV_E_SOC(obj) \ > @@ -41,7 +42,7 @@ typedef struct SiFiveESoCState { > > typedef struct SiFiveEState { > /*< private >*/ > - SysBusDevice parent_obj; > + MachineState parent_obj; > > /*< public >*/ > SiFiveESoCState soc; > -- > 2.37.3 > >