From: "Tian, Kevin" <kevin.tian@intel.com>
To: "Jan Beulich" <jbeulich@suse.com>,
"Roger Pau Monné" <roger.pau@citrix.com>,
"Gao, Chao" <chao.gao@intel.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
"Cooper, Andrew" <andrew.cooper3@citrix.com>,
George Dunlap <george.dunlap@citrix.com>,
Ian Jackson <iwj@xenproject.org>, Julien Grall <julien@xen.org>,
Stefano Stabellini <sstabellini@kernel.org>, Wei Liu <wl@xen.org>
Subject: RE: [PATCH v2] VT-d: Don't assume register-based invalidation is always supported
Date: Sun, 25 Apr 2021 01:20:07 +0000 [thread overview]
Message-ID: <MWHPR11MB1886B6DDB30B81F106A9A1388C439@MWHPR11MB1886.namprd11.prod.outlook.com> (raw)
In-Reply-To: <9276b757-a340-b0f3-3427-13b7bc5dcb9e@suse.com>
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Wednesday, April 21, 2021 5:23 PM
>
> On 20.04.2021 18:17, Roger Pau Monné wrote:
> > On Tue, Apr 20, 2021 at 05:38:51PM +0200, Jan Beulich wrote:
> >> On 20.04.2021 17:08, Roger Pau Monné wrote:
> >>> On Thu, Apr 02, 2020 at 04:06:06AM +0800, Chao Gao wrote:
> >>>> --- a/xen/drivers/passthrough/vtd/qinval.c
> >>>> +++ b/xen/drivers/passthrough/vtd/qinval.c
> >>>> @@ -442,6 +442,23 @@ int enable_qinval(struct vtd_iommu *iommu)
> >>>> return 0;
> >>>> }
> >>>>
> >>>> +static int vtd_flush_context_noop(struct vtd_iommu *iommu, uint16_t
> did,
> >>>> + uint16_t source_id, uint8_t function_mask,
> >>>> + uint64_t type, bool flush_non_present_entry)
> >>>> +{
> >>>> + dprintk(XENLOG_ERR VTDPREFIX, "IOMMU: Cannot flush
> CONTEXT.\n");
> >>>> + return -EIO;
> >>>> +}
> >>>> +
> >>>> +static int vtd_flush_iotlb_noop(struct vtd_iommu *iommu, uint16_t
> did,
> >>>> + uint64_t addr, unsigned int size_order,
> >>>> + uint64_t type, bool flush_non_present_entry,
> >>>> + bool flush_dev_iotlb)
> >>>> +{
> >>>> + dprintk(XENLOG_ERR VTDPREFIX, "IOMMU: Cannot flush IOTLB.\n");
> >>>> + return -EIO;
> >>>> +}
> >>>
> >>> I think I would add an ASSERT_UNREACHABLE() to both noop handlers
> >>> above, as I would expect trying to use them without the proper mode
> >>> being configured would point to an error elsewhere?
> >>
> >> If such an assertion triggered e.g. during S3 suspend/resume, it may
> >> lead to the box simply not doing anything useful, without there being
> >> any way to know what went wrong. If instead the system at least
> >> managed to resume, the log message could be observed.
> >
> > Oh, OK then. I'm simply worried that people might ignore such one line
> > messages, maybe add a WARN?
>
> Hmm, yes, perhaps - would allow seeing right away where the call
> came from. Chao, I'd again be fine to flip the dprintk()-s to
> WARN()-s while committing. But of course only provided you and
> Kevin (as the maintainer) agree.
>
Looks good.
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
prev parent reply other threads:[~2021-04-25 1:20 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-01 20:06 [PATCH v2] VT-d: Don't assume register-based invalidation is always supported Chao Gao
2021-04-20 11:38 ` Jan Beulich
2021-04-20 12:14 ` Julien Grall
2021-04-20 12:25 ` Jan Beulich
2021-04-20 12:39 ` Julien Grall
2021-04-20 12:50 ` Jan Beulich
2021-04-20 13:00 ` Julien Grall
2021-04-20 12:41 ` Chao Gao
2021-04-20 15:08 ` Roger Pau Monné
2021-04-20 15:38 ` Jan Beulich
2021-04-20 16:17 ` Roger Pau Monné
2021-04-21 9:23 ` Jan Beulich
2021-04-21 11:31 ` Chao Gao
2021-04-25 1:20 ` Tian, Kevin [this message]
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