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Authentication-Results: esa4.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none IronPort-SDR: /gGnsiUzLgUOel4dU4OjzAt6FnV5GIz5kF9b5Vfhn+w8i0TykcZzyzeHJ4Xy8vAln4HPjhlDVU ozGiE8qRKe3fHYWLhncQNoOGdo6y9Ki0cLm2tQxb0ajUdbnhcjZEDUBQhcnwF6vgaPv2HW7YFi OWcuHhjmhva+V7TE9vVi2AtnFo9fzGkUp8uK4447RpPURQ80nc3y2Xgl9KUeE5E43RvI0VyXTS eDqxX6FI01pPW/cEA8ckHfmeZLgMXITZGu3RkAL8DSc5Q6bsWSYdI5aifo8xvwoVLHqdW6WeDL dTY= X-SBRS: None X-MesageID: 31458756 X-Ironport-Server: esa4.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.77,447,1596513600"; d="scan'208";a="31458756" Subject: Re: [PATCH 4/5] x86/PV: restrict TLB flushing after mod_l[234]_entry() To: Jan Beulich , "xen-devel@lists.xenproject.org" CC: Wei Liu , =?UTF-8?Q?Roger_Pau_Monn=c3=a9?= , George Dunlap References: <10a01f61-197b-7df4-192d-917fe135df70@suse.com> From: Andrew Cooper Message-ID: Date: Tue, 3 Nov 2020 11:14:34 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Content-Language: en-GB X-ClientProxiedBy: AMSPEX02CAS01.citrite.net (10.69.22.112) To FTLPEX02CL04.citrite.net (10.13.108.177) On 03/11/2020 10:57, Jan Beulich wrote: > Just like we avoid to invoke remote root pt flushes when all uses of an > L4 table can be accounted for locally, the same can be done for all of > L[234] for the linear pt flush when the table is a "free floating" one, > i.e. it is pinned but not hooked up anywhere. While this situation > doesn't occur very often, it can be observed. > > Since this breaks one of the implications of the XSA-286 fix, drop the > flush_root_pt_local variable again and set ->root_pgt_changed directly, > just like it was before that change. > > Signed-off-by: Jan Beulich > --- > While adjusting the big comment that was added for XSA-286 I wondered > why it talks about the "construction of 32bit PV guests". How are 64-bit > PV guests different in this regard? Because the sole caller is move_l3_below_4G() for 32bit PV guests which don't support folded CR3's. It's not impossible that future changes to PV construction might change this, but it is highly unlikely in practice. ~Andrew