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From: Jan Beulich <jbeulich@suse.com>
To: Igor Druzhinin <igor.druzhinin@citrix.com>,
	xen-devel@lists.xenproject.org
Cc: jun.nakajima@intel.com, kevin.tian@intel.com,
	andrew.cooper3@citrix.com, roger.pau@citrix.com, wl@xen.org
Subject: Re: [PATCH v5 1/2] x86/vtx: add LBR_SELECT to the list of LBR MSRs
Date: Thu, 15 Apr 2021 13:50:23 +0200	[thread overview]
Message-ID: <a5df57ae-1349-7d56-4431-91addcedd91a@suse.com> (raw)
In-Reply-To: <1618481062-16094-1-git-send-email-igor.druzhinin@citrix.com>

On 15.04.2021 12:04, Igor Druzhinin wrote:
> This MSR exists since Nehalem / Silvermont and is actively used by Linux,
> for instance, to improve sampling efficiency.
> 
> Signed-off-by: Igor Druzhinin <igor.druzhinin@citrix.com>

Reviewed-by: Jan Beulich <jbeulich@suse.com>


  parent reply	other threads:[~2021-04-15 11:50 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-15 10:04 Igor Druzhinin
2021-04-15 10:04 ` [PATCH v5 2/2] x86/intel: insert Ice Lake-SP and Ice Lake-D model numbers Igor Druzhinin
2021-04-25  1:07   ` Tian, Kevin
2021-04-15 11:50 ` Jan Beulich [this message]
2021-04-25  1:07 ` [PATCH v5 1/2] x86/vtx: add LBR_SELECT to the list of LBR MSRs Tian, Kevin

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