Re: [PATCH v4 11/17] xen/arm: ITS: Add GICR register emulation

[Stefano Stabellini <stefano.stabellini@eu.citrix.com>]

On Fri, 10 Jul 2015, vijay.kilari@gmail.com wrote:
> From: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
> 
> Emulate LPI related changes to GICR registers
> 
> Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
> ---
> v4: - Added LPI configuration table emulation
>     - Rename function inline with vits
>     - Copied guest lpi configuration table to xen
> ---
>  xen/arch/arm/gic-v3.c             |   15 ++++
>  xen/arch/arm/gic.c                |   10 +++
>  xen/arch/arm/vgic-v3-its.c        |  165 +++++++++++++++++++++++++++++++++++++
>  xen/arch/arm/vgic-v3.c            |   85 +++++++++++++++++--
>  xen/arch/arm/vgic.c               |    4 +
>  xen/include/asm-arm/domain.h      |    1 +
>  xen/include/asm-arm/gic-its.h     |   11 +++
>  xen/include/asm-arm/gic.h         |    9 ++
>  xen/include/asm-arm/gic_v3_defs.h |    3 +
>  9 files changed, 295 insertions(+), 8 deletions(-)
> 
> diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c
> index 904fe57..e6004d2 100644
> --- a/xen/arch/arm/gic-v3.c
> +++ b/xen/arch/arm/gic-v3.c
> @@ -677,6 +677,11 @@ static int __init gicv3_populate_rdist(void)
>      return -ENODEV;
>  }
>  
> +static int gicv3_dist_supports_lpis(void)
> +{
> +    return readl_relaxed(GICD + GICD_TYPER) & GICD_TYPER_LPIS_SUPPORTED;
> +}
>
>  static int __cpuinit gicv3_cpu_init(void)
>  {
>      int i;
> @@ -1293,10 +1298,20 @@ static int __init gicv3_init(void)
>             gicv3.rdist_regions[0].size, gicv3.rdist_regions[0].map_base,
>             gicv3_info.maintenance_irq);
>  
> +    reg = readl_relaxed(GICD + GICD_TYPER);
> +
> +    gicv3.rdist_data.id_bits = ((reg >> 19) & 0x1f) + 1;
> +    gicv3_info.nr_id_bits = gicv3.rdist_data.id_bits;
> +
>      spin_lock_init(&gicv3.lock);
>  
>      spin_lock(&gicv3.lock);
>  
> +    if ( gicv3_dist_supports_lpis() )
> +        gicv3_info.lpi_supported = 1;
> +    else
> +        gicv3_info.lpi_supported = 0;
> +

Is it possible that a GICD returns "LPIs supported", without actually
having an ITS? I don't think we want to support that scenario, right?

To stay on the safe side we could turn this into:

      if ( gicv3_dist_supports_lpis() && its_enabled )

where its_enabled could be set to true at boot time by its_init, if the
initialization is successful.


>      gicv3_dist_init();
>      res = gicv3_cpu_init();
>      gicv3_hyp_init();