From: Stefano Stabellini <sstabellini@kernel.org>
To: Julien Grall <julien.grall@arm.com>
Cc: andre.przywara@arm.com, sstabellini@kernel.org,
steve.capper@arm.com, wei.chen@arm.com, xen-devel@lists.xen.org
Subject: Re: [RFC 03/16] xen/arm: Add macros to handle the MIDR
Date: Mon, 9 May 2016 10:37:43 +0100 (BST) [thread overview]
Message-ID: <alpine.DEB.2.10.1605091035500.2363@sstabellini-ThinkPad-X260> (raw)
In-Reply-To: <1462466065-30212-4-git-send-email-julien.grall@arm.com>
On Thu, 5 May 2016, Julien Grall wrote:
> Add new macros to easily get different parts of the register and to
> check if a given MIDR match a CPU model range. The latter will be really
> useful to handle errata later.
>
> The macros have been imported from the header arch64/include/asm/cputype.h
^ arch/arm64
Aside from this:
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
> in Linux v4.6-rc3
>
> Also remove MIDR_MASK which is unused.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---
> xen/include/asm-arm/processor.h | 35 ++++++++++++++++++++++++++++++++++-
> 1 file changed, 34 insertions(+), 1 deletion(-)
>
> diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
> index 6789cd0..1b701c5 100644
> --- a/xen/include/asm-arm/processor.h
> +++ b/xen/include/asm-arm/processor.h
> @@ -9,7 +9,40 @@
> #include <public/arch-arm.h>
>
> /* MIDR Main ID Register */
> -#define MIDR_MASK 0xff0ffff0
> +#define MIDR_REVISION_MASK 0xf
> +#define MIDR_RESIVION(midr) ((midr) & MIDR_REVISION_MASK)
> +#define MIDR_PARTNUM_SHIFT 4
> +#define MIDR_PARTNUM_MASK (0xfff << MIDR_PARTNUM_SHIFT)
> +#define MIDR_PARTNUM(midr) \
> + (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT)
> +#define MIDR_ARCHITECTURE_SHIFT 16
> +#define MIDR_ARCHITECTURE_MASK (0xf << MIDR_ARCHITECTURE_SHIFT)
> +#define MIDR_ARCHITECTURE(midr) \
> + (((midr) & MIDR_ARCHITECTURE_MASK) >> MIDR_ARCHITECTURE_SHIFT)
> +#define MIDR_VARIANT_SHIFT 20
> +#define MIDR_VARIANT_MASK (0xf << MIDR_VARIANT_SHIFT)
> +#define MIDR_VARIANT(midr) \
> + (((midr) & MIDR_VARIANT_MASK) >> MIDR_VARIANT_SHIFT)
> +#define MIDR_IMPLEMENTOR_SHIFT 24
> +#define MIDR_IMPLEMENTOR_MASK (0xff << MIDR_IMPLEMENTOR_SHIFT)
> +#define MIDR_IMPLEMENTOR(midr) \
> + (((midr) & MIDR_IMPLEMENTOR_MASK) >> MIDR_IMPLEMENTOR_SHIFT)
> +
> +#define MIDR_CPU_MODEL(imp, partnum) \
> + (((imp) << MIDR_IMPLEMENTOR_SHIFT) | \
> + (0xf << MIDR_ARCHITECTURE_SHIFT) | \
> + ((partnum) << MIDR_PARTNUM_SHIFT))
> +
> +#define MIDR_CPU_MODEL_MASK \
> + (MIDR_IMPLEMENTOR_MASK | MIDR_PARTNUM_MASK | MIDR_ARCHITECTURE_MASK)
> +
> +#define MIDR_IS_CPU_MODEL_RANGE(midr, model, rv_min, rv_max) \
> +({ \
> + u32 _model = (midr) & MIDR_CPU_MODEL_MASK; \
> + u32 _rv = (midr) & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); \
> + \
> + _model == (model) && _rv >= (rv_min) && _rv <= (rv_max); \
> +})
>
> /* MPIDR Multiprocessor Affinity Register */
> #define _MPIDR_UP (30)
> --
> 1.9.1
>
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next prev parent reply other threads:[~2016-05-09 9:37 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-05 16:34 [RFC 00/16] xen/arm: Introduce alternative runtime patching for ARM64 Julien Grall
2016-05-05 16:34 ` [RFC 01/16] xen/arm: Makefile: Sort the entries alphabetically Julien Grall
2016-05-09 9:34 ` Stefano Stabellini
2016-05-05 16:34 ` [RFC 02/16] xen/arm: Include the header asm-arm/system.h in asm-arm/page.h Julien Grall
2016-05-09 9:34 ` Stefano Stabellini
2016-05-05 16:34 ` [RFC 03/16] xen/arm: Add macros to handle the MIDR Julien Grall
2016-05-09 9:37 ` Stefano Stabellini [this message]
2016-05-05 16:34 ` [RFC 04/16] xen/arm: arm64: Import flush_icache_range from Linux v4.6-rc3 Julien Grall
2016-05-09 9:40 ` Julien Grall
2016-05-05 16:34 ` [RFC 05/16] xen/arm: Add cpu_hwcap bitmap Julien Grall
2016-05-09 9:53 ` Stefano Stabellini
2016-05-09 10:02 ` Julien Grall
2016-05-05 16:34 ` [RFC 06/16] xen/arm64: Add an helper to invalidate all instruction caches Julien Grall
2016-05-09 9:50 ` Stefano Stabellini
2016-05-05 16:34 ` [RFC 07/16] xen/arm: arm64: Move the define BRK_BUG_FRAME into a separate header Julien Grall
2016-05-09 9:55 ` Stefano Stabellini
2016-05-05 16:34 ` [RFC 08/16] xen/arm: arm64: Reserve a brk immediate to fault on purpose Julien Grall
2016-05-09 9:58 ` Stefano Stabellini
2016-05-05 16:34 ` [RFC 09/16] xen/arm: arm64: Add helpers to decode and encode branch instructions Julien Grall
2016-05-09 10:05 ` Stefano Stabellini
2016-05-09 13:04 ` Julien Grall
2016-05-23 10:52 ` Julien Grall
2016-05-13 20:35 ` Konrad Rzeszutek Wilk
2016-05-14 10:49 ` Julien Grall
2016-05-05 16:34 ` [RFC 10/16] xen/arm: Introduce alternative runtime patching Julien Grall
2016-05-13 20:26 ` Konrad Rzeszutek Wilk
2016-05-14 18:02 ` Julien Grall
2016-05-21 15:09 ` Stefano Stabellini
2016-05-23 11:11 ` Julien Grall
2016-05-30 14:45 ` Stefano Stabellini
2016-05-30 16:42 ` Julien Grall
2016-05-31 9:21 ` Stefano Stabellini
2016-05-31 10:24 ` Julien Grall
2016-06-02 14:46 ` Konrad Rzeszutek Wilk
2016-06-02 15:04 ` Julien Grall
2016-06-02 15:14 ` Julien Grall
2016-06-06 14:17 ` Konrad Rzeszutek Wilk
2016-06-06 14:18 ` Julien Grall
2016-05-05 16:34 ` [RFC 11/16] xen/arm: Detect silicon revision and set cap bits accordingly Julien Grall
2016-05-13 20:37 ` Konrad Rzeszutek Wilk
2016-05-14 18:04 ` Julien Grall
2016-05-16 13:50 ` Konrad Rzeszutek Wilk
2016-05-16 13:54 ` Julien Grall
2016-05-05 16:34 ` [RFC 12/16] xen/arm: Document the errata implemented in Xen Julien Grall
2016-05-05 16:34 ` [RFC 13/16] xen/arm: arm64: Add Cortex-A53 cache errata workaround Julien Grall
2016-05-21 14:40 ` Stefano Stabellini
2016-05-23 13:39 ` Julien Grall
2016-05-05 16:34 ` [RFC 14/16] xen/arm: arm64: Add cortex-A57 erratum 832075 workaround Julien Grall
2016-05-05 16:34 ` [RFC 15/16] xen/arm: traps: Don't inject a fault if the translation VA -> IPA fails Julien Grall
2016-05-21 14:42 ` Stefano Stabellini
2016-05-21 14:51 ` Stefano Stabellini
2016-05-23 13:45 ` Julien Grall
2016-05-05 16:34 ` [RFC 16/16] xen/arm: arm64: Document Cortex-A57 erratum 834220 Julien Grall
2016-05-05 16:38 ` [RFC 00/16] xen/arm: Introduce alternative runtime patching for ARM64 Julien Grall
2016-05-11 2:28 ` Wei Chen
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