From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65E23C64E7A for ; Wed, 2 Dec 2020 00:53:23 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DB5B82076C for ; Wed, 2 Dec 2020 00:53:22 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DB5B82076C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from list by lists.xenproject.org with outflank-mailman.42380.76181 (Exim 4.92) (envelope-from ) id 1kkGOO-0005t4-Ba; Wed, 02 Dec 2020 00:53:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 42380.76181; Wed, 02 Dec 2020 00:53:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1kkGOO-0005sx-8X; Wed, 02 Dec 2020 00:53:12 +0000 Received: by outflank-mailman (input) for mailman id 42380; Wed, 02 Dec 2020 00:53:11 +0000 Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1kkGOM-0005sr-Vi for xen-devel@lists.xenproject.org; Wed, 02 Dec 2020 00:53:11 +0000 Received: from mail.kernel.org (unknown [198.145.29.99]) by us1-rack-iad1.inumbo.com (Halon) with ESMTPS id f26849cc-d071-499e-b574-868124b061c6; Wed, 02 Dec 2020 00:53:10 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: f26849cc-d071-499e-b574-868124b061c6 Date: Tue, 1 Dec 2020 16:53:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1606870389; bh=OmOkv6OlLSNdNNR7uZFMySdRTYxoaJ1PrG4gWM3K9yU=; h=From:To:cc:Subject:In-Reply-To:References:From; b=TUFYlXdbdyn4TqOfEdrBpfaSLAPkw/4p0N7+qZDSDr/nUDvq4EOFpZulc5ZoRcX3c xEb9vdgwaTD+UeoR9Q5KBrm7KtHAWqYfIAl4kssJkW7tDge5oJl8ZvaVVq5mShfjpI vGUf2DfjlqBYLS6pyZZ4p32PKY/6vIp1FbxsT7X0= From: Stefano Stabellini X-X-Sender: sstabellini@sstabellini-ThinkPad-T480s To: Rahul Singh cc: xen-devel@lists.xenproject.org, bertrand.marquis@arm.com, Stefano Stabellini , Julien Grall , Volodymyr Babchuk Subject: Re: [PATCH v2 6/8] xen/arm: Remove support for Stage-1 translation on SMMUv3. In-Reply-To: <29d40e76341983b175250b71e7b7a290895effd0.1606406359.git.rahul.singh@arm.com> Message-ID: References: <29d40e76341983b175250b71e7b7a290895effd0.1606406359.git.rahul.singh@arm.com> User-Agent: Alpine 2.21 (DEB 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Thu, 26 Nov 2020, Rahul Singh wrote: > Linux SMMUv3 driver supports both Stage-1 and Stage-2 translations. > As of now only Stage-2 translation support has been tested. > > Once Stage-1 translation support is tested this patch can be added. > > Signed-off-by: Rahul Singh [...] > @@ -1871,19 +1476,9 @@ static int arm_smmu_domain_finalise(struct iommu_domain *domain, > } > > /* Restrict the stage to what we can actually support */ > - if (!(smmu->features & ARM_SMMU_FEAT_TRANS_S1)) > - smmu_domain->stage = ARM_SMMU_DOMAIN_S2; > - if (!(smmu->features & ARM_SMMU_FEAT_TRANS_S2)) > - smmu_domain->stage = ARM_SMMU_DOMAIN_S1; > + smmu_domain->stage = ARM_SMMU_DOMAIN_S2; It would be good to add an helpful error message if ARM_SMMU_FEAT_TRANS_S2 is missing. > switch (smmu_domain->stage) { > - case ARM_SMMU_DOMAIN_S1: > - ias = (smmu->features & ARM_SMMU_FEAT_VAX) ? 52 : 48; > - ias = min_t(unsigned long, ias, VA_BITS); > - oas = smmu->ias; > - fmt = ARM_64_LPAE_S1; > - finalise_stage_fn = arm_smmu_domain_finalise_s1; > - break; > case ARM_SMMU_DOMAIN_NESTED: > case ARM_SMMU_DOMAIN_S2: > ias = smmu->ias;