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([2601:1c2:4f80:d230::1]) by smtp.gmail.com with ESMTPSA id s3sm12297222pgs.62.2021.05.17.18.43.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 17 May 2021 18:43:55 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 198b57ce-c00f-4e78-9262-3de83e0e873d DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=subject:to:cc:references:from:organization:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=KoUioznIzJM7AjTLN+DNXOBvSstctxmIoCBWsVfkzhE=; b=Fiw9xJCv3W9YngUlDtQpnpx48h47JG8Uhw23whajawJ1Nio9xseZghoMNc0n3ZXHiE bTfSWaTR4bPW3RyLtn9+BV5n26dLAIIfXoluot0RsOYx991hBezY6Xly+eMCJo9n2o4w wHldKOH0rhNq2AI2QmXLdU6wi0AXJxFmLbjth55x1nyRrGbuKYL+c+b3Kunz41bqmjF+ nj7K2aOuo/HCC5rHyeM8IookIceD1lIWMRsJQkiwWpYSlfEywerJAnFHVFWYDYZ1xXFK MOI0v2JC6aqvPw3h5ecqMUtH/JP/H8swv0xtG2vXP+St6otPr7FJufSr85hoIdyOT37r 5img== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:organization :message-id:date:user-agent:mime-version:in-reply-to :content-language:content-transfer-encoding; bh=KoUioznIzJM7AjTLN+DNXOBvSstctxmIoCBWsVfkzhE=; b=cFkiQKbkhaCmvOKx4g68zsVVamq77NeVmBkbFqpJ007pC8q9qvOxDMRT3doFFOEpZE hub1oY7fgTeUN6nQYx+j7zU05qBj55oL+w/EYqwEwVV2/TKLiIeReeU+LN+WD23/cINL u4vzFNyvuZnvzh1Ft4jZeeQ1qWmo+h9LRL7McPp9ddWNNo1Q9Kh9694p4W5tIjMVuziF 6mDqmz7Mfcf1+WR5XKN2wDLV6KmnDe3v58Ob1hwmJqYEnN5amJGow4VzfNIcbz9FTB3m oMjaIvCxC9a9ipcIwFIUEffGvWLa7coUoBZRduVRKn/lgl+K1BfcgyRL3HkustpY5Y97 AYLw== X-Gm-Message-State: AOAM531wJORdOImMtHs+dwhjLiVLld9gG+R7HJRGMLhnyfmFk3hLP3wv awRrlvyivzxZ73A88fQcnyk= X-Google-Smtp-Source: ABdhPJy7aMZWkLq9+eZqwm+r2bt9FSjZ9qeJ/RttoyarJp28gJ2EFqTWvTn7nihKnzBC/o7ZDNFySw== X-Received: by 2002:a17:902:d4c6:b029:ef:80f3:c543 with SMTP id o6-20020a170902d4c6b02900ef80f3c543mr1674170plg.85.1621302235890; Mon, 17 May 2021 18:43:55 -0700 (PDT) Subject: Re: [PATCH v3 4/5] xen: Add files needed for minimal riscv build To: Connor Davis , xen-devel@lists.xenproject.org Cc: Alistair Francis , Andrew Cooper , George Dunlap , Ian Jackson , Jan Beulich , Julien Grall , Stefano Stabellini , Wei Liu References: <97815ecd-7335-9c85-5df8-802ed119d518@gmail.com> From: Bob Eshleman Organization: Vates SAS Message-ID: Date: Mon, 17 May 2021 18:43:53 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.6.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit On 5/14/21 4:47 PM, Connor Davis wrote: > > On 5/14/21 3:53 PM, Bob Eshleman wrote: >> On 5/14/21 11:53 AM, Connor Davis wrote: >> >>> + >>> +#ifdef CONFIG_RISCV_64 >>> + >>> +/* >>> + * RISC-V Layout: >>> + *   0x0000000000000000 - 0x0000003fffffffff (256GB, L2 slots [0-255]) >>> + *     Unmapped >>> + *   0x0000004000000000 - 0xffffffbfffffffff >>> + *     Inaccessible: sv39 only supports 39-bit sign-extended VAs. >>> + *   0xffffffc000000000 - 0xffffffc0001fffff (2MB, L2 slot [256]) >>> + *     Unmapped >>> + *   0xffffffc000200000 - 0xffffffc0003fffff (2MB, L2 slot [256]) >>> + *     Xen text, data, bss >>> + *   0xffffffc000400000 - 0xffffffc0005fffff (2MB, L2 slot [256]) >>> + *     Fixmap: special-purpose 4K mapping slots >>> + *   0xffffffc000600000 - 0xffffffc0009fffff (4MB, L2 slot [256]) >>> + *     Early boot mapping of FDT >>> + *   0xffffffc000a00000 - 0xffffffc000bfffff (2MB, L2 slot [256]) >>> + *     Early relocation address, used when relocating Xen and later >>> + *     for livepatch vmap (if compiled in) >>> + *   0xffffffc040000000 - 0xffffffc07fffffff (1GB, L2 slot [257]) >>> + *     VMAP: ioremap and early_ioremap >>> + *   0xffffffc080000000 - 0xffffffc13fffffff (3GB, L2 slots [258..260]) >>> + *     Unmapped >>> + *   0xffffffc140000000 - 0xffffffc1bfffffff (2GB, L2 slots [261..262]) >>> + *     Frametable: 48 bytes per page for 133GB of RAM >>> + *   0xffffffc1c0000000 - 0xffffffe1bfffffff (128GB, L2 slots [263..390]) >>> + *     1:1 direct mapping of RAM >>> + *   0xffffffe1c0000000 - 0xffffffffffffffff (121GB, L2 slots [391..511]) >>> + *     Unmapped >>> + */ >>> + >> What is the benefit of moving the layout up to 0xffffffc000000000? > > I thought it made the most sense to use the upper half since Xen is privileged > > and privileged code is typically mapped in the upper half, at least on x86. I'm happy to > > move it down if that would be preferred. > > I do like the idea of following norms, but I think I prefer following the ARM norm over the x86 norm unless there is a technical reason not to. Just due to ARM and RISC-V having much more overlap than x86 and RISC-V. In this case, all things being equal, I'd prefer following the ARM model and use the lower half. I definitely like adding the note on the inaccessible region. Thanks, -- Bobby Eshleman SE at Vates SAS