Re: [RFC PATCH v2 7/8] arm/mem_access: Add short-descriptor based gpt

[Julien Grall <julien.grall@arm.com>]

Hi Sergej,

On 06/01/2017 04:18 PM, Sergej Proskurin wrote:
> This commit adds functionality to walk the guest's page tables using the
> short-descriptor translation table format for both ARMv7 and ARMv8. The
> implementation is based on ARM DDI 0487A-g G4-4189 and ARM DDI 0406C-b
> B3-1506.
> 
> Signed-off-by: Sergej Proskurin <proskurin@sec.in.tum.de>
> ---
> Cc: Stefano Stabellini <sstabellini@kernel.org>
> Cc: Julien Grall <julien.grall@arm.com>
> ---
>   xen/arch/arm/p2m.c | 125 ++++++++++++++++++++++++++++++++++++++++++++++++++++-
>   1 file changed, 123 insertions(+), 2 deletions(-)
> 
> diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c
> index ea3be6f050..fa112b873c 100644
> --- a/xen/arch/arm/p2m.c
> +++ b/xen/arch/arm/p2m.c
> @@ -1558,8 +1558,129 @@ static int __p2m_walk_gpt_sd(struct p2m_domain *p2m,
>                                vaddr_t gva, paddr_t *ipa,
>                                unsigned int *perm_ro)
>   {
> -    /* Not implemented yet. */
> -    return -EFAULT;
> +    int disabled = 1;

This should be bool as you use 0/1.

> +    int32_t ttbr;

Likely you want to use uint64_t here.

> +    paddr_t mask;
> +    pte_sd_t pte, *table;
> +    struct page_info *page;
> +    register_t ttbcr = READ_SYSREG(TCR_EL1);
> +    unsigned int level = 0, n = ttbcr & TTBCR_N_MASK;
> +    struct domain *d = p2m->domain;
> +
> +    const paddr_t offsets[2] = {
> +        ((paddr_t)(gva >> 20) & ((1ULL << (12 - n)) - 1)),
> +        ((paddr_t)(gva >> 12) & ((1ULL << 8) - 1))
> +    };
> +
> +    /* TODO: Do the same (31 bit) with LPAE code!! */
> +    mask = ((1ULL << REGISTER_WIDTH_32_BIT) - 1) &
> +           ~((1ULL << (REGISTER_WIDTH_32_BIT - n)) - 1);
> +
> +    if ( n == 0 || !(gva & mask) )
> +    {
> +        /* Use TTBR0 for GVA to IPA translation. */
> +        ttbr = READ_SYSREG64(TTBR0_EL1);
> +
> +        /* If TTBCR.PD0 is set, translations using TTBR0 are disabled. */
> +        disabled = ( ttbcr & TTBCR_PD0 ) ? 1 : 0
disable = ttbcr & TTBCR_PD0;

> +    }
> +    else
> +    {
> +        /* Use TTBR1 for GVA to IPA translation. */
> +        ttbr = READ_SYSREG64(TTBR1_EL1);
> +
> +        /* If TTBCR.PD1 is set, translations using TTBR1 are disabled. */
> +        disabled = ( ttbcr & TTBCR_PD1 ) ? 1 : 0;

Ditto.

> +    }
> +
> +    if ( disabled )
> +        return -EFAULT;
> +
> +    mask = (1ULL << (14 - n)) - 1;

Please explain the 14 here;

> +    page = get_page_from_gfn(d, paddr_to_pfn(ttbr & ~mask), NULL, P2M_ALLOC);
> +    if ( !page )
> +        return -EFAULT;
> +
> +    /*
> +     * XXX: The 2nd level lookup table might comprise 4 concatenated 4K
> +     * pages.  Check how to map concatenated tables at once.
> +     */

You will not be able to map concatenated tables at once because they may 
not be contiguous in guest memory. Though you could use vmap.

But in this case, I would only look for the page used and only mapped 
that one.

> +    table = __map_domain_page(page);
> +
> +    /* Consider offset if n > 2. */
> +    if ( n > 2 )
> +        table = (pte_sd_t *)((unsigned long)table | (unsigned long)(ttbr & mask));
What are you trying to achieve here?

> +
> +    pte = table[offsets[level]];
> +
> +    unmap_domain_page(table);
> +    put_page(page);
> +
> +    switch ( pte.walk.dt ) {

Coding style.

> +    case 0: /* Invalid mapping. */
> +        return -EFAULT;
> +
> +    case 1: /* Large or small page. */

Hmmm, dt == 1 means page table. Not small/large.

> +        level++;
> +
> +        page = get_page_from_gfn(d, (pte.walk.base >> 2), NULL, P2M_ALLOC);
> +        if ( !page )
> +            return -EFAULT;
> +
> +        table = __map_domain_page(page);
> +        table = (pte_sd_t *)((unsigned long)table | ((pte.walk.base & 0x3) << 10));

Same as above. What are you trying to achieve here? Also I am quite 
confuse with the pte.walk.base & 0x3.

> +
> +        pte = table[offsets[level]];
> +
> +        unmap_domain_page(table);
> +        put_page(page);
> +
> +        if ( pte.walk.dt == 0 )

Please avoid hardcode value when possible. When I read 0 here I don't 
know what it means.

> +            break;
> +
> +        if ( pte.walk.dt & 0x2 ) /* Small page. */

Please avoid hardcode value.

> +        {
> +            mask = (1ULL << PAGE_SHIFT_4K) - 1 > +            *ipa = (pte.bits & ~mask) | (gva & mask);

You really don't need to duplicate that line and...

> +        }
> +        else /* Large page. */
> +        {
> +            mask = (1ULL << PAGE_SHIFT_64K) - 1;
> +            *ipa = (pte.bits & ~mask) | (gva & mask);

... and that one.

> +        }
> +
> +        /* Set access permissions[2:0]. */
> +        *perm_ro = (pte.bits & 0x200) >> 9;

No hardcoding value please. And looking at the LPAE version, you are 
only setting one bit there but 2 bits here. How the caller will no what 
to do?

> +
> +        break;
> +
> +    case 2: /* Section. */
> +    case 3: /* Section or Supersection. */

Both 2 and 3 may point to Section or Supersection.

> +        if ( !(pte.bits & (1ULL << 18)) ) /* Section */

Please don't hardcode 18.

> +        {
> +            mask = (1ULL << 20) - 1;

Same here.

> +            *ipa = (pte.bits & ~mask) | (gva & mask);
> +        }
> +        else /* Supersection */
> +        {
> +            mask = (1ULL << 24) - 1;

Same here.

> +            *ipa = (pte.bits & ~mask) | (gva & mask);
> +
> +            mask = ((1ULL << 24) - 1) & ~((1ULL << 20) - 1);

Same here.

> +            *ipa |= (pte.bits & mask) << 32;
> +
> +            mask = ((1ULL << 9) - 1) & ~((1ULL << 5) - 1);

Same here.

> +            *ipa |= (pte.bits & mask) << 36;

I don't understand why you introduce a pte_sd_walk structure in a way 
that you cannot take easily advantage. It would be better to rework it 
for your purpose.

> +        }
> +
> +        /* Set access permission[2]. */
> +        *perm_ro = (pte.bits & 0x8000) >> 15;

No hardcoding value please. And here you set one bit but 2 bits above....

> +    }
> +
> +    if ( pte.walk.dt == 0 )
> +        return -EFAULT;

Don't you already handle it in the switch?

> +
> +    return 0;
>   }
>   
>   /*
> 

Cheers,

-- 
Julien Grall

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