From: Jan Beulich <jbeulich@suse.com>
To: Roger Pau Monne <roger.pau@citrix.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>, Wei Liu <wl@xen.org>,
xen-devel@lists.xenproject.org
Subject: Re: [PATCH] x86/msr: don't inject #GP when trying to read FEATURE_CONTROL
Date: Fri, 27 Nov 2020 11:56:25 +0100 [thread overview]
Message-ID: <c1f686e2-dcc3-233a-c241-edf997d2cef7@suse.com> (raw)
In-Reply-To: <20201127104614.71933-1-roger.pau@citrix.com>
On 27.11.2020 11:46, Roger Pau Monne wrote:
> Windows 10 will triple fault if #GP is injected when attempting to
> read the FEATURE_CONTROL MSR on Intel or compatible hardware. Fix this
> by injecting a #GP only when the vendor doesn't support the MSR, even
> if there are no features to expose.
>
> Fixes: 39ab598c50a2 ('x86/pv: allow reading FEATURE_CONTROL MSR')
> Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
In principle
Acked-by: Jan Beulich <jbeulich@suse.com>
However, iirc it was Andrew who had suggested the conditional you
now replace, so I'd like to wait for him to voice a view.
> --- a/xen/arch/x86/msr.c
> +++ b/xen/arch/x86/msr.c
> @@ -176,7 +176,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
> switch ( msr )
> {
> case MSR_IA32_FEATURE_CONTROL:
> - if ( !cp->basic.vmx && !vmce_has_lmce(v) )
> + if ( !(cp->x86_vendor & (X86_VENDOR_INTEL | X86_VENDOR_CENTAUR)) )
What about Shanghai? init_shanghai() calling init_intel_cacheinfo()
suggests to me it's at least as Intel-like as Centaur/VIA.
Jan
next prev parent reply other threads:[~2020-11-27 10:56 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-27 10:46 [PATCH] x86/msr: don't inject #GP when trying to read FEATURE_CONTROL Roger Pau Monne
2020-11-27 10:56 ` Jan Beulich [this message]
2020-12-29 16:47 ` Roger Pau Monné
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