From: Bertrand Marquis <bertrand.marquis@arm.com>
To: xen-devel@lists.xenproject.org
Cc: Stefano Stabellini <sstabellini@kernel.org>,
Julien Grall <julien@xen.org>,
Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>
Subject: [PATCH 5/7] xen/arm: Add handler for cp15 ID registers
Date: Thu, 26 Nov 2020 15:51:07 +0000 [thread overview]
Message-ID: <d1b01a60e2e0042fe98719c2cd13b7d44e565dfb.1606151462.git.bertrand.marquis@arm.com> (raw)
In-Reply-To: <cover.1606151462.git.bertrand.marquis@arm.com>
In-Reply-To: <cover.1606151462.git.bertrand.marquis@arm.com>
Add support for emulation of cp15 based ID registers (on arm32 or when
running a 32bit guest on arm64).
The handlers are returning the values stored in the guest_cpuinfo
structure.
In the current status the MVFR registers are no supported.
Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>
---
xen/arch/arm/vcpreg.c | 35 +++++++++++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/xen/arch/arm/vcpreg.c b/xen/arch/arm/vcpreg.c
index cdc91cdf5b..d0c6406f34 100644
--- a/xen/arch/arm/vcpreg.c
+++ b/xen/arch/arm/vcpreg.c
@@ -155,6 +155,14 @@ TVM_REG32(CONTEXTIDR, CONTEXTIDR_EL1)
break; \
}
+/* Macro to generate easily case for ID co-processor emulation */
+#define GENERATE_TID3_INFO(reg,field,offset) \
+ case HSR_CPREG32(reg): \
+ { \
+ return handle_ro_read_val(regs, regidx, cp32.read, hsr, \
+ 1, guest_cpuinfo.field.bits[offset]); \
+ }
+
void do_cp15_32(struct cpu_user_regs *regs, const union hsr hsr)
{
const struct hsr_cp32 cp32 = hsr.cp32;
@@ -286,6 +294,33 @@ void do_cp15_32(struct cpu_user_regs *regs, const union hsr hsr)
*/
return handle_raz_wi(regs, regidx, cp32.read, hsr, 1);
+ /*
+ * HCR_EL2.TID3
+ *
+ * This is trapping most Identification registers used by a guest
+ * to identify the processor features
+ */
+ GENERATE_TID3_INFO(ID_PFR0, pfr32, 0)
+ GENERATE_TID3_INFO(ID_PFR1, pfr32, 1)
+ GENERATE_TID3_INFO(ID_PFR2, pfr32, 2)
+ GENERATE_TID3_INFO(ID_DFR0, dbg32, 0)
+ GENERATE_TID3_INFO(ID_DFR1, dbg32, 1)
+ GENERATE_TID3_INFO(ID_AFR0, aux32, 0)
+ GENERATE_TID3_INFO(ID_MMFR0, mm32, 0)
+ GENERATE_TID3_INFO(ID_MMFR1, mm32, 1)
+ GENERATE_TID3_INFO(ID_MMFR2, mm32, 2)
+ GENERATE_TID3_INFO(ID_MMFR3, mm32, 3)
+ GENERATE_TID3_INFO(ID_MMFR4, mm32, 4)
+ GENERATE_TID3_INFO(ID_MMFR5, mm32, 5)
+ GENERATE_TID3_INFO(ID_ISAR0, isa32, 0)
+ GENERATE_TID3_INFO(ID_ISAR1, isa32, 1)
+ GENERATE_TID3_INFO(ID_ISAR2, isa32, 2)
+ GENERATE_TID3_INFO(ID_ISAR3, isa32, 3)
+ GENERATE_TID3_INFO(ID_ISAR4, isa32, 4)
+ GENERATE_TID3_INFO(ID_ISAR5, isa32, 5)
+ GENERATE_TID3_INFO(ID_ISAR6, isa32, 6)
+ /* MVFR registers are in cp10 no cp15 */
+
/*
* HCR_EL2.TIDCP
*
--
2.17.1
next prev parent reply other threads:[~2020-11-26 15:53 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-26 15:51 [PATCH 0/7] xen/arm: Emulate ID registers Bertrand Marquis
2020-11-26 15:51 ` [PATCH 1/7] xen/arm: Add ID registers and complete cpufinfo Bertrand Marquis
2020-11-26 15:51 ` [PATCH 2/7] xen/arm: Add arm64 ID registers definitions Bertrand Marquis
2020-11-26 15:51 ` [PATCH 3/7] xen/arm: create a cpuinfo structure for guest Bertrand Marquis
2020-11-26 15:51 ` [PATCH 4/7] xen/arm: Add handler for ID registers on arm64 Bertrand Marquis
2020-11-26 15:51 ` Bertrand Marquis [this message]
2020-11-26 15:51 ` [PATCH 6/7] xen/arm: Add CP10 exception support to handle VMFR Bertrand Marquis
2020-11-26 15:51 ` [PATCH 7/7] xen/arm: Activate TID3 in HCR_EL2 Bertrand Marquis
2020-11-27 20:07 ` [PATCH 0/7] xen/arm: Emulate ID registers Andrew Cooper
2020-11-30 10:20 ` Bertrand Marquis
2020-11-30 10:36 ` Andrew Cooper
2020-11-30 10:46 ` Bertrand Marquis
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=d1b01a60e2e0042fe98719c2cd13b7d44e565dfb.1606151462.git.bertrand.marquis@arm.com \
--to=bertrand.marquis@arm.com \
--cc=Volodymyr_Babchuk@epam.com \
--cc=julien@xen.org \
--cc=sstabellini@kernel.org \
--cc=xen-devel@lists.xenproject.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).