Re: [PATCH v2 1/2] xen/arm: drivers: scif: Remove dead code

[Julien Grall <julien.grall@arm.com>]

Hello Dirk,

On 22/06/2016 08:18, Dirk Behme wrote:
> The two struct members baud and clock_hz are in the end read only
> variables nowhere used for anything useful. Removing them makes
> the code much simpler without changing any functionality.

While you are dropping those members, should we do the same for 
data_bits, parity and stop_bits?

I would expect them to be configured at the same time as the baudrate by 
the firmware.

Regards,

> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
> ---
>  xen/drivers/char/scif-uart.c    | 24 +-----------------------
>  xen/include/asm-arm/scif-uart.h |  1 -
>  2 files changed, 1 insertion(+), 24 deletions(-)
>
> diff --git a/xen/drivers/char/scif-uart.c b/xen/drivers/char/scif-uart.c
> index 51a2233..bc157fe 100644
> --- a/xen/drivers/char/scif-uart.c
> +++ b/xen/drivers/char/scif-uart.c
> @@ -41,7 +41,7 @@
>  #define scif_writew(uart, off, val)    writew((val), (uart)->regs + (off))
>
>  static struct scif_uart {
> -    unsigned int baud, clock_hz, data_bits, parity, stop_bits;
> +    unsigned int data_bits, parity, stop_bits;
>      unsigned int irq;
>      char __iomem *regs;
>      struct irqaction irqaction;
> @@ -87,7 +87,6 @@ static void scif_uart_interrupt(int irq, void *data, struct cpu_user_regs *regs)
>  static void __init scif_uart_init_preirq(struct serial_port *port)
>  {
>      struct scif_uart *uart = port->uart;
> -    unsigned int divisor;
>      uint16_t val;
>
>      /*
> @@ -142,25 +141,6 @@ static void __init scif_uart_init_preirq(struct serial_port *port)
>      }
>      scif_writew(uart, SCIF_SCSMR, val);
>
> -    ASSERT( uart->clock_hz > 0 );
> -    if ( uart->baud != BAUD_AUTO )
> -    {
> -        /* Setup desired Baud rate */
> -        divisor = uart->clock_hz / (uart->baud << 4);
> -        ASSERT( divisor >= 1 && divisor <= (uint16_t)UINT_MAX );
> -        scif_writew(uart, SCIF_DL, (uint16_t)divisor);
> -        /* Selects the frequency divided clock (SC_CLK external input) */
> -        scif_writew(uart, SCIF_CKS, 0);
> -        udelay(1000000 / uart->baud + 1);
> -    }
> -    else
> -    {
> -        /* Read current Baud rate */
> -        divisor = scif_readw(uart, SCIF_DL);
> -        ASSERT( divisor >= 1 && divisor <= (uint16_t)UINT_MAX );
> -        uart->baud = uart->clock_hz / (divisor << 4);
> -    }
> -
>      /* Setup trigger level for TX/RX FIFOs */
>      scif_writew(uart, SCIF_SCFCR, SCFCR_RTRG11 | SCFCR_TTRG11);
>
> @@ -303,8 +283,6 @@ static int __init scif_uart_init(struct dt_device_node *dev,
>
>      uart = &scif_com;
>
> -    uart->clock_hz  = SCIF_CLK_FREQ;
> -    uart->baud      = BAUD_AUTO;
>      uart->data_bits = 8;
>      uart->parity    = PARITY_NONE;
>      uart->stop_bits = 1;
> diff --git a/xen/include/asm-arm/scif-uart.h b/xen/include/asm-arm/scif-uart.h
> index 7a9f639..d030b26 100644
> --- a/xen/include/asm-arm/scif-uart.h
> +++ b/xen/include/asm-arm/scif-uart.h
> @@ -22,7 +22,6 @@
>  #define __ASM_ARM_SCIF_UART_H
>
>  #define SCIF_FIFO_MAX_SIZE    16
> -#define SCIF_CLK_FREQ         14745600
>
>  /* Register offsets */
>  #define SCIF_SCSMR     (0x00)    /* Serial mode register           */
>

-- 
Julien Grall

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