From: Jan Beulich <jbeulich@suse.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "Juergen Gross" <jgross@suse.com>,
"xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
"Wei Liu" <wl@xen.org>, "Roger Pau Monné" <roger.pau@citrix.com>
Subject: [Xen-devel] Ping: [PATCH] x86/CPUID: RSTR_FP_ERR_PTRS depends on FPU
Date: Tue, 8 Oct 2019 11:32:50 +0200 [thread overview]
Message-ID: <f40f77fc-0f8b-b5bc-e3e0-cf411cddc47d@suse.com> (raw)
In-Reply-To: <052b6003-53a7-0563-72ac-48fe558ac549@suse.com>
On 25.09.2019 17:27, Jan Beulich wrote:
> There's nothing to restore here if there's no FPU in the first place.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> ---
> To be considered for 4.13 since RSTR_FP_ERR_PTRS support was introduced
> just recently.
And already release-acked by Jürgen.
Jan
> --- a/xen/tools/gen-cpuid.py
> +++ b/xen/tools/gen-cpuid.py
> @@ -168,8 +168,9 @@ def crunch_numbers(state):
> deps = {
> # FPU is taken to mean support for the x87 regisers as well as the
> # instructions. MMX is documented to alias the %MM registers over the
> - # x87 %ST registers in hardware.
> - FPU: [MMX],
> + # x87 %ST registers in hardware. Correct restoring of error pointers
> + # of course makes no sense without there being anything to restore.
> + FPU: [MMX, RSTR_FP_ERR_PTRS],
>
> # The PSE36 feature indicates that reserved bits in a PSE superpage
> # may be used as extra physical address bits.
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next prev parent reply other threads:[~2019-10-08 9:33 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-25 15:27 [Xen-devel] [PATCH] x86/CPUID: RSTR_FP_ERR_PTRS depends on FPU Jan Beulich
2019-09-26 15:23 ` Jürgen Groß
2019-12-09 13:06 ` Jan Beulich
2019-12-09 14:00 ` Jürgen Groß
2019-10-08 9:32 ` Jan Beulich [this message]
2019-12-06 18:48 ` [Xen-devel] Ping: " Andrew Cooper
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