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From: Michael Walle <michael@walle.cc>
To: Tudor.Ambarus@microchip.com
Cc: p.yadav@ti.com, miquel.raynal@bootlin.com, richard@nod.at,
	vigneshr@ti.com, linux-mtd@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] mtd: spi-nor: introduce SNOR_ID3()
Date: Tue, 19 Jul 2022 09:07:10 +0200	[thread overview]
Message-ID: <02125e047cfbf347d81811224be3141e@walle.cc> (raw)
In-Reply-To: <160ddac1-6d0a-c922-1380-09e7823a285e@microchip.com>

Am 2022-07-19 07:57, schrieb Tudor.Ambarus@microchip.com:
> On 5/10/22 17:02, Michael Walle wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know 
>> the content is safe
>> 
>> Up until now, flashes were defined by specifying the JEDEC ID, the
>> sector size and the number of sectors. This can be read by parsing the
>> SFDP, we don't have to specify it. Thus provide a new macro SNOR_ID3()
>> which just takes the JEDEC ID and implicitly set .parse_sfdp = true. 
>> All
>> new flashes which have SFDP should use this macro.
> 
> I like the idea, but you need to refine it a bit.
> Your assumptions are true only for flashes that are compliant with SFDP 
> revB or
> later because params->page_size is initialized by querying BFPT DWORD
> 11. I think it would be good to specify this in the comment section.

Sure.

> Also, I think you introduce
> a bug in spi_nor_select_erase() when CONFIG_MTD_SPI_NOR_USE_4K_SECTORS 
> is not
> selected. wanted_size will be zero, will you select an invalid erase 
> type?

You mean to squeeze [1] into this one? If so, sure.

-michael

[1] 
https://lore.kernel.org/linux-mtd/20220716000643.3541839-1-quic_jaehyoo@quicinc.com/

WARNING: multiple messages have this Message-ID (diff)
From: Michael Walle <michael@walle.cc>
To: Tudor.Ambarus@microchip.com
Cc: p.yadav@ti.com, miquel.raynal@bootlin.com, richard@nod.at,
	vigneshr@ti.com, linux-mtd@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] mtd: spi-nor: introduce SNOR_ID3()
Date: Tue, 19 Jul 2022 09:07:10 +0200	[thread overview]
Message-ID: <02125e047cfbf347d81811224be3141e@walle.cc> (raw)
In-Reply-To: <160ddac1-6d0a-c922-1380-09e7823a285e@microchip.com>

Am 2022-07-19 07:57, schrieb Tudor.Ambarus@microchip.com:
> On 5/10/22 17:02, Michael Walle wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know 
>> the content is safe
>> 
>> Up until now, flashes were defined by specifying the JEDEC ID, the
>> sector size and the number of sectors. This can be read by parsing the
>> SFDP, we don't have to specify it. Thus provide a new macro SNOR_ID3()
>> which just takes the JEDEC ID and implicitly set .parse_sfdp = true. 
>> All
>> new flashes which have SFDP should use this macro.
> 
> I like the idea, but you need to refine it a bit.
> Your assumptions are true only for flashes that are compliant with SFDP 
> revB or
> later because params->page_size is initialized by querying BFPT DWORD
> 11. I think it would be good to specify this in the comment section.

Sure.

> Also, I think you introduce
> a bug in spi_nor_select_erase() when CONFIG_MTD_SPI_NOR_USE_4K_SECTORS 
> is not
> selected. wanted_size will be zero, will you select an invalid erase 
> type?

You mean to squeeze [1] into this one? If so, sure.

-michael

[1] 
https://lore.kernel.org/linux-mtd/20220716000643.3541839-1-quic_jaehyoo@quicinc.com/

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  reply	other threads:[~2022-07-19  7:07 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-10 14:02 [PATCH 0/2] introduce SNOR_ID3() Michael Walle
2022-05-10 14:02 ` Michael Walle
2022-05-10 14:02 ` [PATCH 1/2] mtd: spi-nor: " Michael Walle
2022-05-10 14:02   ` Michael Walle
2022-06-05 15:00   ` Tom Fitzhenry
2022-06-05 15:00     ` Tom Fitzhenry
2022-07-12  7:23   ` Pratyush Yadav
2022-07-15 12:19     ` Biju Das
2022-07-15 12:19     ` Biju Das
2022-07-12  7:23     ` Pratyush Yadav
2022-07-19  5:57   ` Tudor.Ambarus
2022-07-19  5:57     ` Tudor.Ambarus
2022-07-19  7:07     ` Michael Walle [this message]
2022-07-19  7:07       ` Michael Walle
2022-07-19  7:33       ` Tudor.Ambarus
2022-07-19  7:33         ` Tudor.Ambarus
2022-07-19  7:57         ` Michael Walle
2022-07-19  7:57           ` Michael Walle
2022-07-19  8:30           ` Tudor.Ambarus
2022-07-19  8:30             ` Tudor.Ambarus
2022-07-28  3:24     ` Tudor.Ambarus
2022-07-28  3:24       ` Tudor.Ambarus
2022-07-28 13:12       ` Michael Walle
2022-07-28 13:12         ` Michael Walle
2022-07-28 13:31         ` Tudor.Ambarus
2022-07-28 13:31           ` Tudor.Ambarus
2022-07-28 13:56           ` Michael Walle
2022-07-28 13:56             ` Michael Walle
2022-05-10 14:02 ` [PATCH 2/2] mtd: spi-nor: winbond: use SNOR_ID3() for w25q512nwm Michael Walle
2022-05-10 14:02   ` Michael Walle
2022-07-12  8:40   ` Tudor.Ambarus
2022-07-12  8:40     ` Tudor.Ambarus
2022-07-18  7:21     ` Michael Walle
2022-07-18  7:21       ` Michael Walle
2022-07-18  7:25     ` Michael Walle
2022-07-18  7:25       ` Michael Walle
2022-07-19  6:00       ` Tudor.Ambarus
2022-07-19  6:00         ` Tudor.Ambarus
2022-07-19  7:02         ` Michael Walle
2022-07-19  7:02           ` Michael Walle
2022-07-19  7:24           ` Tudor.Ambarus
2022-07-19  7:24             ` Tudor.Ambarus
2022-05-10 14:03 ` [PATCH 0/2] mtd: spi-nor: introduce SNOR_ID3() Michael Walle
2022-05-10 14:03   ` Michael Walle

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