From: Rob Herring <robherring2@gmail.com> To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree-discuss@lists.ozlabs.org Cc: Grant Likely <grant.likely@secretlab.ca>, Rob Herring <rob.herring@calxeda.com>, Linus Walleij <linus.ml.walleij@gmail.com> Subject: [PATCH v2] gpio: pl061: enable interrupts with DT style binding Date: Mon, 19 Dec 2011 14:54:38 -0600 [thread overview] Message-ID: <1324328078-7310-1-git-send-email-robherring2@gmail.com> (raw) In-Reply-To: <1323876538-20406-9-git-send-email-robherring2@gmail.com> From: Rob Herring <rob.herring@calxeda.com> Enable DT interrupt binding support for pl061 gpio lines. If the gpio node has an interrupt-controller property, then it will be setup to handle interrupts on gpio lines. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Linus Walleij <linus.ml.walleij@gmail.com> --- v2: - use domain ptr from struct irq_chip_generic - Add comment on irq_base values. .../devicetree/bindings/gpio/pl061-gpio.txt | 15 +++++++++ drivers/gpio/gpio-pl061.c | 31 +++++++++++--------- 2 files changed, 32 insertions(+), 14 deletions(-) diff --git a/Documentation/devicetree/bindings/gpio/pl061-gpio.txt b/Documentation/devicetree/bindings/gpio/pl061-gpio.txt index a2c416b..9671d4e 100644 --- a/Documentation/devicetree/bindings/gpio/pl061-gpio.txt +++ b/Documentation/devicetree/bindings/gpio/pl061-gpio.txt @@ -8,3 +8,18 @@ Required properties: - gpio-controller : Marks the device node as a GPIO controller. - interrupts : Interrupt mapping for GPIO IRQ. +Optional properties: +- interrupt-controller : Identifies the node as an interrupt controller. Must + be present if using gpios lines for interrupts. +- #interrupt-cells : Specifies the number of cells needed to encode an + interrupt source. The type shall be a <u32> and the value shall be 2. + + The 1st cell contains the interrupt number 0-7 corresponding to the gpio + line. + + The 2nd cell is the flags, encoding trigger type and level flags. + 1 = low-to-high edge triggered + 2 = high-to-low edge triggered + 4 = active high level-sensitive + 8 = active low level-sensitive + diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c index 96ff6b2..ea799c7 100644 --- a/drivers/gpio/gpio-pl061.c +++ b/drivers/gpio/gpio-pl061.c @@ -16,6 +16,8 @@ #include <linux/io.h> #include <linux/ioport.h> #include <linux/irq.h> +#include <linux/irqdomain.h> +#include <linux/of.h> #include <linux/bitops.h> #include <linux/workqueue.h> #include <linux/gpio.h> @@ -52,7 +54,6 @@ struct pl061_gpio { spinlock_t lock; /* GPIO registers */ void __iomem *base; - int irq_base; struct irq_chip_generic *irq_gc; struct gpio_chip gc; }; @@ -118,18 +119,16 @@ static void pl061_set_value(struct gpio_chip *gc, unsigned offset, int value) static int pl061_to_irq(struct gpio_chip *gc, unsigned offset) { struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); - - if (chip->irq_base <= 0) - return -EINVAL; - - return chip->irq_base + offset; + if (!chip->irq_gc) + return -ENXIO; + return irq_domain_to_irq(&chip->irq_gc->domain, offset); } static int pl061_irq_type(struct irq_data *d, unsigned trigger) { struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); struct pl061_gpio *chip = gc->private; - int offset = d->irq - chip->irq_base; + int offset = d->hwirq; unsigned long flags; u8 gpiois, gpioibe, gpioiev; @@ -219,7 +218,7 @@ static int pl061_probe(struct amba_device *dev, const struct amba_id *id) struct pl061_platform_data *pdata; struct pl061_gpio *chip; struct list_head *chip_list; - int ret, irq, i; + int ret, irq, i, irq_base; static DECLARE_BITMAP(init_irq, NR_IRQS); chip = kzalloc(sizeof(*chip), GFP_KERNEL); @@ -229,10 +228,13 @@ static int pl061_probe(struct amba_device *dev, const struct amba_id *id) pdata = dev->dev.platform_data; if (pdata) { chip->gc.base = pdata->gpio_base; - chip->irq_base = pdata->irq_base; + irq_base = pdata->irq_base; } else if (dev->dev.of_node) { chip->gc.base = -1; - chip->irq_base = 0; + if (of_get_property(dev->dev.of_node, "interrupt-controller", NULL)) + irq_base = -1; + else + irq_base = 0; } else { ret = -ENODEV; goto free_mem; @@ -268,13 +270,14 @@ static int pl061_probe(struct amba_device *dev, const struct amba_id *id) goto iounmap; /* - * irq_chip support + * irq_chip support. If irq_base is 0, then we don't support interrupts + * on gpio lines and just return now. Otherwise setup the interrupts. */ - - if (chip->irq_base <= 0) + if (!irq_base) return 0; - pl061_init_gc(chip, chip->irq_base); + pl061_init_gc(chip, irq_base); + chip->irq_gc->domain.of_node = of_node_get(dev->dev.of_node); writeb(0, chip->base + GPIOIE); /* disable irqs */ irq = dev->irq[0]; -- 1.7.5.4
WARNING: multiple messages have this Message-ID (diff)
From: robherring2@gmail.com (Rob Herring) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2] gpio: pl061: enable interrupts with DT style binding Date: Mon, 19 Dec 2011 14:54:38 -0600 [thread overview] Message-ID: <1324328078-7310-1-git-send-email-robherring2@gmail.com> (raw) In-Reply-To: <1323876538-20406-9-git-send-email-robherring2@gmail.com> From: Rob Herring <rob.herring@calxeda.com> Enable DT interrupt binding support for pl061 gpio lines. If the gpio node has an interrupt-controller property, then it will be setup to handle interrupts on gpio lines. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Linus Walleij <linus.ml.walleij@gmail.com> --- v2: - use domain ptr from struct irq_chip_generic - Add comment on irq_base values. .../devicetree/bindings/gpio/pl061-gpio.txt | 15 +++++++++ drivers/gpio/gpio-pl061.c | 31 +++++++++++--------- 2 files changed, 32 insertions(+), 14 deletions(-) diff --git a/Documentation/devicetree/bindings/gpio/pl061-gpio.txt b/Documentation/devicetree/bindings/gpio/pl061-gpio.txt index a2c416b..9671d4e 100644 --- a/Documentation/devicetree/bindings/gpio/pl061-gpio.txt +++ b/Documentation/devicetree/bindings/gpio/pl061-gpio.txt @@ -8,3 +8,18 @@ Required properties: - gpio-controller : Marks the device node as a GPIO controller. - interrupts : Interrupt mapping for GPIO IRQ. +Optional properties: +- interrupt-controller : Identifies the node as an interrupt controller. Must + be present if using gpios lines for interrupts. +- #interrupt-cells : Specifies the number of cells needed to encode an + interrupt source. The type shall be a <u32> and the value shall be 2. + + The 1st cell contains the interrupt number 0-7 corresponding to the gpio + line. + + The 2nd cell is the flags, encoding trigger type and level flags. + 1 = low-to-high edge triggered + 2 = high-to-low edge triggered + 4 = active high level-sensitive + 8 = active low level-sensitive + diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c index 96ff6b2..ea799c7 100644 --- a/drivers/gpio/gpio-pl061.c +++ b/drivers/gpio/gpio-pl061.c @@ -16,6 +16,8 @@ #include <linux/io.h> #include <linux/ioport.h> #include <linux/irq.h> +#include <linux/irqdomain.h> +#include <linux/of.h> #include <linux/bitops.h> #include <linux/workqueue.h> #include <linux/gpio.h> @@ -52,7 +54,6 @@ struct pl061_gpio { spinlock_t lock; /* GPIO registers */ void __iomem *base; - int irq_base; struct irq_chip_generic *irq_gc; struct gpio_chip gc; }; @@ -118,18 +119,16 @@ static void pl061_set_value(struct gpio_chip *gc, unsigned offset, int value) static int pl061_to_irq(struct gpio_chip *gc, unsigned offset) { struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); - - if (chip->irq_base <= 0) - return -EINVAL; - - return chip->irq_base + offset; + if (!chip->irq_gc) + return -ENXIO; + return irq_domain_to_irq(&chip->irq_gc->domain, offset); } static int pl061_irq_type(struct irq_data *d, unsigned trigger) { struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); struct pl061_gpio *chip = gc->private; - int offset = d->irq - chip->irq_base; + int offset = d->hwirq; unsigned long flags; u8 gpiois, gpioibe, gpioiev; @@ -219,7 +218,7 @@ static int pl061_probe(struct amba_device *dev, const struct amba_id *id) struct pl061_platform_data *pdata; struct pl061_gpio *chip; struct list_head *chip_list; - int ret, irq, i; + int ret, irq, i, irq_base; static DECLARE_BITMAP(init_irq, NR_IRQS); chip = kzalloc(sizeof(*chip), GFP_KERNEL); @@ -229,10 +228,13 @@ static int pl061_probe(struct amba_device *dev, const struct amba_id *id) pdata = dev->dev.platform_data; if (pdata) { chip->gc.base = pdata->gpio_base; - chip->irq_base = pdata->irq_base; + irq_base = pdata->irq_base; } else if (dev->dev.of_node) { chip->gc.base = -1; - chip->irq_base = 0; + if (of_get_property(dev->dev.of_node, "interrupt-controller", NULL)) + irq_base = -1; + else + irq_base = 0; } else { ret = -ENODEV; goto free_mem; @@ -268,13 +270,14 @@ static int pl061_probe(struct amba_device *dev, const struct amba_id *id) goto iounmap; /* - * irq_chip support + * irq_chip support. If irq_base is 0, then we don't support interrupts + * on gpio lines and just return now. Otherwise setup the interrupts. */ - - if (chip->irq_base <= 0) + if (!irq_base) return 0; - pl061_init_gc(chip, chip->irq_base); + pl061_init_gc(chip, irq_base); + chip->irq_gc->domain.of_node = of_node_get(dev->dev.of_node); writeb(0, chip->base + GPIOIE); /* disable irqs */ irq = dev->irq[0]; -- 1.7.5.4
next prev parent reply other threads:[~2011-12-19 20:54 UTC|newest] Thread overview: 115+ messages / expand[flat|nested] mbox.gz Atom feed top 2011-12-14 15:28 [PATCH 0/9] irq domain for gen irq chip and pl061 DT irq support Rob Herring 2011-12-14 15:28 ` Rob Herring 2011-12-14 15:28 ` Rob Herring 2011-12-14 15:28 ` [PATCH 1/9] dt: add empty of_get_node/of_put_node functions Rob Herring 2011-12-14 15:28 ` Rob Herring 2011-12-14 15:28 ` Rob Herring 2011-12-14 16:02 ` Grant Likely 2011-12-14 16:02 ` Grant Likely 2011-12-14 15:28 ` [PATCH 2/9] irq: check domain hwirq range for DT translate Rob Herring 2011-12-14 15:28 ` Rob Herring 2011-12-14 15:28 ` Rob Herring 2011-12-14 16:08 ` Grant Likely 2011-12-14 16:08 ` Grant Likely 2011-12-15 5:23 ` Shawn Guo 2011-12-15 5:23 ` Shawn Guo 2011-12-15 5:23 ` Shawn Guo 2011-12-19 12:41 ` Cousson, Benoit 2011-12-19 12:41 ` Cousson, Benoit 2011-12-19 12:41 ` Cousson, Benoit 2011-12-19 14:23 ` Rob Herring 2011-12-19 14:23 ` Rob Herring 2011-12-19 15:21 ` Cousson, Benoit 2011-12-19 15:21 ` Cousson, Benoit 2011-12-19 15:21 ` Cousson, Benoit 2011-12-14 15:28 ` [PATCH 3/9] irq: convert generic-chip to use irq_domain Rob Herring 2011-12-14 15:28 ` Rob Herring 2011-12-14 15:28 ` Rob Herring 2011-12-14 21:14 ` Grant Likely 2011-12-14 21:14 ` Grant Likely 2011-12-14 21:23 ` Rob Herring 2011-12-14 21:23 ` Rob Herring 2011-12-14 21:26 ` Grant Likely 2011-12-14 21:26 ` Grant Likely 2011-12-14 21:26 ` Grant Likely 2011-12-14 23:29 ` Rob Herring 2011-12-14 23:29 ` Rob Herring 2011-12-15 5:25 ` Shawn Guo 2011-12-15 5:25 ` Shawn Guo 2011-12-15 5:25 ` Shawn Guo 2011-12-15 5:55 ` Shawn Guo 2011-12-15 5:55 ` Shawn Guo 2011-12-15 5:55 ` Shawn Guo 2011-12-15 13:39 ` Rob Herring 2011-12-15 13:39 ` Rob Herring 2011-12-15 13:56 ` Rob Herring 2011-12-15 13:56 ` Rob Herring 2011-12-15 13:56 ` Rob Herring 2011-12-15 14:15 ` Shawn Guo 2011-12-15 14:15 ` Shawn Guo 2011-12-15 14:15 ` Shawn Guo 2011-12-15 14:46 ` Shawn Guo 2011-12-15 14:46 ` Shawn Guo 2011-12-15 14:46 ` Shawn Guo 2011-12-15 15:55 ` Grant Likely 2011-12-15 15:55 ` Grant Likely 2011-12-15 15:55 ` Grant Likely 2011-12-15 16:17 ` Rob Herring 2011-12-15 16:17 ` Rob Herring 2011-12-15 16:39 ` Grant Likely 2011-12-15 16:39 ` Grant Likely 2011-12-15 16:39 ` Grant Likely 2011-12-15 14:08 ` Shawn Guo 2011-12-15 14:08 ` Shawn Guo 2011-12-15 14:08 ` Shawn Guo 2011-12-15 14:01 ` Rob Herring 2011-12-15 14:01 ` Rob Herring 2011-12-15 14:01 ` Rob Herring 2011-12-14 15:28 ` [PATCH 4/9] gpio: pl061: use chained_irq_* functions in irq handler Rob Herring 2011-12-14 15:28 ` Rob Herring 2011-12-14 15:28 ` Rob Herring 2011-12-14 21:15 ` Grant Likely 2011-12-14 21:15 ` Grant Likely 2011-12-14 15:28 ` [PATCH 5/9] gpio: pl061: convert to use 0 for no irq Rob Herring 2011-12-14 15:28 ` Rob Herring 2011-12-14 15:28 ` Rob Herring 2011-12-14 21:16 ` Grant Likely 2011-12-14 21:16 ` Grant Likely 2011-12-14 15:28 ` [PATCH 6/9] ARM: realview: convert pl061 no irq to 0 instead of -1 Rob Herring 2011-12-14 15:28 ` Rob Herring 2011-12-14 15:28 ` Rob Herring 2011-12-14 21:16 ` Grant Likely 2011-12-14 21:16 ` Grant Likely 2011-12-14 15:28 ` [PATCH 7/9] gpio: pl061: convert to use generic irq chip Rob Herring 2011-12-14 15:28 ` Rob Herring 2011-12-14 15:28 ` Rob Herring 2011-12-14 21:17 ` Grant Likely 2011-12-14 21:17 ` Grant Likely 2011-12-19 20:52 ` [PATCH v2] " Rob Herring 2011-12-19 20:52 ` Rob Herring 2011-12-24 23:26 ` Linus Walleij 2011-12-24 23:26 ` Linus Walleij 2011-12-24 23:26 ` Linus Walleij 2012-01-02 8:54 ` Grant Likely 2012-01-02 8:54 ` Grant Likely 2012-01-02 8:54 ` Grant Likely 2012-01-02 16:54 ` Rob Herring 2012-01-02 16:54 ` Rob Herring 2012-01-02 16:54 ` Rob Herring 2011-12-14 15:28 ` [PATCH 8/9] gpio: pl061: enable interrupts with DT style binding Rob Herring 2011-12-14 15:28 ` Rob Herring 2011-12-14 15:28 ` Rob Herring 2011-12-14 21:39 ` Grant Likely 2011-12-14 21:39 ` Grant Likely 2011-12-14 21:39 ` Grant Likely 2011-12-19 20:54 ` Rob Herring [this message] 2011-12-19 20:54 ` [PATCH v2] " Rob Herring 2011-12-14 15:28 ` [PATCH 9/9] ARM: highbank: add interrupt properties to gpio nodes Rob Herring 2011-12-14 15:28 ` Rob Herring 2011-12-14 15:28 ` Rob Herring 2011-12-14 21:39 ` Grant Likely 2011-12-14 21:39 ` Grant Likely 2011-12-14 21:39 ` Grant Likely 2011-12-14 15:41 ` [PATCH 0/9] irq domain for gen irq chip and pl061 DT irq support Rob Herring 2011-12-14 15:41 ` Rob Herring 2011-12-14 15:41 ` Rob Herring
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