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From: Boris BREZILLON <boris.brezillon@free-electrons.com>
To: Thierry Reding <thierry.reding@gmail.com>,
	Nicolas Ferre <nicolas.ferre@atmel.com>,
	David Airlie <airlied@linux.ie>,
	Samuel Ortiz <sameo@linux.intel.com>,
	Lee Jones <lee.jones@linaro.org>
Cc: Jean-Jacques Hiblot <jjhiblot@traphandler.com>,
	Alexandre Belloni <alexandre.belloni@free-electrons.com>,
	Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>,
	Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
	devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	dri-devel@lists.freedesktop.org,
	Boris BREZILLON <boris.brezillon@free-electrons.com>
Subject: [PATCH v2 5/7] ARM: at91/dt: define the HLCDC node available on sama5d3 SoCs
Date: Mon,  9 Jun 2014 18:04:18 +0200	[thread overview]
Message-ID: <1402329860-27520-6-git-send-email-boris.brezillon@free-electrons.com> (raw)
In-Reply-To: <1402329860-27520-1-git-send-email-boris.brezillon@free-electrons.com>

Define the HLCDC (High LCD Controller) IP available on some sama5d3 SoCs
(i.e. sama5d31, sama5d33, sama5d34 and sama5d36).

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
---
 arch/arm/boot/dts/sama5d3_lcd.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d3_lcd.dtsi b/arch/arm/boot/dts/sama5d3_lcd.dtsi
index 2186b89..02a7012 100644
--- a/arch/arm/boot/dts/sama5d3_lcd.dtsi
+++ b/arch/arm/boot/dts/sama5d3_lcd.dtsi
@@ -116,6 +116,32 @@
 				};
 			};
 
+			hlcdc: hlcdc@f0030000 {
+				compatible = "atmel,sama5d3-hlcdc";
+				reg = <0xf0030000 0x2000>;
+				clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
+				clock-names = "periph_clk","sys_clk", "slow_clk";
+				status = "disabled";
+
+				hlcdc-display-controller {
+					compatible = "atmel,hlcdc-dc";
+					interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
+					pinctrl-names = "default", "rgb-444", "rgb-565", "rgb-666", "rgb-888";
+					pinctrl-0 = <&pinctrl_lcd_base>;
+					pinctrl-1 = <&pinctrl_lcd_base &pinctrl_lcd_rgb444>;
+					pinctrl-2 = <&pinctrl_lcd_base &pinctrl_lcd_rgb565>;
+					pinctrl-3 = <&pinctrl_lcd_base &pinctrl_lcd_rgb666>;
+					pinctrl-4 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
+				};
+
+				hlcdc_pwm: hlcdc-pwm {
+					compatible = "atmel,hlcdc-pwm";
+					pinctrl-names = "default";
+					pinctrl-0 = <&pinctrl_lcd_pwm>;
+					#pwm-cells = <3>;
+				};
+			};
+
 			pmc: pmc@fffffc00 {
 				periphck {
 					lcdc_clk: lcdc_clk {
-- 
1.8.3.2


WARNING: multiple messages have this Message-ID (diff)
From: Boris BREZILLON <boris.brezillon@free-electrons.com>
To: Thierry Reding <thierry.reding@gmail.com>,
	Nicolas Ferre <nicolas.ferre@atmel.com>,
	David Airlie <airlied@linux.ie>,
	Samuel Ortiz <sameo@linux.intel.com>,
	Lee Jones <lee.jones@linaro.org>
Cc: devicetree@vger.kernel.org,
	Jean-Jacques Hiblot <jjhiblot@traphandler.com>,
	linux-doc@vger.kernel.org,
	Boris BREZILLON <boris.brezillon@free-electrons.com>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	linux-pwm@vger.kernel.org,
	Alexandre Belloni <alexandre.belloni@free-electrons.com>,
	Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
	Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 5/7] ARM: at91/dt: define the HLCDC node available on sama5d3 SoCs
Date: Mon,  9 Jun 2014 18:04:18 +0200	[thread overview]
Message-ID: <1402329860-27520-6-git-send-email-boris.brezillon@free-electrons.com> (raw)
In-Reply-To: <1402329860-27520-1-git-send-email-boris.brezillon@free-electrons.com>

Define the HLCDC (High LCD Controller) IP available on some sama5d3 SoCs
(i.e. sama5d31, sama5d33, sama5d34 and sama5d36).

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
---
 arch/arm/boot/dts/sama5d3_lcd.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d3_lcd.dtsi b/arch/arm/boot/dts/sama5d3_lcd.dtsi
index 2186b89..02a7012 100644
--- a/arch/arm/boot/dts/sama5d3_lcd.dtsi
+++ b/arch/arm/boot/dts/sama5d3_lcd.dtsi
@@ -116,6 +116,32 @@
 				};
 			};
 
+			hlcdc: hlcdc@f0030000 {
+				compatible = "atmel,sama5d3-hlcdc";
+				reg = <0xf0030000 0x2000>;
+				clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
+				clock-names = "periph_clk","sys_clk", "slow_clk";
+				status = "disabled";
+
+				hlcdc-display-controller {
+					compatible = "atmel,hlcdc-dc";
+					interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
+					pinctrl-names = "default", "rgb-444", "rgb-565", "rgb-666", "rgb-888";
+					pinctrl-0 = <&pinctrl_lcd_base>;
+					pinctrl-1 = <&pinctrl_lcd_base &pinctrl_lcd_rgb444>;
+					pinctrl-2 = <&pinctrl_lcd_base &pinctrl_lcd_rgb565>;
+					pinctrl-3 = <&pinctrl_lcd_base &pinctrl_lcd_rgb666>;
+					pinctrl-4 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
+				};
+
+				hlcdc_pwm: hlcdc-pwm {
+					compatible = "atmel,hlcdc-pwm";
+					pinctrl-names = "default";
+					pinctrl-0 = <&pinctrl_lcd_pwm>;
+					#pwm-cells = <3>;
+				};
+			};
+
 			pmc: pmc@fffffc00 {
 				periphck {
 					lcdc_clk: lcdc_clk {
-- 
1.8.3.2

WARNING: multiple messages have this Message-ID (diff)
From: boris.brezillon@free-electrons.com (Boris BREZILLON)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 5/7] ARM: at91/dt: define the HLCDC node available on sama5d3 SoCs
Date: Mon,  9 Jun 2014 18:04:18 +0200	[thread overview]
Message-ID: <1402329860-27520-6-git-send-email-boris.brezillon@free-electrons.com> (raw)
In-Reply-To: <1402329860-27520-1-git-send-email-boris.brezillon@free-electrons.com>

Define the HLCDC (High LCD Controller) IP available on some sama5d3 SoCs
(i.e. sama5d31, sama5d33, sama5d34 and sama5d36).

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
---
 arch/arm/boot/dts/sama5d3_lcd.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d3_lcd.dtsi b/arch/arm/boot/dts/sama5d3_lcd.dtsi
index 2186b89..02a7012 100644
--- a/arch/arm/boot/dts/sama5d3_lcd.dtsi
+++ b/arch/arm/boot/dts/sama5d3_lcd.dtsi
@@ -116,6 +116,32 @@
 				};
 			};
 
+			hlcdc: hlcdc at f0030000 {
+				compatible = "atmel,sama5d3-hlcdc";
+				reg = <0xf0030000 0x2000>;
+				clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
+				clock-names = "periph_clk","sys_clk", "slow_clk";
+				status = "disabled";
+
+				hlcdc-display-controller {
+					compatible = "atmel,hlcdc-dc";
+					interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
+					pinctrl-names = "default", "rgb-444", "rgb-565", "rgb-666", "rgb-888";
+					pinctrl-0 = <&pinctrl_lcd_base>;
+					pinctrl-1 = <&pinctrl_lcd_base &pinctrl_lcd_rgb444>;
+					pinctrl-2 = <&pinctrl_lcd_base &pinctrl_lcd_rgb565>;
+					pinctrl-3 = <&pinctrl_lcd_base &pinctrl_lcd_rgb666>;
+					pinctrl-4 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
+				};
+
+				hlcdc_pwm: hlcdc-pwm {
+					compatible = "atmel,hlcdc-pwm";
+					pinctrl-names = "default";
+					pinctrl-0 = <&pinctrl_lcd_pwm>;
+					#pwm-cells = <3>;
+				};
+			};
+
 			pmc: pmc at fffffc00 {
 				periphck {
 					lcdc_clk: lcdc_clk {
-- 
1.8.3.2

  parent reply	other threads:[~2014-06-09 16:09 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-09 16:04 [PATCH v2 0/7] drm: add support for Atmel HLCDC Display Controller Boris BREZILLON
2014-06-09 16:04 ` Boris BREZILLON
2014-06-09 16:04 ` [PATCH v2 1/7] mfd: add atmel-hlcdc driver Boris BREZILLON
2014-06-09 16:04   ` Boris BREZILLON
2014-06-15  8:53   ` Jean-Jacques Hiblot
2014-06-15  8:53     ` Jean-Jacques Hiblot
2014-06-15 14:48     ` Boris BREZILLON
2014-06-15 14:48       ` Boris BREZILLON
2014-06-16  7:46       ` Jean-Jacques Hiblot
2014-06-16  7:46         ` Jean-Jacques Hiblot
2014-06-16  7:46         ` Jean-Jacques Hiblot
2014-06-16 12:50   ` Lee Jones
2014-06-16 12:50     ` Lee Jones
2014-06-16 13:23     ` Boris BREZILLON
2014-06-16 13:23       ` Boris BREZILLON
2014-06-16 13:23       ` Boris BREZILLON
2014-06-16 17:03       ` Lee Jones
2014-06-16 17:03         ` Lee Jones
2014-06-16 17:03         ` Lee Jones
2014-06-16 17:09         ` Boris BREZILLON
2014-06-16 17:09           ` Boris BREZILLON
2014-06-09 16:04 ` [PATCH v2 2/7] pwm: add support for atmel-hlcdc-pwm device Boris BREZILLON
2014-06-09 16:04   ` Boris BREZILLON
2014-06-13 11:43   ` Alexandre Belloni
2014-06-13 11:43     ` Alexandre Belloni
2014-06-13 12:17     ` Boris BREZILLON
2014-06-13 12:17       ` Boris BREZILLON
2014-06-15  9:11   ` Jean-Jacques Hiblot
2014-06-15  9:11     ` Jean-Jacques Hiblot
2014-06-15 14:55     ` Boris BREZILLON
2014-06-15 14:55       ` Boris BREZILLON
2014-07-04 13:31     ` Boris BREZILLON
2014-07-04 13:31       ` Boris BREZILLON
2014-06-09 16:04 ` [PATCH v2 3/7] drm: add Atmel HLCDC Display Controller support Boris BREZILLON
2014-06-09 16:04   ` Boris BREZILLON
2014-06-09 16:04   ` Boris BREZILLON
2014-06-15  9:32   ` Jean-Jacques Hiblot
2014-06-15 15:00     ` Boris BREZILLON
2014-06-15 15:00       ` Boris BREZILLON
2014-06-17  9:06   ` Boris BREZILLON
2014-07-03 13:34   ` Boris BREZILLON
2014-06-09 16:04 ` [PATCH v2 4/7] ARM: at91/dt: split sama5d3 lcd pin definitions to match RGB mode configs Boris BREZILLON
2014-06-09 16:04   ` Boris BREZILLON
2014-06-09 16:04   ` Boris BREZILLON
2014-06-19  7:07   ` Bo Shen
2014-06-19  7:07     ` Bo Shen
2014-06-19  7:07     ` Bo Shen
2014-06-19  7:40     ` Boris BREZILLON
2014-06-19  7:40       ` Boris BREZILLON
2014-06-19 11:42     ` Boris BREZILLON
2014-06-19 11:42       ` Boris BREZILLON
2014-06-09 16:04 ` Boris BREZILLON [this message]
2014-06-09 16:04   ` [PATCH v2 5/7] ARM: at91/dt: define the HLCDC node available on sama5d3 SoCs Boris BREZILLON
2014-06-09 16:04   ` Boris BREZILLON
2014-06-09 16:04 ` [PATCH v2 6/7] ARM: at91/dt: add LCD panel description to sama5d3xdm.dtsi Boris BREZILLON
2014-06-09 16:04   ` Boris BREZILLON
2014-06-09 16:04   ` Boris BREZILLON
2014-06-09 16:04 ` [PATCH v2 7/7] ARM: at91/dt: enable the LCD panel on sama5d3xek boards Boris BREZILLON
2014-06-09 16:04   ` Boris BREZILLON
2014-06-09 16:04   ` Boris BREZILLON
2014-06-19  7:12   ` Bo Shen
2014-06-19  7:12     ` Bo Shen
2014-06-19  7:12     ` Bo Shen
2014-06-19  7:54     ` Boris BREZILLON
2014-06-19  7:54       ` Boris BREZILLON

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