* [PATCHv3 00/34] ARM: at91: Switch remaining SoCs and boards to CCF
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni,
Gregory Hermant, Joachim Eastwood, Fabio Porcedda,
Tim Schendekehl, Gael Portay, Rodolfo Giometti
This patch set adds support for the common clock framwork to the remaining atml
SoCs: at91rm9200, at91sam9260, at91sam9263, at91sam9g45.
It also defines the necessary main crystal and slow crystal frequencies.
I couldn't find datasheets for the following boards:
- mpa1600
- animeo_ip
For those, I assumed the 32kHz crystal is present on the board as this is the
most common implementation (only one board doesn't have it). Please correct me
if this is wrong.
I could not test at91rm9200 as I don't own any board with that chip.
Changes in v3:
- add ddrck in ramc for sam9g45
- move slow_xtal from ge863-pro3.dtsi to the board dts
Changes in v2:
- Drop patch 3 that has been taken in the clock tree
- rename tcb*_clk in tc*_clk for rm9200 an sam9260
- rename tc0_clk in tcb_clk for sam9263
Cc: Gregory Hermant <gregory.hermant@calao-systems.com>
Cc: Joachim Eastwood <manabian@gmail.com>
Cc: Fabio Porcedda <fabio.porcedda@gmail.com>
Cc: Tim Schendekehl <tim.schendekehl@egnite.de>
Cc: Gael Portay <g.portay@overkiz.com>
Cc: Rodolfo Giometti <giometti@linux.it>
Alexandre Belloni (34):
Documentation: dt: document all the atmel pmc compatibles
ARM: at91/dt: ariag25: define crystals frequencies
ARM: at91: prepare common clk transition for rm9200
ARM: at91/dt: rm9200: define clocks
ARM: at91: move at91rm9200 SoC to the CCF
ARM: at91/dt: at91rm9200ek: define crystals frequencies
ARM: at91: prepare common clk transition for sam9260
ARM: at91/dt: sam9260: define clocks
ARM: at91/dt: sam9g20: define clocks
ARM: at91: move at91sam9260 SoCs to the CCF
ARM: at91/dt: at91sam9g20ek: define crystals frequencies
ARM: at91/dt: foxg20: define crystals frequencies
ARM: at91/dt: usb_a9260: define crystals frequencies
ARM: at91/dt: tny_a9260: define crystals frequencies
ARM: at91/dt: qil_a9260: define crystals frequencies
ARM: at91/dt: mpa1600: define crytals frequencies
ARM: at91/dt: ge863-pro3: define main crystal frequency
ARM: at91/dt: aks-cdu: define slow crytal frequency
ARM: at91/dt: evk-pro3: define slow crytal frequency
ARM: at91/dt: ethernut5: define crystals frequencies
ARM: at91/dt: animeo_ip: define crystals frequencies
ARM: at91/dt: kizbox: define main crystal frequency
ARM: at91: prepare common clk transition for sam9g45
ARM: at91/dt: sam9g45: define clocks
ARM: at91: move at91sam9g45 SoC to the CCF
ARM: at91/dt: sam9m10g45ek: define crystals frequencies
ARM: at91/dt: pm9g45: crystals frequencies
ARM: at91/dt: cosino define crystals frequencies
ARM: at91: prepare common clk transition for sam9263
ARM: at91/dt: sam9263: define clocks
ARM: at91: move at91sam9263 SoC to the CCF
ARM: at91/dt: sam9263ek: define crystals frequencies
ARM: at91/dt: tny_a9263: define crystals frequencies
ARM: at91/dt: usb_a9263: define crystals frequencies
.../devicetree/bindings/arm/atmel-pmc.txt | 5 +-
arch/arm/boot/dts/aks-cdu.dts | 6 +
arch/arm/boot/dts/animeo_ip.dts | 8 +
arch/arm/boot/dts/at91-ariag25.dts | 8 +
arch/arm/boot/dts/at91-cosino.dtsi | 8 +
arch/arm/boot/dts/at91-foxg20.dts | 8 +
arch/arm/boot/dts/at91-qil_a9260.dts | 8 +
arch/arm/boot/dts/at91rm9200.dtsi | 304 ++++++++++++++++++
arch/arm/boot/dts/at91rm9200ek.dts | 8 +
arch/arm/boot/dts/at91sam9260.dtsi | 314 ++++++++++++++++++-
arch/arm/boot/dts/at91sam9263.dtsi | 311 +++++++++++++++++++
arch/arm/boot/dts/at91sam9263ek.dts | 8 +
arch/arm/boot/dts/at91sam9g20.dtsi | 24 ++
arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 8 +
arch/arm/boot/dts/at91sam9g45.dtsi | 342 ++++++++++++++++++++-
arch/arm/boot/dts/at91sam9m10g45ek.dts | 8 +
arch/arm/boot/dts/ethernut5.dts | 10 +
arch/arm/boot/dts/evk-pro3.dts | 6 +
arch/arm/boot/dts/ge863-pro3.dtsi | 4 +
arch/arm/boot/dts/kizbox.dts | 4 +
arch/arm/boot/dts/mpa1600.dts | 8 +
arch/arm/boot/dts/pm9g45.dts | 8 +
arch/arm/boot/dts/tny_a9260_common.dtsi | 8 +
arch/arm/boot/dts/tny_a9263.dts | 8 +
arch/arm/boot/dts/usb_a9260_common.dtsi | 8 +
arch/arm/boot/dts/usb_a9263.dts | 8 +
arch/arm/mach-at91/Kconfig | 4 -
arch/arm/mach-at91/at91rm9200.c | 6 +-
arch/arm/mach-at91/at91sam9260.c | 6 +-
arch/arm/mach-at91/at91sam9263.c | 6 +-
arch/arm/mach-at91/at91sam9g45.c | 6 +-
31 files changed, 1467 insertions(+), 11 deletions(-)
--
1.9.1
^ permalink raw reply [flat|nested] 70+ messages in thread
* [PATCHv3 00/34] ARM: at91: Switch remaining SoCs and boards to CCF
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
This patch set adds support for the common clock framwork to the remaining atml
SoCs: at91rm9200, at91sam9260, at91sam9263, at91sam9g45.
It also defines the necessary main crystal and slow crystal frequencies.
I couldn't find datasheets for the following boards:
- mpa1600
- animeo_ip
For those, I assumed the 32kHz crystal is present on the board as this is the
most common implementation (only one board doesn't have it). Please correct me
if this is wrong.
I could not test at91rm9200 as I don't own any board with that chip.
Changes in v3:
- add ddrck in ramc for sam9g45
- move slow_xtal from ge863-pro3.dtsi to the board dts
Changes in v2:
- Drop patch 3 that has been taken in the clock tree
- rename tcb*_clk in tc*_clk for rm9200 an sam9260
- rename tc0_clk in tcb_clk for sam9263
Cc: Gregory Hermant <gregory.hermant@calao-systems.com>
Cc: Joachim Eastwood <manabian@gmail.com>
Cc: Fabio Porcedda <fabio.porcedda@gmail.com>
Cc: Tim Schendekehl <tim.schendekehl@egnite.de>
Cc: Gael Portay <g.portay@overkiz.com>
Cc: Rodolfo Giometti <giometti@linux.it>
Alexandre Belloni (34):
Documentation: dt: document all the atmel pmc compatibles
ARM: at91/dt: ariag25: define crystals frequencies
ARM: at91: prepare common clk transition for rm9200
ARM: at91/dt: rm9200: define clocks
ARM: at91: move at91rm9200 SoC to the CCF
ARM: at91/dt: at91rm9200ek: define crystals frequencies
ARM: at91: prepare common clk transition for sam9260
ARM: at91/dt: sam9260: define clocks
ARM: at91/dt: sam9g20: define clocks
ARM: at91: move at91sam9260 SoCs to the CCF
ARM: at91/dt: at91sam9g20ek: define crystals frequencies
ARM: at91/dt: foxg20: define crystals frequencies
ARM: at91/dt: usb_a9260: define crystals frequencies
ARM: at91/dt: tny_a9260: define crystals frequencies
ARM: at91/dt: qil_a9260: define crystals frequencies
ARM: at91/dt: mpa1600: define crytals frequencies
ARM: at91/dt: ge863-pro3: define main crystal frequency
ARM: at91/dt: aks-cdu: define slow crytal frequency
ARM: at91/dt: evk-pro3: define slow crytal frequency
ARM: at91/dt: ethernut5: define crystals frequencies
ARM: at91/dt: animeo_ip: define crystals frequencies
ARM: at91/dt: kizbox: define main crystal frequency
ARM: at91: prepare common clk transition for sam9g45
ARM: at91/dt: sam9g45: define clocks
ARM: at91: move at91sam9g45 SoC to the CCF
ARM: at91/dt: sam9m10g45ek: define crystals frequencies
ARM: at91/dt: pm9g45: crystals frequencies
ARM: at91/dt: cosino define crystals frequencies
ARM: at91: prepare common clk transition for sam9263
ARM: at91/dt: sam9263: define clocks
ARM: at91: move at91sam9263 SoC to the CCF
ARM: at91/dt: sam9263ek: define crystals frequencies
ARM: at91/dt: tny_a9263: define crystals frequencies
ARM: at91/dt: usb_a9263: define crystals frequencies
.../devicetree/bindings/arm/atmel-pmc.txt | 5 +-
arch/arm/boot/dts/aks-cdu.dts | 6 +
arch/arm/boot/dts/animeo_ip.dts | 8 +
arch/arm/boot/dts/at91-ariag25.dts | 8 +
arch/arm/boot/dts/at91-cosino.dtsi | 8 +
arch/arm/boot/dts/at91-foxg20.dts | 8 +
arch/arm/boot/dts/at91-qil_a9260.dts | 8 +
arch/arm/boot/dts/at91rm9200.dtsi | 304 ++++++++++++++++++
arch/arm/boot/dts/at91rm9200ek.dts | 8 +
arch/arm/boot/dts/at91sam9260.dtsi | 314 ++++++++++++++++++-
arch/arm/boot/dts/at91sam9263.dtsi | 311 +++++++++++++++++++
arch/arm/boot/dts/at91sam9263ek.dts | 8 +
arch/arm/boot/dts/at91sam9g20.dtsi | 24 ++
arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 8 +
arch/arm/boot/dts/at91sam9g45.dtsi | 342 ++++++++++++++++++++-
arch/arm/boot/dts/at91sam9m10g45ek.dts | 8 +
arch/arm/boot/dts/ethernut5.dts | 10 +
arch/arm/boot/dts/evk-pro3.dts | 6 +
arch/arm/boot/dts/ge863-pro3.dtsi | 4 +
arch/arm/boot/dts/kizbox.dts | 4 +
arch/arm/boot/dts/mpa1600.dts | 8 +
arch/arm/boot/dts/pm9g45.dts | 8 +
arch/arm/boot/dts/tny_a9260_common.dtsi | 8 +
arch/arm/boot/dts/tny_a9263.dts | 8 +
arch/arm/boot/dts/usb_a9260_common.dtsi | 8 +
arch/arm/boot/dts/usb_a9263.dts | 8 +
arch/arm/mach-at91/Kconfig | 4 -
arch/arm/mach-at91/at91rm9200.c | 6 +-
arch/arm/mach-at91/at91sam9260.c | 6 +-
arch/arm/mach-at91/at91sam9263.c | 6 +-
arch/arm/mach-at91/at91sam9g45.c | 6 +-
31 files changed, 1467 insertions(+), 11 deletions(-)
--
1.9.1
^ permalink raw reply [flat|nested] 70+ messages in thread
* [PATCHv3 01/34] Documentation: dt: document all the atmel pmc compatibles
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Documentation for atmel-pmc only list one compatible, add the remaining
compatible strings.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
Documentation/devicetree/bindings/arm/atmel-pmc.txt | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/atmel-pmc.txt b/Documentation/devicetree/bindings/arm/atmel-pmc.txt
index 389bed5056e8..795cc78543fe 100644
--- a/Documentation/devicetree/bindings/arm/atmel-pmc.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-pmc.txt
@@ -1,7 +1,10 @@
* Power Management Controller (PMC)
Required properties:
-- compatible: Should be "atmel,at91rm9200-pmc"
+- compatible: Should be "atmel,<chip>-pmc".
+ <chip> can be: at91rm9200, at91sam9260, at91sam9g45, at91sam9n12,
+ at91sam9x5, sama5d3
+
- reg: Should contain PMC registers location and length
Examples:
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 01/34] Documentation: dt: document all the atmel pmc compatibles
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Documentation for atmel-pmc only list one compatible, add the remaining
compatible strings.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
Documentation/devicetree/bindings/arm/atmel-pmc.txt | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/atmel-pmc.txt b/Documentation/devicetree/bindings/arm/atmel-pmc.txt
index 389bed5056e8..795cc78543fe 100644
--- a/Documentation/devicetree/bindings/arm/atmel-pmc.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-pmc.txt
@@ -1,7 +1,10 @@
* Power Management Controller (PMC)
Required properties:
-- compatible: Should be "atmel,at91rm9200-pmc"
+- compatible: Should be "atmel,<chip>-pmc".
+ <chip> can be: at91rm9200, at91sam9260, at91sam9g45, at91sam9n12,
+ at91sam9x5, sama5d3
+
- reg: Should contain PMC registers location and length
Examples:
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 02/34] ARM: at91/dt: ariag25: define crystals frequencies
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Define Acme Systems Aria G25 board main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91-ariag25.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91-ariag25.dts b/arch/arm/boot/dts/at91-ariag25.dts
index 55ab6180e350..e9ced30159a7 100644
--- a/arch/arm/boot/dts/at91-ariag25.dts
+++ b/arch/arm/boot/dts/at91-ariag25.dts
@@ -42,6 +42,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <12000000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 02/34] ARM: at91/dt: ariag25: define crystals frequencies
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define Acme Systems Aria G25 board main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91-ariag25.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91-ariag25.dts b/arch/arm/boot/dts/at91-ariag25.dts
index 55ab6180e350..e9ced30159a7 100644
--- a/arch/arm/boot/dts/at91-ariag25.dts
+++ b/arch/arm/boot/dts/at91-ariag25.dts
@@ -42,6 +42,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <12000000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 03/34] ARM: at91: prepare common clk transition for rm9200
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Enclose the rm9200 old clk registration in "#if defined(CONFIG_OLD_CLK_AT91)
#endif"
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
---
arch/arm/mach-at91/at91rm9200.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 787bb50a4dff..038702ee8bc6 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -26,10 +26,11 @@
#include "at91_aic.h"
#include "soc.h"
#include "generic.h"
-#include "clock.h"
#include "sam9_smc.h"
#include "pm.h"
+#if defined(CONFIG_OLD_CLK_AT91)
+#include "clock.h"
/* --------------------------------------------------------------------
* Clocks
* -------------------------------------------------------------------- */
@@ -277,6 +278,9 @@ static void __init at91rm9200_register_clocks(void)
clk_register(&pck2);
clk_register(&pck3);
}
+#else
+#define at91rm9200_register_clocks NULL
+#endif
/* --------------------------------------------------------------------
* GPIO
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 03/34] ARM: at91: prepare common clk transition for rm9200
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Enclose the rm9200 old clk registration in "#if defined(CONFIG_OLD_CLK_AT91)
#endif"
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
---
arch/arm/mach-at91/at91rm9200.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 787bb50a4dff..038702ee8bc6 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -26,10 +26,11 @@
#include "at91_aic.h"
#include "soc.h"
#include "generic.h"
-#include "clock.h"
#include "sam9_smc.h"
#include "pm.h"
+#if defined(CONFIG_OLD_CLK_AT91)
+#include "clock.h"
/* --------------------------------------------------------------------
* Clocks
* -------------------------------------------------------------------- */
@@ -277,6 +278,9 @@ static void __init at91rm9200_register_clocks(void)
clk_register(&pck2);
clk_register(&pck3);
}
+#else
+#define at91rm9200_register_clocks NULL
+#endif
/* --------------------------------------------------------------------
* GPIO
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 04/34] ARM: at91/dt: rm9200: define clocks
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91rm9200.dtsi | 304 ++++++++++++++++++++++++++++++++++++++
1 file changed, 304 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index c61b16fba79b..65ccf564b9a5 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -14,6 +14,7 @@
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
/ {
model = "Atmel AT91RM9200 family SoC";
@@ -51,6 +52,20 @@
reg = <0x20000000 0x04000000>;
};
+ clocks {
+ slow_xtal: slow_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ main_xtal: main_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ };
+
ahb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -79,6 +94,260 @@
pmc: pmc@fffffc00 {
compatible = "atmel,at91rm9200-pmc";
reg = <0xfffffc00 0x100>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+
+ main_osc: main_osc {
+ compatible = "atmel,at91rm9200-clk-main-osc";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MOSCS>;
+ clocks = <&main_xtal>;
+ };
+
+ main: mainck {
+ compatible = "atmel,at91rm9200-clk-main";
+ #clock-cells = <0>;
+ clocks = <&main_osc>;
+ };
+
+ plla: pllack {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKA>;
+ clocks = <&main>;
+ reg = <0>;
+ atmel,clk-input-range = <1000000 32000000>;
+ #atmel,pll-clk-output-range-cells = <3>;
+ atmel,pll-clk-output-ranges = <80000000 160000000 0>,
+ <150000000 180000000 2>;
+ };
+
+ pllb: pllbck {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKB>;
+ clocks = <&main>;
+ reg = <1>;
+ atmel,clk-input-range = <1000000 32000000>;
+ #atmel,pll-clk-output-range-cells = <3>;
+ atmel,pll-clk-output-ranges = <80000000 160000000 0>,
+ <150000000 180000000 2>;
+ };
+
+ mck: masterck {
+ compatible = "atmel,at91rm9200-clk-master";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
+ clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
+ atmel,clk-output-range = <0 80000000>;
+ atmel,clk-divisors = <1 2 3 4>;
+ };
+
+ usb: usbck {
+ compatible = "atmel,at91rm9200-clk-usb";
+ #clock-cells = <0>;
+ atmel,clk-divisors = <1 2>;
+ clocks = <&pllb>;
+ };
+
+ prog: progck {
+ compatible = "atmel,at91rm9200-clk-programmable";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&pmc>;
+ clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
+
+ prog0: prog0 {
+ #clock-cells = <0>;
+ reg = <0>;
+ interrupts = <AT91_PMC_PCKRDY(0)>;
+ };
+
+ prog1: prog1 {
+ #clock-cells = <0>;
+ reg = <1>;
+ interrupts = <AT91_PMC_PCKRDY(1)>;
+ };
+
+ prog2: prog2 {
+ #clock-cells = <0>;
+ reg = <2>;
+ interrupts = <AT91_PMC_PCKRDY(2)>;
+ };
+
+ prog3: prog3 {
+ #clock-cells = <0>;
+ reg = <3>;
+ interrupts = <AT91_PMC_PCKRDY(3)>;
+ };
+ };
+
+ systemck {
+ compatible = "atmel,at91rm9200-clk-system";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ udpck: udpck {
+ #clock-cells = <0>;
+ reg = <2>;
+ clocks = <&usb>;
+ };
+
+ uhpck: uhpck {
+ #clock-cells = <0>;
+ reg = <4>;
+ clocks = <&usb>;
+ };
+
+ pck0: pck0 {
+ #clock-cells = <0>;
+ reg = <8>;
+ clocks = <&prog0>;
+ };
+
+ pck1: pck1 {
+ #clock-cells = <0>;
+ reg = <9>;
+ clocks = <&prog1>;
+ };
+
+ pck2: pck2 {
+ #clock-cells = <0>;
+ reg = <10>;
+ clocks = <&prog2>;
+ };
+
+ pck3: pck3 {
+ #clock-cells = <0>;
+ reg = <11>;
+ clocks = <&prog3>;
+ };
+ };
+
+ periphck {
+ compatible = "atmel,at91rm9200-clk-peripheral";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&mck>;
+
+ pioA_clk: pioA_clk {
+ #clock-cells = <0>;
+ reg = <2>;
+ };
+
+ pioB_clk: pioB_clk {
+ #clock-cells = <0>;
+ reg = <3>;
+ };
+
+ pioC_clk: pioC_clk {
+ #clock-cells = <0>;
+ reg = <4>;
+ };
+
+ pioD_clk: pioD_clk {
+ #clock-cells = <0>;
+ reg = <5>;
+ };
+
+ usart0_clk: usart0_clk {
+ #clock-cells = <0>;
+ reg = <6>;
+ };
+
+ usart1_clk: usart1_clk {
+ #clock-cells = <0>;
+ reg = <7>;
+ };
+
+ usart2_clk: usart2_clk {
+ #clock-cells = <0>;
+ reg = <8>;
+ };
+
+ usart3_clk: usart3_clk {
+ #clock-cells = <0>;
+ reg = <9>;
+ };
+
+ mci0_clk: mci0_clk {
+ #clock-cells = <0>;
+ reg = <10>;
+ };
+
+ udc_clk: udc_clk {
+ #clock-cells = <0>;
+ reg = <11>;
+ };
+
+ twi0_clk: twi0_clk {
+ reg = <12>;
+ #clock-cells = <0>;
+ };
+
+ spi0_clk: spi0_clk {
+ #clock-cells = <0>;
+ reg = <13>;
+ };
+
+ ssc0_clk: ssc0_clk {
+ #clock-cells = <0>;
+ reg = <14>;
+ };
+
+ ssc1_clk: ssc1_clk {
+ #clock-cells = <0>;
+ reg = <15>;
+ };
+
+ ssc2_clk: ssc2_clk {
+ #clock-cells = <0>;
+ reg = <16>;
+ };
+
+ tc0_clk: tc0_clk {
+ #clock-cells = <0>;
+ reg = <17>;
+ };
+
+ tc1_clk: tc1_clk {
+ #clock-cells = <0>;
+ reg = <18>;
+ };
+
+ tc2_clk: tc2_clk {
+ #clock-cells = <0>;
+ reg = <19>;
+ };
+
+ tc3_clk: tc3_clk {
+ #clock-cells = <0>;
+ reg = <20>;
+ };
+
+ tc4_clk: tc4_clk {
+ #clock-cells = <0>;
+ reg = <21>;
+ };
+
+ tc5_clk: tc5_clk {
+ #clock-cells = <0>;
+ reg = <22>;
+ };
+
+ ohci_clk: ohci_clk {
+ #clock-cells = <0>;
+ reg = <23>;
+ };
+
+ macb0_clk: macb0_clk {
+ #clock-cells = <0>;
+ reg = <24>;
+ };
+ };
};
st: timer@fffffd00 {
@@ -93,6 +362,8 @@
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
18 IRQ_TYPE_LEVEL_HIGH 0
19 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
+ clock-names = "t0_clk", "t1_clk", "t2_clk";
};
tcb1: timer@fffa4000 {
@@ -101,6 +372,8 @@
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0
21 IRQ_TYPE_LEVEL_HIGH 0
22 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>;
+ clock-names = "t0_clk", "t1_clk", "t2_clk";
};
i2c0: i2c@fffb8000 {
@@ -109,6 +382,7 @@
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_twi>;
+ clocks = <&twi0_clk>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -118,6 +392,8 @@
compatible = "atmel,hsmci";
reg = <0xfffb4000 0x4000>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&mci0_clk>;
+ clock-names = "mci_clk";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
@@ -130,6 +406,8 @@
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+ clocks = <&ssc0_clk>;
+ clock-names = "pclk";
status = "disable";
};
@@ -139,6 +417,8 @@
interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
+ clocks = <&ssc1_clk>;
+ clock-names = "pclk";
status = "disable";
};
@@ -148,6 +428,8 @@
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
+ clocks = <&ssc2_clk>;
+ clock-names = "pclk";
status = "disable";
};
@@ -158,6 +440,8 @@
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb_rmii>;
+ clocks = <&macb0_clk>;
+ clock-names = "ether_clk";
status = "disabled";
};
@@ -496,6 +780,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioA_clk>;
};
pioB: gpio@fffff600 {
@@ -506,6 +791,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioB_clk>;
};
pioC: gpio@fffff800 {
@@ -516,6 +802,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioC_clk>;
};
pioD: gpio@fffffa00 {
@@ -526,6 +813,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioD_clk>;
};
};
@@ -535,6 +823,8 @@
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
+ clocks = <&mck>;
+ clock-names = "usart";
status = "disabled";
};
@@ -546,6 +836,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0>;
+ clocks = <&usart0_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -557,6 +849,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
+ clocks = <&usart1_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -568,6 +862,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
+ clocks = <&usart2_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -579,6 +875,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
+ clocks = <&usart3_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -586,6 +884,8 @@
compatible = "atmel,at91rm9200-udc";
reg = <0xfffb0000 0x4000>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&udc_clk>, <&udpck>;
+ clock-names = "pclk", "hclk";
status = "disabled";
};
@@ -597,6 +897,8 @@
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
+ clocks = <&spi0_clk>;
+ clock-names = "spi_clk";
status = "disabled";
};
};
@@ -622,6 +924,8 @@
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00300000 0x100000>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>;
+ clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
status = "disabled";
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 04/34] ARM: at91/dt: rm9200: define clocks
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91rm9200.dtsi | 304 ++++++++++++++++++++++++++++++++++++++
1 file changed, 304 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index c61b16fba79b..65ccf564b9a5 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -14,6 +14,7 @@
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
/ {
model = "Atmel AT91RM9200 family SoC";
@@ -51,6 +52,20 @@
reg = <0x20000000 0x04000000>;
};
+ clocks {
+ slow_xtal: slow_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ main_xtal: main_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ };
+
ahb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -79,6 +94,260 @@
pmc: pmc at fffffc00 {
compatible = "atmel,at91rm9200-pmc";
reg = <0xfffffc00 0x100>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+
+ main_osc: main_osc {
+ compatible = "atmel,at91rm9200-clk-main-osc";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MOSCS>;
+ clocks = <&main_xtal>;
+ };
+
+ main: mainck {
+ compatible = "atmel,at91rm9200-clk-main";
+ #clock-cells = <0>;
+ clocks = <&main_osc>;
+ };
+
+ plla: pllack {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKA>;
+ clocks = <&main>;
+ reg = <0>;
+ atmel,clk-input-range = <1000000 32000000>;
+ #atmel,pll-clk-output-range-cells = <3>;
+ atmel,pll-clk-output-ranges = <80000000 160000000 0>,
+ <150000000 180000000 2>;
+ };
+
+ pllb: pllbck {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKB>;
+ clocks = <&main>;
+ reg = <1>;
+ atmel,clk-input-range = <1000000 32000000>;
+ #atmel,pll-clk-output-range-cells = <3>;
+ atmel,pll-clk-output-ranges = <80000000 160000000 0>,
+ <150000000 180000000 2>;
+ };
+
+ mck: masterck {
+ compatible = "atmel,at91rm9200-clk-master";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
+ clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
+ atmel,clk-output-range = <0 80000000>;
+ atmel,clk-divisors = <1 2 3 4>;
+ };
+
+ usb: usbck {
+ compatible = "atmel,at91rm9200-clk-usb";
+ #clock-cells = <0>;
+ atmel,clk-divisors = <1 2>;
+ clocks = <&pllb>;
+ };
+
+ prog: progck {
+ compatible = "atmel,at91rm9200-clk-programmable";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&pmc>;
+ clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
+
+ prog0: prog0 {
+ #clock-cells = <0>;
+ reg = <0>;
+ interrupts = <AT91_PMC_PCKRDY(0)>;
+ };
+
+ prog1: prog1 {
+ #clock-cells = <0>;
+ reg = <1>;
+ interrupts = <AT91_PMC_PCKRDY(1)>;
+ };
+
+ prog2: prog2 {
+ #clock-cells = <0>;
+ reg = <2>;
+ interrupts = <AT91_PMC_PCKRDY(2)>;
+ };
+
+ prog3: prog3 {
+ #clock-cells = <0>;
+ reg = <3>;
+ interrupts = <AT91_PMC_PCKRDY(3)>;
+ };
+ };
+
+ systemck {
+ compatible = "atmel,at91rm9200-clk-system";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ udpck: udpck {
+ #clock-cells = <0>;
+ reg = <2>;
+ clocks = <&usb>;
+ };
+
+ uhpck: uhpck {
+ #clock-cells = <0>;
+ reg = <4>;
+ clocks = <&usb>;
+ };
+
+ pck0: pck0 {
+ #clock-cells = <0>;
+ reg = <8>;
+ clocks = <&prog0>;
+ };
+
+ pck1: pck1 {
+ #clock-cells = <0>;
+ reg = <9>;
+ clocks = <&prog1>;
+ };
+
+ pck2: pck2 {
+ #clock-cells = <0>;
+ reg = <10>;
+ clocks = <&prog2>;
+ };
+
+ pck3: pck3 {
+ #clock-cells = <0>;
+ reg = <11>;
+ clocks = <&prog3>;
+ };
+ };
+
+ periphck {
+ compatible = "atmel,at91rm9200-clk-peripheral";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&mck>;
+
+ pioA_clk: pioA_clk {
+ #clock-cells = <0>;
+ reg = <2>;
+ };
+
+ pioB_clk: pioB_clk {
+ #clock-cells = <0>;
+ reg = <3>;
+ };
+
+ pioC_clk: pioC_clk {
+ #clock-cells = <0>;
+ reg = <4>;
+ };
+
+ pioD_clk: pioD_clk {
+ #clock-cells = <0>;
+ reg = <5>;
+ };
+
+ usart0_clk: usart0_clk {
+ #clock-cells = <0>;
+ reg = <6>;
+ };
+
+ usart1_clk: usart1_clk {
+ #clock-cells = <0>;
+ reg = <7>;
+ };
+
+ usart2_clk: usart2_clk {
+ #clock-cells = <0>;
+ reg = <8>;
+ };
+
+ usart3_clk: usart3_clk {
+ #clock-cells = <0>;
+ reg = <9>;
+ };
+
+ mci0_clk: mci0_clk {
+ #clock-cells = <0>;
+ reg = <10>;
+ };
+
+ udc_clk: udc_clk {
+ #clock-cells = <0>;
+ reg = <11>;
+ };
+
+ twi0_clk: twi0_clk {
+ reg = <12>;
+ #clock-cells = <0>;
+ };
+
+ spi0_clk: spi0_clk {
+ #clock-cells = <0>;
+ reg = <13>;
+ };
+
+ ssc0_clk: ssc0_clk {
+ #clock-cells = <0>;
+ reg = <14>;
+ };
+
+ ssc1_clk: ssc1_clk {
+ #clock-cells = <0>;
+ reg = <15>;
+ };
+
+ ssc2_clk: ssc2_clk {
+ #clock-cells = <0>;
+ reg = <16>;
+ };
+
+ tc0_clk: tc0_clk {
+ #clock-cells = <0>;
+ reg = <17>;
+ };
+
+ tc1_clk: tc1_clk {
+ #clock-cells = <0>;
+ reg = <18>;
+ };
+
+ tc2_clk: tc2_clk {
+ #clock-cells = <0>;
+ reg = <19>;
+ };
+
+ tc3_clk: tc3_clk {
+ #clock-cells = <0>;
+ reg = <20>;
+ };
+
+ tc4_clk: tc4_clk {
+ #clock-cells = <0>;
+ reg = <21>;
+ };
+
+ tc5_clk: tc5_clk {
+ #clock-cells = <0>;
+ reg = <22>;
+ };
+
+ ohci_clk: ohci_clk {
+ #clock-cells = <0>;
+ reg = <23>;
+ };
+
+ macb0_clk: macb0_clk {
+ #clock-cells = <0>;
+ reg = <24>;
+ };
+ };
};
st: timer at fffffd00 {
@@ -93,6 +362,8 @@
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
18 IRQ_TYPE_LEVEL_HIGH 0
19 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
+ clock-names = "t0_clk", "t1_clk", "t2_clk";
};
tcb1: timer at fffa4000 {
@@ -101,6 +372,8 @@
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0
21 IRQ_TYPE_LEVEL_HIGH 0
22 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>;
+ clock-names = "t0_clk", "t1_clk", "t2_clk";
};
i2c0: i2c at fffb8000 {
@@ -109,6 +382,7 @@
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_twi>;
+ clocks = <&twi0_clk>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -118,6 +392,8 @@
compatible = "atmel,hsmci";
reg = <0xfffb4000 0x4000>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&mci0_clk>;
+ clock-names = "mci_clk";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
@@ -130,6 +406,8 @@
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+ clocks = <&ssc0_clk>;
+ clock-names = "pclk";
status = "disable";
};
@@ -139,6 +417,8 @@
interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
+ clocks = <&ssc1_clk>;
+ clock-names = "pclk";
status = "disable";
};
@@ -148,6 +428,8 @@
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
+ clocks = <&ssc2_clk>;
+ clock-names = "pclk";
status = "disable";
};
@@ -158,6 +440,8 @@
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb_rmii>;
+ clocks = <&macb0_clk>;
+ clock-names = "ether_clk";
status = "disabled";
};
@@ -496,6 +780,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioA_clk>;
};
pioB: gpio at fffff600 {
@@ -506,6 +791,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioB_clk>;
};
pioC: gpio at fffff800 {
@@ -516,6 +802,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioC_clk>;
};
pioD: gpio at fffffa00 {
@@ -526,6 +813,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioD_clk>;
};
};
@@ -535,6 +823,8 @@
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
+ clocks = <&mck>;
+ clock-names = "usart";
status = "disabled";
};
@@ -546,6 +836,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0>;
+ clocks = <&usart0_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -557,6 +849,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
+ clocks = <&usart1_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -568,6 +862,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
+ clocks = <&usart2_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -579,6 +875,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
+ clocks = <&usart3_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -586,6 +884,8 @@
compatible = "atmel,at91rm9200-udc";
reg = <0xfffb0000 0x4000>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&udc_clk>, <&udpck>;
+ clock-names = "pclk", "hclk";
status = "disabled";
};
@@ -597,6 +897,8 @@
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
+ clocks = <&spi0_clk>;
+ clock-names = "spi_clk";
status = "disabled";
};
};
@@ -622,6 +924,8 @@
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00300000 0x100000>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>;
+ clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
status = "disabled";
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 05/34] ARM: at91: move at91rm9200 SoC to the CCF
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91rm9200
SoC support. This will automatically enable COMMON_CLK_AT91 option and add
support for at91 common clk implementation.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
---
arch/arm/mach-at91/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 45b55e0f0db6..c818136a74b8 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -113,7 +113,6 @@ config SOC_AT91RM9200
select HAVE_AT91_DBGU0
select MULTI_IRQ_HANDLER
select SPARSE_IRQ
- select AT91_USE_OLD_CLK
select HAVE_AT91_USB_CLK
config SOC_AT91SAM9260
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 05/34] ARM: at91: move at91rm9200 SoC to the CCF
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91rm9200
SoC support. This will automatically enable COMMON_CLK_AT91 option and add
support for at91 common clk implementation.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
---
arch/arm/mach-at91/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 45b55e0f0db6..c818136a74b8 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -113,7 +113,6 @@ config SOC_AT91RM9200
select HAVE_AT91_DBGU0
select MULTI_IRQ_HANDLER
select SPARSE_IRQ
- select AT91_USE_OLD_CLK
select HAVE_AT91_USB_CLK
config SOC_AT91SAM9260
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 06/34] ARM: at91/dt: at91rm9200ek: define crystals frequencies
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Define at91rm9200ek main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91rm9200ek.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts b/arch/arm/boot/dts/at91rm9200ek.dts
index df6b0aa0e4dd..43eb779dd6f6 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -25,6 +25,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <18432000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <18432000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 06/34] ARM: at91/dt: at91rm9200ek: define crystals frequencies
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define at91rm9200ek main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91rm9200ek.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts b/arch/arm/boot/dts/at91rm9200ek.dts
index df6b0aa0e4dd..43eb779dd6f6 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -25,6 +25,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <18432000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <18432000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 07/34] ARM: at91: prepare common clk transition for sam9260
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Enclose the sam9260 old clk registration in "#if defined(CONFIG_OLD_CLK_AT91)
#endif"
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/at91sam9260.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index c3d22be73b7c..3477ba94c4c5 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -27,10 +27,11 @@
#include "at91_rstc.h"
#include "soc.h"
#include "generic.h"
-#include "clock.h"
#include "sam9_smc.h"
#include "pm.h"
+#if defined(CONFIG_OLD_CLK_AT91)
+#include "clock.h"
/* --------------------------------------------------------------------
* Clocks
* -------------------------------------------------------------------- */
@@ -288,6 +289,9 @@ static void __init at91sam9260_register_clocks(void)
clk_register(&pck0);
clk_register(&pck1);
}
+#else
+#define at91sam9260_register_clocks NULL
+#endif
/* --------------------------------------------------------------------
* GPIO
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 07/34] ARM: at91: prepare common clk transition for sam9260
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Enclose the sam9260 old clk registration in "#if defined(CONFIG_OLD_CLK_AT91)
#endif"
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/at91sam9260.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index c3d22be73b7c..3477ba94c4c5 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -27,10 +27,11 @@
#include "at91_rstc.h"
#include "soc.h"
#include "generic.h"
-#include "clock.h"
#include "sam9_smc.h"
#include "pm.h"
+#if defined(CONFIG_OLD_CLK_AT91)
+#include "clock.h"
/* --------------------------------------------------------------------
* Clocks
* -------------------------------------------------------------------- */
@@ -288,6 +289,9 @@ static void __init at91sam9260_register_clocks(void)
clk_register(&pck0);
clk_register(&pck1);
}
+#else
+#define at91sam9260_register_clocks NULL
+#endif
/* --------------------------------------------------------------------
* GPIO
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 08/34] ARM: at91/dt: sam9260: define clocks
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Define the at91sam9260 clocks in the SoC dtsi file.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91sam9260.dtsi | 314 ++++++++++++++++++++++++++++++++++++-
1 file changed, 313 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index c0e0eae16a27..cb100b03a362 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -12,6 +12,7 @@
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
/ {
model = "Atmel AT91SAM9260 family SoC";
@@ -48,6 +49,26 @@
reg = <0x20000000 0x04000000>;
};
+ clocks {
+ slow_xtal: slow_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ main_xtal: main_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ adc_op_clk: adc_op_clk{
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <5000000>;
+ };
+ };
+
ahb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -74,8 +95,260 @@
};
pmc: pmc@fffffc00 {
- compatible = "atmel,at91rm9200-pmc";
+ compatible = "atmel,at91sam9260-pmc";
reg = <0xfffffc00 0x100>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+
+ main_osc: main_osc {
+ compatible = "atmel,at91rm9200-clk-main-osc";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MOSCS>;
+ clocks = <&main_xtal>;
+ };
+
+ main: mainck {
+ compatible = "atmel,at91rm9200-clk-main";
+ #clock-cells = <0>;
+ clocks = <&main_osc>;
+ };
+
+ slow_rc_osc: slow_rc_osc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-accuracy = <50000000>;
+ };
+
+ clk32k: slck {
+ compatible = "atmel,at91sam9260-clk-slow";
+ #clock-cells = <0>;
+ clocks = <&slow_rc_osc>, <&slow_xtal>;
+ };
+
+ plla: pllack {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKA>;
+ clocks = <&main>;
+ reg = <0>;
+ atmel,clk-input-range = <1000000 32000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <80000000 160000000 0 1>,
+ <150000000 240000000 2 1>;
+ };
+
+ pllb: pllbck {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKB>;
+ clocks = <&main>;
+ reg = <1>;
+ atmel,clk-input-range = <1000000 5000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
+ };
+
+ mck: masterck {
+ compatible = "atmel,at91rm9200-clk-master";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
+ clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
+ atmel,clk-output-range = <0 105000000>;
+ atmel,clk-divisors = <1 2 4 0>;
+ };
+
+ usb: usbck {
+ compatible = "atmel,at91rm9200-clk-usb";
+ #clock-cells = <0>;
+ atmel,clk-divisors = <1 2 4 0>;
+ clocks = <&pllb>;
+ };
+
+ prog: progck {
+ compatible = "atmel,at91rm9200-clk-programmable";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&pmc>;
+ clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
+
+ prog0: prog0 {
+ #clock-cells = <0>;
+ reg = <0>;
+ interrupts = <AT91_PMC_PCKRDY(0)>;
+ };
+
+ prog1: prog1 {
+ #clock-cells = <0>;
+ reg = <1>;
+ interrupts = <AT91_PMC_PCKRDY(1)>;
+ };
+ };
+
+ systemck {
+ compatible = "atmel,at91rm9200-clk-system";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ uhpck: uhpck {
+ #clock-cells = <0>;
+ reg = <6>;
+ clocks = <&usb>;
+ };
+
+ udpck: udpck {
+ #clock-cells = <0>;
+ reg = <7>;
+ clocks = <&usb>;
+ };
+
+ pck0: pck0 {
+ #clock-cells = <0>;
+ reg = <8>;
+ clocks = <&prog0>;
+ };
+
+ pck1: pck1 {
+ #clock-cells = <0>;
+ reg = <9>;
+ clocks = <&prog1>;
+ };
+ };
+
+ periphck {
+ compatible = "atmel,at91rm9200-clk-peripheral";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&mck>;
+
+ pioA_clk: pioA_clk {
+ #clock-cells = <0>;
+ reg = <2>;
+ };
+
+ pioB_clk: pioB_clk {
+ #clock-cells = <0>;
+ reg = <3>;
+ };
+
+ pioC_clk: pioC_clk {
+ #clock-cells = <0>;
+ reg = <4>;
+ };
+
+ adc_clk: adc_clk {
+ #clock-cells = <0>;
+ reg = <5>;
+ };
+
+ usart0_clk: usart0_clk {
+ #clock-cells = <0>;
+ reg = <6>;
+ };
+
+ usart1_clk: usart1_clk {
+ #clock-cells = <0>;
+ reg = <7>;
+ };
+
+ usart2_clk: usart2_clk {
+ #clock-cells = <0>;
+ reg = <8>;
+ };
+
+ mci0_clk: mci0_clk {
+ #clock-cells = <0>;
+ reg = <9>;
+ };
+
+ udc_clk: udc_clk {
+ #clock-cells = <0>;
+ reg = <10>;
+ };
+
+ twi0_clk: twi0_clk {
+ reg = <11>;
+ #clock-cells = <0>;
+ };
+
+ spi0_clk: spi0_clk {
+ #clock-cells = <0>;
+ reg = <12>;
+ };
+
+ spi1_clk: spi1_clk {
+ #clock-cells = <0>;
+ reg = <13>;
+ };
+
+ ssc0_clk: ssc0_clk {
+ #clock-cells = <0>;
+ reg = <14>;
+ };
+
+ tc0_clk: tc0_clk {
+ #clock-cells = <0>;
+ reg = <17>;
+ };
+
+ tc1_clk: tc1_clk {
+ #clock-cells = <0>;
+ reg = <18>;
+ };
+
+ tc2_clk: tc2_clk {
+ #clock-cells = <0>;
+ reg = <19>;
+ };
+
+ ohci_clk: ohci_clk {
+ #clock-cells = <0>;
+ reg = <20>;
+ };
+
+ macb0_clk: macb0_clk {
+ #clock-cells = <0>;
+ reg = <21>;
+ };
+
+ isi_clk: isi_clk {
+ #clock-cells = <0>;
+ reg = <22>;
+ };
+
+ usart3_clk: usart3_clk {
+ #clock-cells = <0>;
+ reg = <23>;
+ };
+
+ uart0_clk: uart0_clk {
+ #clock-cells = <0>;
+ reg = <24>;
+ };
+
+ uart1_clk: uart1_clk {
+ #clock-cells = <0>;
+ reg = <25>;
+ };
+
+ tc3_clk: tc3_clk {
+ #clock-cells = <0>;
+ reg = <26>;
+ };
+
+ tc4_clk: tc4_clk {
+ #clock-cells = <0>;
+ reg = <27>;
+ };
+
+ tc5_clk: tc5_clk {
+ #clock-cells = <0>;
+ reg = <28>;
+ };
+ };
};
rstc@fffffd00 {
@@ -92,6 +365,7 @@
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&mck>;
};
tcb0: timer@fffa0000 {
@@ -100,6 +374,8 @@
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
18 IRQ_TYPE_LEVEL_HIGH 0
19 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
+ clock-names = "t0_clk", "t1_clk", "t2_clk";
};
tcb1: timer@fffdc000 {
@@ -108,6 +384,8 @@
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
27 IRQ_TYPE_LEVEL_HIGH 0
28 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>;
+ clock-names = "t0_clk", "t1_clk", "t2_clk";
};
pinctrl@fffff400 {
@@ -443,6 +721,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioA_clk>;
};
pioB: gpio@fffff600 {
@@ -453,6 +732,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioB_clk>;
};
pioC: gpio@fffff800 {
@@ -463,6 +743,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioC_clk>;
};
};
@@ -472,6 +753,8 @@
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
+ clocks = <&mck>;
+ clock-names = "usart";
status = "disabled";
};
@@ -483,6 +766,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>;
+ clocks = <&usart0_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -494,6 +779,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>;
+ clocks = <&usart1_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -505,6 +792,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>;
+ clocks = <&usart2_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -516,6 +805,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3>;
+ clocks = <&usart3_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -527,6 +818,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0>;
+ clocks = <&uart0_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -538,6 +831,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
+ clocks = <&uart1_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -547,6 +842,8 @@
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb_rmii>;
+ clocks = <&macb0_clk>, <&macb0_clk>;
+ clock-names = "hclk", "pclk";
status = "disabled";
};
@@ -554,6 +851,8 @@
compatible = "atmel,at91rm9200-udc";
reg = <0xfffa4000 0x4000>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&udc_clk>, <&udpck>;
+ clock-names = "pclk", "hclk";
status = "disabled";
};
@@ -563,6 +862,7 @@
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
#address-cells = <1>;
#size-cells = <0>;
+ clocks = <&twi0_clk>;
status = "disabled";
};
@@ -573,6 +873,8 @@
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
+ clocks = <&mci0_clk>;
+ clock-names = "mci_clk";
status = "disabled";
};
@@ -582,6 +884,8 @@
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+ clocks = <&ssc0_clk>;
+ clock-names = "pclk";
status = "disabled";
};
@@ -593,6 +897,8 @@
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
+ clocks = <&spi0_clk>;
+ clock-names = "spi_clk";
status = "disabled";
};
@@ -604,6 +910,8 @@
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
+ clocks = <&spi1_clk>;
+ clock-names = "spi_clk";
status = "disabled";
};
@@ -613,6 +921,8 @@
compatible = "atmel,at91sam9260-adc";
reg = <0xfffe0000 0x100>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&adc_clk>, <&adc_op_clk>;
+ clock-names = "adc_clk", "adc_op_clk";
atmel,adc-use-external-triggers;
atmel,adc-channels-used = <0xf>;
atmel,adc-vref = <3300>;
@@ -680,6 +990,8 @@
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00500000 0x100000>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>;
+ clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
status = "disabled";
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 08/34] ARM: at91/dt: sam9260: define clocks
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define the at91sam9260 clocks in the SoC dtsi file.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91sam9260.dtsi | 314 ++++++++++++++++++++++++++++++++++++-
1 file changed, 313 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index c0e0eae16a27..cb100b03a362 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -12,6 +12,7 @@
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
/ {
model = "Atmel AT91SAM9260 family SoC";
@@ -48,6 +49,26 @@
reg = <0x20000000 0x04000000>;
};
+ clocks {
+ slow_xtal: slow_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ main_xtal: main_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ adc_op_clk: adc_op_clk{
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <5000000>;
+ };
+ };
+
ahb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -74,8 +95,260 @@
};
pmc: pmc at fffffc00 {
- compatible = "atmel,at91rm9200-pmc";
+ compatible = "atmel,at91sam9260-pmc";
reg = <0xfffffc00 0x100>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+
+ main_osc: main_osc {
+ compatible = "atmel,at91rm9200-clk-main-osc";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MOSCS>;
+ clocks = <&main_xtal>;
+ };
+
+ main: mainck {
+ compatible = "atmel,at91rm9200-clk-main";
+ #clock-cells = <0>;
+ clocks = <&main_osc>;
+ };
+
+ slow_rc_osc: slow_rc_osc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-accuracy = <50000000>;
+ };
+
+ clk32k: slck {
+ compatible = "atmel,at91sam9260-clk-slow";
+ #clock-cells = <0>;
+ clocks = <&slow_rc_osc>, <&slow_xtal>;
+ };
+
+ plla: pllack {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKA>;
+ clocks = <&main>;
+ reg = <0>;
+ atmel,clk-input-range = <1000000 32000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <80000000 160000000 0 1>,
+ <150000000 240000000 2 1>;
+ };
+
+ pllb: pllbck {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKB>;
+ clocks = <&main>;
+ reg = <1>;
+ atmel,clk-input-range = <1000000 5000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
+ };
+
+ mck: masterck {
+ compatible = "atmel,at91rm9200-clk-master";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
+ clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
+ atmel,clk-output-range = <0 105000000>;
+ atmel,clk-divisors = <1 2 4 0>;
+ };
+
+ usb: usbck {
+ compatible = "atmel,at91rm9200-clk-usb";
+ #clock-cells = <0>;
+ atmel,clk-divisors = <1 2 4 0>;
+ clocks = <&pllb>;
+ };
+
+ prog: progck {
+ compatible = "atmel,at91rm9200-clk-programmable";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&pmc>;
+ clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
+
+ prog0: prog0 {
+ #clock-cells = <0>;
+ reg = <0>;
+ interrupts = <AT91_PMC_PCKRDY(0)>;
+ };
+
+ prog1: prog1 {
+ #clock-cells = <0>;
+ reg = <1>;
+ interrupts = <AT91_PMC_PCKRDY(1)>;
+ };
+ };
+
+ systemck {
+ compatible = "atmel,at91rm9200-clk-system";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ uhpck: uhpck {
+ #clock-cells = <0>;
+ reg = <6>;
+ clocks = <&usb>;
+ };
+
+ udpck: udpck {
+ #clock-cells = <0>;
+ reg = <7>;
+ clocks = <&usb>;
+ };
+
+ pck0: pck0 {
+ #clock-cells = <0>;
+ reg = <8>;
+ clocks = <&prog0>;
+ };
+
+ pck1: pck1 {
+ #clock-cells = <0>;
+ reg = <9>;
+ clocks = <&prog1>;
+ };
+ };
+
+ periphck {
+ compatible = "atmel,at91rm9200-clk-peripheral";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&mck>;
+
+ pioA_clk: pioA_clk {
+ #clock-cells = <0>;
+ reg = <2>;
+ };
+
+ pioB_clk: pioB_clk {
+ #clock-cells = <0>;
+ reg = <3>;
+ };
+
+ pioC_clk: pioC_clk {
+ #clock-cells = <0>;
+ reg = <4>;
+ };
+
+ adc_clk: adc_clk {
+ #clock-cells = <0>;
+ reg = <5>;
+ };
+
+ usart0_clk: usart0_clk {
+ #clock-cells = <0>;
+ reg = <6>;
+ };
+
+ usart1_clk: usart1_clk {
+ #clock-cells = <0>;
+ reg = <7>;
+ };
+
+ usart2_clk: usart2_clk {
+ #clock-cells = <0>;
+ reg = <8>;
+ };
+
+ mci0_clk: mci0_clk {
+ #clock-cells = <0>;
+ reg = <9>;
+ };
+
+ udc_clk: udc_clk {
+ #clock-cells = <0>;
+ reg = <10>;
+ };
+
+ twi0_clk: twi0_clk {
+ reg = <11>;
+ #clock-cells = <0>;
+ };
+
+ spi0_clk: spi0_clk {
+ #clock-cells = <0>;
+ reg = <12>;
+ };
+
+ spi1_clk: spi1_clk {
+ #clock-cells = <0>;
+ reg = <13>;
+ };
+
+ ssc0_clk: ssc0_clk {
+ #clock-cells = <0>;
+ reg = <14>;
+ };
+
+ tc0_clk: tc0_clk {
+ #clock-cells = <0>;
+ reg = <17>;
+ };
+
+ tc1_clk: tc1_clk {
+ #clock-cells = <0>;
+ reg = <18>;
+ };
+
+ tc2_clk: tc2_clk {
+ #clock-cells = <0>;
+ reg = <19>;
+ };
+
+ ohci_clk: ohci_clk {
+ #clock-cells = <0>;
+ reg = <20>;
+ };
+
+ macb0_clk: macb0_clk {
+ #clock-cells = <0>;
+ reg = <21>;
+ };
+
+ isi_clk: isi_clk {
+ #clock-cells = <0>;
+ reg = <22>;
+ };
+
+ usart3_clk: usart3_clk {
+ #clock-cells = <0>;
+ reg = <23>;
+ };
+
+ uart0_clk: uart0_clk {
+ #clock-cells = <0>;
+ reg = <24>;
+ };
+
+ uart1_clk: uart1_clk {
+ #clock-cells = <0>;
+ reg = <25>;
+ };
+
+ tc3_clk: tc3_clk {
+ #clock-cells = <0>;
+ reg = <26>;
+ };
+
+ tc4_clk: tc4_clk {
+ #clock-cells = <0>;
+ reg = <27>;
+ };
+
+ tc5_clk: tc5_clk {
+ #clock-cells = <0>;
+ reg = <28>;
+ };
+ };
};
rstc at fffffd00 {
@@ -92,6 +365,7 @@
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&mck>;
};
tcb0: timer at fffa0000 {
@@ -100,6 +374,8 @@
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
18 IRQ_TYPE_LEVEL_HIGH 0
19 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
+ clock-names = "t0_clk", "t1_clk", "t2_clk";
};
tcb1: timer at fffdc000 {
@@ -108,6 +384,8 @@
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
27 IRQ_TYPE_LEVEL_HIGH 0
28 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>;
+ clock-names = "t0_clk", "t1_clk", "t2_clk";
};
pinctrl at fffff400 {
@@ -443,6 +721,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioA_clk>;
};
pioB: gpio at fffff600 {
@@ -453,6 +732,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioB_clk>;
};
pioC: gpio at fffff800 {
@@ -463,6 +743,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioC_clk>;
};
};
@@ -472,6 +753,8 @@
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
+ clocks = <&mck>;
+ clock-names = "usart";
status = "disabled";
};
@@ -483,6 +766,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>;
+ clocks = <&usart0_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -494,6 +779,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>;
+ clocks = <&usart1_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -505,6 +792,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>;
+ clocks = <&usart2_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -516,6 +805,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3>;
+ clocks = <&usart3_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -527,6 +818,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0>;
+ clocks = <&uart0_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -538,6 +831,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
+ clocks = <&uart1_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -547,6 +842,8 @@
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb_rmii>;
+ clocks = <&macb0_clk>, <&macb0_clk>;
+ clock-names = "hclk", "pclk";
status = "disabled";
};
@@ -554,6 +851,8 @@
compatible = "atmel,at91rm9200-udc";
reg = <0xfffa4000 0x4000>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&udc_clk>, <&udpck>;
+ clock-names = "pclk", "hclk";
status = "disabled";
};
@@ -563,6 +862,7 @@
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
#address-cells = <1>;
#size-cells = <0>;
+ clocks = <&twi0_clk>;
status = "disabled";
};
@@ -573,6 +873,8 @@
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
+ clocks = <&mci0_clk>;
+ clock-names = "mci_clk";
status = "disabled";
};
@@ -582,6 +884,8 @@
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+ clocks = <&ssc0_clk>;
+ clock-names = "pclk";
status = "disabled";
};
@@ -593,6 +897,8 @@
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
+ clocks = <&spi0_clk>;
+ clock-names = "spi_clk";
status = "disabled";
};
@@ -604,6 +910,8 @@
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
+ clocks = <&spi1_clk>;
+ clock-names = "spi_clk";
status = "disabled";
};
@@ -613,6 +921,8 @@
compatible = "atmel,at91sam9260-adc";
reg = <0xfffe0000 0x100>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&adc_clk>, <&adc_op_clk>;
+ clock-names = "adc_clk", "adc_op_clk";
atmel,adc-use-external-triggers;
atmel,adc-channels-used = <0xf>;
atmel,adc-vref = <3300>;
@@ -680,6 +990,8 @@
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00500000 0x100000>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>;
+ clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
status = "disabled";
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 09/34] ARM: at91/dt: sam9g20: define clocks
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Define the at91sam9g20 clocks that differ from at91sam9260 in the SoC dtsi file.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91sam9g20.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index b8e79466014f..31f7652612fc 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -25,6 +25,30 @@
adc0: adc@fffe0000 {
atmel,adc-startup-time = <40>;
};
+
+ pmc: pmc@fffffc00 {
+ plla: pllack {
+ atmel,clk-input-range = <2000000 32000000>;
+ atmel,pll-clk-output-ranges = <745000000 800000000 0 0>,
+ <695000000 750000000 1 0>,
+ <645000000 700000000 2 0>,
+ <595000000 650000000 3 0>,
+ <545000000 600000000 0 1>,
+ <495000000 550000000 1 1>,
+ <445000000 500000000 2 1>,
+ <400000000 450000000 3 1>;
+ };
+
+ pllb: pllbck {
+ atmel,clk-input-range = <2000000 32000000>;
+ atmel,pll-clk-output-ranges = <30000000 100000000 0 0>;
+ };
+
+ mck: masterck {
+ atmel,clk-output-range = <0 133000000>;
+ atmel,clk-divisors = <1 2 4 6>;
+ };
+ };
};
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 09/34] ARM: at91/dt: sam9g20: define clocks
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define the at91sam9g20 clocks that differ from at91sam9260 in the SoC dtsi file.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91sam9g20.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index b8e79466014f..31f7652612fc 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -25,6 +25,30 @@
adc0: adc at fffe0000 {
atmel,adc-startup-time = <40>;
};
+
+ pmc: pmc at fffffc00 {
+ plla: pllack {
+ atmel,clk-input-range = <2000000 32000000>;
+ atmel,pll-clk-output-ranges = <745000000 800000000 0 0>,
+ <695000000 750000000 1 0>,
+ <645000000 700000000 2 0>,
+ <595000000 650000000 3 0>,
+ <545000000 600000000 0 1>,
+ <495000000 550000000 1 1>,
+ <445000000 500000000 2 1>,
+ <400000000 450000000 3 1>;
+ };
+
+ pllb: pllbck {
+ atmel,clk-input-range = <2000000 32000000>;
+ atmel,pll-clk-output-ranges = <30000000 100000000 0 0>;
+ };
+
+ mck: masterck {
+ atmel,clk-output-range = <0 133000000>;
+ atmel,clk-divisors = <1 2 4 6>;
+ };
+ };
};
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 10/34] ARM: at91: move at91sam9260 SoCs to the CCF
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91sam9260
SoCs support. This will automatically enable COMMON_CLK_AT91 option and add
support for at91 common clk implementation.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index c818136a74b8..a2efe6e1e224 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -119,7 +119,6 @@ config SOC_AT91SAM9260
bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20"
select HAVE_AT91_DBGU0
select SOC_AT91SAM9
- select AT91_USE_OLD_CLK
select HAVE_AT91_USB_CLK
help
Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 10/34] ARM: at91: move at91sam9260 SoCs to the CCF
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91sam9260
SoCs support. This will automatically enable COMMON_CLK_AT91 option and add
support for at91 common clk implementation.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index c818136a74b8..a2efe6e1e224 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -119,7 +119,6 @@ config SOC_AT91SAM9260
bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20"
select HAVE_AT91_DBGU0
select SOC_AT91SAM9
- select AT91_USE_OLD_CLK
select HAVE_AT91_USB_CLK
help
Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 11/34] ARM: at91/dt: at91sam9g20ek: define crystals frequencies
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Define at91sam9g20ek main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
index cb2c010e08e2..d2919108e92d 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
@@ -26,6 +26,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <18432000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <18432000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 11/34] ARM: at91/dt: at91sam9g20ek: define crystals frequencies
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define at91sam9g20ek main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
index cb2c010e08e2..d2919108e92d 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
@@ -26,6 +26,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <18432000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <18432000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 12/34] ARM: at91/dt: foxg20: define crystals frequencies
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Define Acme Systems srl Fox G20 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91-foxg20.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91-foxg20.dts b/arch/arm/boot/dts/at91-foxg20.dts
index cbe967343997..f89598af4c2b 100644
--- a/arch/arm/boot/dts/at91-foxg20.dts
+++ b/arch/arm/boot/dts/at91-foxg20.dts
@@ -31,6 +31,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <18432000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <18432000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 12/34] ARM: at91/dt: foxg20: define crystals frequencies
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define Acme Systems srl Fox G20 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91-foxg20.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91-foxg20.dts b/arch/arm/boot/dts/at91-foxg20.dts
index cbe967343997..f89598af4c2b 100644
--- a/arch/arm/boot/dts/at91-foxg20.dts
+++ b/arch/arm/boot/dts/at91-foxg20.dts
@@ -31,6 +31,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <18432000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <18432000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 13/34] ARM: at91/dt: usb_a9260: define crystals frequencies
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni,
Gregory Hermant
Define Calao USB-A9260, USB-A9G20 and USB-A9G20-LPW main and slow crystals
frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Gregory Hermant <gregory.hermant@calao-systems.com>
---
arch/arm/boot/dts/usb_a9260_common.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/usb_a9260_common.dtsi b/arch/arm/boot/dts/usb_a9260_common.dtsi
index 285977682cf3..12edafefd44a 100644
--- a/arch/arm/boot/dts/usb_a9260_common.dtsi
+++ b/arch/arm/boot/dts/usb_a9260_common.dtsi
@@ -16,6 +16,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <12000000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 13/34] ARM: at91/dt: usb_a9260: define crystals frequencies
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define Calao USB-A9260, USB-A9G20 and USB-A9G20-LPW main and slow crystals
frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Gregory Hermant <gregory.hermant@calao-systems.com>
---
arch/arm/boot/dts/usb_a9260_common.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/usb_a9260_common.dtsi b/arch/arm/boot/dts/usb_a9260_common.dtsi
index 285977682cf3..12edafefd44a 100644
--- a/arch/arm/boot/dts/usb_a9260_common.dtsi
+++ b/arch/arm/boot/dts/usb_a9260_common.dtsi
@@ -16,6 +16,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <12000000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 14/34] ARM: at91/dt: tny_a9260: define crystals frequencies
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni,
Gregory Hermant
Define Calao TNY-A9260 and TNY-A9G20 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Gregory Hermant <gregory.hermant@calao-systems.com>
---
arch/arm/boot/dts/tny_a9260_common.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/tny_a9260_common.dtsi b/arch/arm/boot/dts/tny_a9260_common.dtsi
index 0e6d3de2e09e..ce7138c3af1b 100644
--- a/arch/arm/boot/dts/tny_a9260_common.dtsi
+++ b/arch/arm/boot/dts/tny_a9260_common.dtsi
@@ -24,6 +24,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <12000000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 14/34] ARM: at91/dt: tny_a9260: define crystals frequencies
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define Calao TNY-A9260 and TNY-A9G20 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Gregory Hermant <gregory.hermant@calao-systems.com>
---
arch/arm/boot/dts/tny_a9260_common.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/tny_a9260_common.dtsi b/arch/arm/boot/dts/tny_a9260_common.dtsi
index 0e6d3de2e09e..ce7138c3af1b 100644
--- a/arch/arm/boot/dts/tny_a9260_common.dtsi
+++ b/arch/arm/boot/dts/tny_a9260_common.dtsi
@@ -24,6 +24,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <12000000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 15/34] ARM: at91/dt: qil_a9260: define crystals frequencies
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni,
Gregory Hermant
Define Calao QIL-A9260 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Gregory Hermant <gregory.hermant@calao-systems.com>
---
arch/arm/boot/dts/at91-qil_a9260.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91-qil_a9260.dts b/arch/arm/boot/dts/at91-qil_a9260.dts
index 5576ae8786c0..a9aef53ab764 100644
--- a/arch/arm/boot/dts/at91-qil_a9260.dts
+++ b/arch/arm/boot/dts/at91-qil_a9260.dts
@@ -28,6 +28,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <12000000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 15/34] ARM: at91/dt: qil_a9260: define crystals frequencies
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define Calao QIL-A9260 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Gregory Hermant <gregory.hermant@calao-systems.com>
---
arch/arm/boot/dts/at91-qil_a9260.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91-qil_a9260.dts b/arch/arm/boot/dts/at91-qil_a9260.dts
index 5576ae8786c0..a9aef53ab764 100644
--- a/arch/arm/boot/dts/at91-qil_a9260.dts
+++ b/arch/arm/boot/dts/at91-qil_a9260.dts
@@ -28,6 +28,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <12000000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 16/34] ARM: at91/dt: mpa1600: define crytals frequencies
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni,
Joachim Eastwood
Define Phontech MPA 1600 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Joachim Eastwood <manabian@gmail.com>
---
arch/arm/boot/dts/mpa1600.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/mpa1600.dts b/arch/arm/boot/dts/mpa1600.dts
index ccf9ea242f72..f0f5e1098928 100644
--- a/arch/arm/boot/dts/mpa1600.dts
+++ b/arch/arm/boot/dts/mpa1600.dts
@@ -25,6 +25,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <18432000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <18432000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 16/34] ARM: at91/dt: mpa1600: define crytals frequencies
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define Phontech MPA 1600 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Joachim Eastwood <manabian@gmail.com>
---
arch/arm/boot/dts/mpa1600.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/mpa1600.dts b/arch/arm/boot/dts/mpa1600.dts
index ccf9ea242f72..f0f5e1098928 100644
--- a/arch/arm/boot/dts/mpa1600.dts
+++ b/arch/arm/boot/dts/mpa1600.dts
@@ -25,6 +25,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <18432000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <18432000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 17/34] ARM: at91/dt: ge863-pro3: define main crystal frequency
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Define Telit GE863-PRO3 main crystal frequency.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/ge863-pro3.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/ge863-pro3.dtsi b/arch/arm/boot/dts/ge863-pro3.dtsi
index 230099bb31c8..0d0e62489d93 100644
--- a/arch/arm/boot/dts/ge863-pro3.dtsi
+++ b/arch/arm/boot/dts/ge863-pro3.dtsi
@@ -19,6 +19,10 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <6000000>;
};
+
+ main_xtal {
+ clock-frequency = <6000000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 17/34] ARM: at91/dt: ge863-pro3: define main crystal frequency
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define Telit GE863-PRO3 main crystal frequency.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/ge863-pro3.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/ge863-pro3.dtsi b/arch/arm/boot/dts/ge863-pro3.dtsi
index 230099bb31c8..0d0e62489d93 100644
--- a/arch/arm/boot/dts/ge863-pro3.dtsi
+++ b/arch/arm/boot/dts/ge863-pro3.dtsi
@@ -19,6 +19,10 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <6000000>;
};
+
+ main_xtal {
+ clock-frequency = <6000000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 18/34] ARM: at91/dt: aks-cdu: define slow crytal frequency
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Define AK signal CDU slow crystal frequency
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/aks-cdu.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/aks-cdu.dts b/arch/arm/boot/dts/aks-cdu.dts
index 54cb5cf8604a..d9c50fbb49d2 100644
--- a/arch/arm/boot/dts/aks-cdu.dts
+++ b/arch/arm/boot/dts/aks-cdu.dts
@@ -16,6 +16,12 @@
bootargs = "console=ttyS0,115200 ubi.mtd=4 root=ubi0:rootfs rootfstype=ubifs";
};
+ clocks {
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+ };
+
ahb {
apb {
usart0: serial@fffb0000 {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 18/34] ARM: at91/dt: aks-cdu: define slow crytal frequency
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define AK signal CDU slow crystal frequency
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/aks-cdu.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/aks-cdu.dts b/arch/arm/boot/dts/aks-cdu.dts
index 54cb5cf8604a..d9c50fbb49d2 100644
--- a/arch/arm/boot/dts/aks-cdu.dts
+++ b/arch/arm/boot/dts/aks-cdu.dts
@@ -16,6 +16,12 @@
bootargs = "console=ttyS0,115200 ubi.mtd=4 root=ubi0:rootfs rootfstype=ubifs";
};
+ clocks {
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+ };
+
ahb {
apb {
usart0: serial at fffb0000 {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 19/34] ARM: at91/dt: evk-pro3: define slow crytal frequency
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Define Telit EVK-PRO3 slow crystal frequency
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/evk-pro3.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/evk-pro3.dts b/arch/arm/boot/dts/evk-pro3.dts
index 4d829685fdfb..f72969efe6d7 100644
--- a/arch/arm/boot/dts/evk-pro3.dts
+++ b/arch/arm/boot/dts/evk-pro3.dts
@@ -15,6 +15,12 @@
model = "Telit EVK-PRO3 for Telit GE863-PRO3";
compatible = "telit,evk-pro3", "atmel,at91sam9260", "atmel,at91sam9";
+ clocks {
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+ };
+
ahb {
apb {
macb0: ethernet@fffc4000 {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 19/34] ARM: at91/dt: evk-pro3: define slow crytal frequency
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define Telit EVK-PRO3 slow crystal frequency
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/evk-pro3.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/evk-pro3.dts b/arch/arm/boot/dts/evk-pro3.dts
index 4d829685fdfb..f72969efe6d7 100644
--- a/arch/arm/boot/dts/evk-pro3.dts
+++ b/arch/arm/boot/dts/evk-pro3.dts
@@ -15,6 +15,12 @@
model = "Telit EVK-PRO3 for Telit GE863-PRO3";
compatible = "telit,evk-pro3", "atmel,at91sam9260", "atmel,at91sam9";
+ clocks {
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+ };
+
ahb {
apb {
macb0: ethernet at fffc4000 {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 20/34] ARM: at91/dt: ethernut5: define crystals frequencies
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni,
Tim Schendekehl
Define egnite Ethernut 5 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Tim Schendekehl <tim.schendekehl@egnite.de>
---
arch/arm/boot/dts/ethernut5.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/ethernut5.dts b/arch/arm/boot/dts/ethernut5.dts
index 143b6d25bc80..8f941c2db7c6 100644
--- a/arch/arm/boot/dts/ethernut5.dts
+++ b/arch/arm/boot/dts/ethernut5.dts
@@ -20,6 +20,16 @@
reg = <0x20000000 0x08000000>;
};
+ clocks {
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <18432000>;
+ };
+ };
+
ahb {
apb {
dbgu: serial@fffff200 {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 20/34] ARM: at91/dt: ethernut5: define crystals frequencies
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define egnite Ethernut 5 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Tim Schendekehl <tim.schendekehl@egnite.de>
---
arch/arm/boot/dts/ethernut5.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/ethernut5.dts b/arch/arm/boot/dts/ethernut5.dts
index 143b6d25bc80..8f941c2db7c6 100644
--- a/arch/arm/boot/dts/ethernut5.dts
+++ b/arch/arm/boot/dts/ethernut5.dts
@@ -20,6 +20,16 @@
reg = <0x20000000 0x08000000>;
};
+ clocks {
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <18432000>;
+ };
+ };
+
ahb {
apb {
dbgu: serial at fffff200 {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 21/34] ARM: at91/dt: animeo_ip: define crystals frequencies
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Define Somfy Animeo IP main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/animeo_ip.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/animeo_ip.dts b/arch/arm/boot/dts/animeo_ip.dts
index 3c4f6d983cbd..4e0ad3b82796 100644
--- a/arch/arm/boot/dts/animeo_ip.dts
+++ b/arch/arm/boot/dts/animeo_ip.dts
@@ -40,6 +40,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <18432000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <18432000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 21/34] ARM: at91/dt: animeo_ip: define crystals frequencies
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define Somfy Animeo IP main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/animeo_ip.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/animeo_ip.dts b/arch/arm/boot/dts/animeo_ip.dts
index 3c4f6d983cbd..4e0ad3b82796 100644
--- a/arch/arm/boot/dts/animeo_ip.dts
+++ b/arch/arm/boot/dts/animeo_ip.dts
@@ -40,6 +40,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <18432000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <18432000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 22/34] ARM: at91/dt: kizbox: define main crystal frequency
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni, Gael Portay
Define kizbox board's main crystal frequency.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Gael Portay <g.portay@overkiz.com>
---
arch/arm/boot/dts/kizbox.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/kizbox.dts b/arch/arm/boot/dts/kizbox.dts
index 928f6eef2d59..e83e4f9310b8 100644
--- a/arch/arm/boot/dts/kizbox.dts
+++ b/arch/arm/boot/dts/kizbox.dts
@@ -30,6 +30,10 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <18432000>;
};
+
+ main_xtal {
+ clock-frequency = <18432000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 22/34] ARM: at91/dt: kizbox: define main crystal frequency
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define kizbox board's main crystal frequency.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Gael Portay <g.portay@overkiz.com>
---
arch/arm/boot/dts/kizbox.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/kizbox.dts b/arch/arm/boot/dts/kizbox.dts
index 928f6eef2d59..e83e4f9310b8 100644
--- a/arch/arm/boot/dts/kizbox.dts
+++ b/arch/arm/boot/dts/kizbox.dts
@@ -30,6 +30,10 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <18432000>;
};
+
+ main_xtal {
+ clock-frequency = <18432000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 23/34] ARM: at91: prepare common clk transition for sam9g45
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Enclose the sam9g45 old clk registration in "#if defined(CONFIG_OLD_CLK_AT91)
#endif"
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/at91sam9g45.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 9d3d544ac19c..0d5d85797cd6 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -25,10 +25,11 @@
#include "at91_aic.h"
#include "soc.h"
#include "generic.h"
-#include "clock.h"
#include "sam9_smc.h"
#include "pm.h"
+#if defined(CONFIG_OLD_CLK_AT91)
+#include "clock.h"
/* --------------------------------------------------------------------
* Clocks
* -------------------------------------------------------------------- */
@@ -331,6 +332,9 @@ static void __init at91sam9g45_register_clocks(void)
clk_register(&pck0);
clk_register(&pck1);
}
+#else
+#define at91sam9g45_register_clocks NULL
+#endif
/* --------------------------------------------------------------------
* GPIO
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 23/34] ARM: at91: prepare common clk transition for sam9g45
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Enclose the sam9g45 old clk registration in "#if defined(CONFIG_OLD_CLK_AT91)
#endif"
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/at91sam9g45.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 9d3d544ac19c..0d5d85797cd6 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -25,10 +25,11 @@
#include "at91_aic.h"
#include "soc.h"
#include "generic.h"
-#include "clock.h"
#include "sam9_smc.h"
#include "pm.h"
+#if defined(CONFIG_OLD_CLK_AT91)
+#include "clock.h"
/* --------------------------------------------------------------------
* Clocks
* -------------------------------------------------------------------- */
@@ -331,6 +332,9 @@ static void __init at91sam9g45_register_clocks(void)
clk_register(&pck0);
clk_register(&pck1);
}
+#else
+#define at91sam9g45_register_clocks NULL
+#endif
/* --------------------------------------------------------------------
* GPIO
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 24/34] ARM: at91/dt: sam9g45: define clocks
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Define the at91sam9g45 clocks in the SoC dtsi file.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91sam9g45.dtsi | 342 ++++++++++++++++++++++++++++++++++++-
1 file changed, 341 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index ace6bf197b70..932a669156af 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -14,6 +14,7 @@
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
/ {
model = "Atmel AT91SAM9G45 family SoC";
@@ -53,6 +54,26 @@
reg = <0x70000000 0x10000000>;
};
+ clocks {
+ slow_xtal: slow_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ main_xtal: main_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ adc_op_clk: adc_op_clk{
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <300000>;
+ };
+ };
+
ahb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -77,11 +98,279 @@
compatible = "atmel,at91sam9g45-ddramc";
reg = <0xffffe400 0x200
0xffffe600 0x200>;
+ clocks = <&ddrck>;
+ clock-names = "ddrck";
};
pmc: pmc@fffffc00 {
- compatible = "atmel,at91rm9200-pmc";
+ compatible = "atmel,at91sam9g45-pmc";
reg = <0xfffffc00 0x100>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+
+ main_osc: main_osc {
+ compatible = "atmel,at91rm9200-clk-main-osc";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MOSCS>;
+ clocks = <&main_xtal>;
+ };
+
+ main: mainck {
+ compatible = "atmel,at91rm9200-clk-main";
+ #clock-cells = <0>;
+ clocks = <&main_osc>;
+ };
+
+ plla: pllack {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKA>;
+ clocks = <&main>;
+ reg = <0>;
+ atmel,clk-input-range = <2000000 32000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <745000000 800000000 0 0
+ 695000000 750000000 1 0
+ 645000000 700000000 2 0
+ 595000000 650000000 3 0
+ 545000000 600000000 0 1
+ 495000000 555000000 1 1
+ 445000000 500000000 2 1
+ 400000000 450000000 3 1>;
+ };
+
+ plladiv: plladivck {
+ compatible = "atmel,at91sam9x5-clk-plldiv";
+ #clock-cells = <0>;
+ clocks = <&plla>;
+ };
+
+ utmi: utmick {
+ compatible = "atmel,at91sam9x5-clk-utmi";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKU>;
+ clocks = <&main>;
+ };
+
+ mck: masterck {
+ compatible = "atmel,at91rm9200-clk-master";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
+ clocks = <&slow_xtal>, <&main>, <&plladiv>, <&utmi>;
+ atmel,clk-output-range = <0 133333333>;
+ atmel,clk-divisors = <1 2 4 3>;
+ };
+
+ usb: usbck {
+ compatible = "atmel,at91sam9x5-clk-usb";
+ #clock-cells = <0>;
+ clocks = <&plladiv>, <&utmi>;
+ };
+
+ prog: progck {
+ compatible = "atmel,at91sam9g45-clk-programmable";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&pmc>;
+ clocks = <&slow_xtal>, <&main>, <&plladiv>, <&utmi>, <&mck>;
+
+ prog0: prog0 {
+ #clock-cells = <0>;
+ reg = <0>;
+ interrupts = <AT91_PMC_PCKRDY(0)>;
+ };
+
+ prog1: prog1 {
+ #clock-cells = <0>;
+ reg = <1>;
+ interrupts = <AT91_PMC_PCKRDY(1)>;
+ };
+ };
+
+ systemck {
+ compatible = "atmel,at91rm9200-clk-system";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ddrck: ddrck {
+ #clock-cells = <0>;
+ reg = <2>;
+ clocks = <&mck>;
+ };
+
+ uhpck: uhpck {
+ #clock-cells = <0>;
+ reg = <6>;
+ clocks = <&usb>;
+ };
+
+ pck0: pck0 {
+ #clock-cells = <0>;
+ reg = <8>;
+ clocks = <&prog0>;
+ };
+
+ pck1: pck1 {
+ #clock-cells = <0>;
+ reg = <9>;
+ clocks = <&prog1>;
+ };
+ };
+
+ periphck {
+ compatible = "atmel,at91rm9200-clk-peripheral";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&mck>;
+
+ pioA_clk: pioA_clk {
+ #clock-cells = <0>;
+ reg = <2>;
+ };
+
+ pioB_clk: pioB_clk {
+ #clock-cells = <0>;
+ reg = <3>;
+ };
+
+ pioC_clk: pioC_clk {
+ #clock-cells = <0>;
+ reg = <4>;
+ };
+
+ pioDE_clk: pioDE_clk {
+ #clock-cells = <0>;
+ reg = <5>;
+ };
+
+ trng_clk: trng_clk {
+ #clock-cells = <0>;
+ reg = <6>;
+ };
+
+ usart0_clk: usart0_clk {
+ #clock-cells = <0>;
+ reg = <7>;
+ };
+
+ usart1_clk: usart1_clk {
+ #clock-cells = <0>;
+ reg = <8>;
+ };
+
+ usart2_clk: usart2_clk {
+ #clock-cells = <0>;
+ reg = <9>;
+ };
+
+ usart3_clk: usart3_clk {
+ #clock-cells = <0>;
+ reg = <10>;
+ };
+
+ mci0_clk: mci0_clk {
+ #clock-cells = <0>;
+ reg = <11>;
+ };
+
+ twi0_clk: twi0_clk {
+ #clock-cells = <0>;
+ reg = <12>;
+ };
+
+ twi1_clk: twi1_clk {
+ #clock-cells = <0>;
+ reg = <13>;
+ };
+
+ spi0_clk: spi0_clk {
+ #clock-cells = <0>;
+ reg = <14>;
+ };
+
+ spi1_clk: spi1_clk {
+ #clock-cells = <0>;
+ reg = <15>;
+ };
+
+ ssc0_clk: ssc0_clk {
+ #clock-cells = <0>;
+ reg = <16>;
+ };
+
+ ssc1_clk: ssc1_clk {
+ #clock-cells = <0>;
+ reg = <17>;
+ };
+
+ tcb0_clk: tcb0_clk {
+ #clock-cells = <0>;
+ reg = <18>;
+ };
+
+ pwm_clk: pwm_clk {
+ #clock-cells = <0>;
+ reg = <19>;
+ };
+
+ adc_clk: adc_clk {
+ #clock-cells = <0>;
+ reg = <20>;
+ };
+
+ dma0_clk: dma0_clk {
+ #clock-cells = <0>;
+ reg = <21>;
+ };
+
+ uhphs_clk: uhphs_clk {
+ #clock-cells = <0>;
+ reg = <22>;
+ };
+
+ lcd_clk: lcd_clk {
+ #clock-cells = <0>;
+ reg = <23>;
+ };
+
+ ac97_clk: ac97_clk {
+ #clock-cells = <0>;
+ reg = <24>;
+ };
+
+ macb0_clk: macb0_clk {
+ #clock-cells = <0>;
+ reg = <25>;
+ };
+
+ isi_clk: isi_clk {
+ #clock-cells = <0>;
+ reg = <26>;
+ };
+
+ udphs_clk: udphs_clk {
+ #clock-cells = <0>;
+ reg = <27>;
+ };
+
+ aestdessha_clk: aestdessha_clk {
+ #clock-cells = <0>;
+ reg = <28>;
+ };
+
+ mci1_clk: mci1_clk {
+ #clock-cells = <0>;
+ reg = <29>;
+ };
+
+ vdec_clk: vdec_clk {
+ #clock-cells = <0>;
+ reg = <30>;
+ };
+ };
};
rstc@fffffd00 {
@@ -93,6 +382,7 @@
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&mck>;
};
@@ -105,12 +395,16 @@
compatible = "atmel,at91rm9200-tcb";
reg = <0xfff7c000 0x100>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>;
+ clock-names = "t0_clk", "t1_clk", "t2_clk";
};
tcb1: timer@fffd4000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffd4000 0x100>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>;
+ clock-names = "t0_clk", "t1_clk", "t2_clk";
};
dma: dma-controller@ffffec00 {
@@ -118,6 +412,8 @@
reg = <0xffffec00 0x200>;
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <2>;
+ clocks = <&dma0_clk>;
+ clock-names = "dma_clk";
};
pinctrl@fffff200 {
@@ -516,6 +812,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioA_clk>;
};
pioB: gpio@fffff400 {
@@ -526,6 +823,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioB_clk>;
};
pioC: gpio@fffff600 {
@@ -536,6 +834,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioC_clk>;
};
pioD: gpio@fffff800 {
@@ -546,6 +845,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioDE_clk>;
};
pioE: gpio@fffffa00 {
@@ -556,6 +856,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioDE_clk>;
};
};
@@ -565,6 +866,8 @@
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
+ clocks = <&mck>;
+ clock-names = "usart";
status = "disabled";
};
@@ -576,6 +879,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>;
+ clocks = <&usart0_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -587,6 +892,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>;
+ clocks = <&usart1_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -598,6 +905,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>;
+ clocks = <&usart2_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -609,6 +918,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3>;
+ clocks = <&usart3_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -618,6 +929,8 @@
interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb_rmii>;
+ clocks = <&macb0_clk>, <&macb0_clk>;
+ clock-names = "hclk", "pclk";
status = "disabled";
};
@@ -629,6 +942,7 @@
pinctrl-0 = <&pinctrl_i2c0>;
#address-cells = <1>;
#size-cells = <0>;
+ clocks = <&twi0_clk>;
status = "disabled";
};
@@ -640,6 +954,7 @@
pinctrl-0 = <&pinctrl_i2c1>;
#address-cells = <1>;
#size-cells = <0>;
+ clocks = <&twi1_clk>;
status = "disabled";
};
@@ -649,6 +964,8 @@
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+ clocks = <&ssc0_clk>;
+ clock-names = "pclk";
status = "disabled";
};
@@ -658,6 +975,8 @@
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
+ clocks = <&ssc1_clk>;
+ clock-names = "pclk";
status = "disabled";
};
@@ -667,6 +986,8 @@
compatible = "atmel,at91sam9g45-adc";
reg = <0xfffb0000 0x100>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&adc_clk>, <&adc_op_clk>;
+ clock-names = "adc_clk", "adc_op_clk";
atmel,adc-channels-used = <0xff>;
atmel,adc-vref = <3300>;
atmel,adc-startup-time = <40>;
@@ -706,6 +1027,7 @@
reg = <0xfffb8000 0x300>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
#pwm-cells = <3>;
+ clocks = <&pwm_clk>;
status = "disabled";
};
@@ -718,6 +1040,8 @@
dma-names = "rxtx";
#address-cells = <1>;
#size-cells = <0>;
+ clocks = <&mci0_clk>;
+ clock-names = "mci_clk";
status = "disabled";
};
@@ -730,6 +1054,8 @@
dma-names = "rxtx";
#address-cells = <1>;
#size-cells = <0>;
+ clocks = <&mci1_clk>;
+ clock-names = "mci_clk";
status = "disabled";
};
@@ -752,6 +1078,8 @@
interrupts = <14 4 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
+ clocks = <&spi0_clk>;
+ clock-names = "spi_clk";
status = "disabled";
};
@@ -763,6 +1091,8 @@
interrupts = <15 4 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
+ clocks = <&spi1_clk>;
+ clock-names = "spi_clk";
status = "disabled";
};
@@ -773,6 +1103,8 @@
reg = <0x00600000 0x80000
0xfff78000 0x400>;
interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&udphs_clk>, <&utmi>;
+ clock-names = "pclk", "hclk";
status = "disabled";
ep0 {
@@ -835,6 +1167,8 @@
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fb>;
+ clocks = <&lcd_clk>, <&lcd_clk>;
+ clock-names = "hclk", "lcdc_clk";
status = "disabled";
};
@@ -861,6 +1195,9 @@
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00700000 0x100000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
+ //TODO
+ clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
+ clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
status = "disabled";
};
@@ -868,6 +1205,9 @@
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00800000 0x100000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
+ //TODO
+ clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
+ clock-names = "usb_clk", "ehci_clk", "hclk", "uhpck";
status = "disabled";
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 24/34] ARM: at91/dt: sam9g45: define clocks
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define the at91sam9g45 clocks in the SoC dtsi file.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91sam9g45.dtsi | 342 ++++++++++++++++++++++++++++++++++++-
1 file changed, 341 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index ace6bf197b70..932a669156af 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -14,6 +14,7 @@
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
/ {
model = "Atmel AT91SAM9G45 family SoC";
@@ -53,6 +54,26 @@
reg = <0x70000000 0x10000000>;
};
+ clocks {
+ slow_xtal: slow_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ main_xtal: main_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ adc_op_clk: adc_op_clk{
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <300000>;
+ };
+ };
+
ahb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -77,11 +98,279 @@
compatible = "atmel,at91sam9g45-ddramc";
reg = <0xffffe400 0x200
0xffffe600 0x200>;
+ clocks = <&ddrck>;
+ clock-names = "ddrck";
};
pmc: pmc at fffffc00 {
- compatible = "atmel,at91rm9200-pmc";
+ compatible = "atmel,at91sam9g45-pmc";
reg = <0xfffffc00 0x100>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+
+ main_osc: main_osc {
+ compatible = "atmel,at91rm9200-clk-main-osc";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MOSCS>;
+ clocks = <&main_xtal>;
+ };
+
+ main: mainck {
+ compatible = "atmel,at91rm9200-clk-main";
+ #clock-cells = <0>;
+ clocks = <&main_osc>;
+ };
+
+ plla: pllack {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKA>;
+ clocks = <&main>;
+ reg = <0>;
+ atmel,clk-input-range = <2000000 32000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <745000000 800000000 0 0
+ 695000000 750000000 1 0
+ 645000000 700000000 2 0
+ 595000000 650000000 3 0
+ 545000000 600000000 0 1
+ 495000000 555000000 1 1
+ 445000000 500000000 2 1
+ 400000000 450000000 3 1>;
+ };
+
+ plladiv: plladivck {
+ compatible = "atmel,at91sam9x5-clk-plldiv";
+ #clock-cells = <0>;
+ clocks = <&plla>;
+ };
+
+ utmi: utmick {
+ compatible = "atmel,at91sam9x5-clk-utmi";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKU>;
+ clocks = <&main>;
+ };
+
+ mck: masterck {
+ compatible = "atmel,at91rm9200-clk-master";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
+ clocks = <&slow_xtal>, <&main>, <&plladiv>, <&utmi>;
+ atmel,clk-output-range = <0 133333333>;
+ atmel,clk-divisors = <1 2 4 3>;
+ };
+
+ usb: usbck {
+ compatible = "atmel,at91sam9x5-clk-usb";
+ #clock-cells = <0>;
+ clocks = <&plladiv>, <&utmi>;
+ };
+
+ prog: progck {
+ compatible = "atmel,at91sam9g45-clk-programmable";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&pmc>;
+ clocks = <&slow_xtal>, <&main>, <&plladiv>, <&utmi>, <&mck>;
+
+ prog0: prog0 {
+ #clock-cells = <0>;
+ reg = <0>;
+ interrupts = <AT91_PMC_PCKRDY(0)>;
+ };
+
+ prog1: prog1 {
+ #clock-cells = <0>;
+ reg = <1>;
+ interrupts = <AT91_PMC_PCKRDY(1)>;
+ };
+ };
+
+ systemck {
+ compatible = "atmel,at91rm9200-clk-system";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ddrck: ddrck {
+ #clock-cells = <0>;
+ reg = <2>;
+ clocks = <&mck>;
+ };
+
+ uhpck: uhpck {
+ #clock-cells = <0>;
+ reg = <6>;
+ clocks = <&usb>;
+ };
+
+ pck0: pck0 {
+ #clock-cells = <0>;
+ reg = <8>;
+ clocks = <&prog0>;
+ };
+
+ pck1: pck1 {
+ #clock-cells = <0>;
+ reg = <9>;
+ clocks = <&prog1>;
+ };
+ };
+
+ periphck {
+ compatible = "atmel,at91rm9200-clk-peripheral";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&mck>;
+
+ pioA_clk: pioA_clk {
+ #clock-cells = <0>;
+ reg = <2>;
+ };
+
+ pioB_clk: pioB_clk {
+ #clock-cells = <0>;
+ reg = <3>;
+ };
+
+ pioC_clk: pioC_clk {
+ #clock-cells = <0>;
+ reg = <4>;
+ };
+
+ pioDE_clk: pioDE_clk {
+ #clock-cells = <0>;
+ reg = <5>;
+ };
+
+ trng_clk: trng_clk {
+ #clock-cells = <0>;
+ reg = <6>;
+ };
+
+ usart0_clk: usart0_clk {
+ #clock-cells = <0>;
+ reg = <7>;
+ };
+
+ usart1_clk: usart1_clk {
+ #clock-cells = <0>;
+ reg = <8>;
+ };
+
+ usart2_clk: usart2_clk {
+ #clock-cells = <0>;
+ reg = <9>;
+ };
+
+ usart3_clk: usart3_clk {
+ #clock-cells = <0>;
+ reg = <10>;
+ };
+
+ mci0_clk: mci0_clk {
+ #clock-cells = <0>;
+ reg = <11>;
+ };
+
+ twi0_clk: twi0_clk {
+ #clock-cells = <0>;
+ reg = <12>;
+ };
+
+ twi1_clk: twi1_clk {
+ #clock-cells = <0>;
+ reg = <13>;
+ };
+
+ spi0_clk: spi0_clk {
+ #clock-cells = <0>;
+ reg = <14>;
+ };
+
+ spi1_clk: spi1_clk {
+ #clock-cells = <0>;
+ reg = <15>;
+ };
+
+ ssc0_clk: ssc0_clk {
+ #clock-cells = <0>;
+ reg = <16>;
+ };
+
+ ssc1_clk: ssc1_clk {
+ #clock-cells = <0>;
+ reg = <17>;
+ };
+
+ tcb0_clk: tcb0_clk {
+ #clock-cells = <0>;
+ reg = <18>;
+ };
+
+ pwm_clk: pwm_clk {
+ #clock-cells = <0>;
+ reg = <19>;
+ };
+
+ adc_clk: adc_clk {
+ #clock-cells = <0>;
+ reg = <20>;
+ };
+
+ dma0_clk: dma0_clk {
+ #clock-cells = <0>;
+ reg = <21>;
+ };
+
+ uhphs_clk: uhphs_clk {
+ #clock-cells = <0>;
+ reg = <22>;
+ };
+
+ lcd_clk: lcd_clk {
+ #clock-cells = <0>;
+ reg = <23>;
+ };
+
+ ac97_clk: ac97_clk {
+ #clock-cells = <0>;
+ reg = <24>;
+ };
+
+ macb0_clk: macb0_clk {
+ #clock-cells = <0>;
+ reg = <25>;
+ };
+
+ isi_clk: isi_clk {
+ #clock-cells = <0>;
+ reg = <26>;
+ };
+
+ udphs_clk: udphs_clk {
+ #clock-cells = <0>;
+ reg = <27>;
+ };
+
+ aestdessha_clk: aestdessha_clk {
+ #clock-cells = <0>;
+ reg = <28>;
+ };
+
+ mci1_clk: mci1_clk {
+ #clock-cells = <0>;
+ reg = <29>;
+ };
+
+ vdec_clk: vdec_clk {
+ #clock-cells = <0>;
+ reg = <30>;
+ };
+ };
};
rstc at fffffd00 {
@@ -93,6 +382,7 @@
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&mck>;
};
@@ -105,12 +395,16 @@
compatible = "atmel,at91rm9200-tcb";
reg = <0xfff7c000 0x100>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>;
+ clock-names = "t0_clk", "t1_clk", "t2_clk";
};
tcb1: timer at fffd4000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffd4000 0x100>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>;
+ clock-names = "t0_clk", "t1_clk", "t2_clk";
};
dma: dma-controller at ffffec00 {
@@ -118,6 +412,8 @@
reg = <0xffffec00 0x200>;
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <2>;
+ clocks = <&dma0_clk>;
+ clock-names = "dma_clk";
};
pinctrl at fffff200 {
@@ -516,6 +812,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioA_clk>;
};
pioB: gpio at fffff400 {
@@ -526,6 +823,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioB_clk>;
};
pioC: gpio at fffff600 {
@@ -536,6 +834,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioC_clk>;
};
pioD: gpio at fffff800 {
@@ -546,6 +845,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioDE_clk>;
};
pioE: gpio at fffffa00 {
@@ -556,6 +856,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioDE_clk>;
};
};
@@ -565,6 +866,8 @@
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
+ clocks = <&mck>;
+ clock-names = "usart";
status = "disabled";
};
@@ -576,6 +879,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>;
+ clocks = <&usart0_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -587,6 +892,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>;
+ clocks = <&usart1_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -598,6 +905,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>;
+ clocks = <&usart2_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -609,6 +918,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3>;
+ clocks = <&usart3_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -618,6 +929,8 @@
interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb_rmii>;
+ clocks = <&macb0_clk>, <&macb0_clk>;
+ clock-names = "hclk", "pclk";
status = "disabled";
};
@@ -629,6 +942,7 @@
pinctrl-0 = <&pinctrl_i2c0>;
#address-cells = <1>;
#size-cells = <0>;
+ clocks = <&twi0_clk>;
status = "disabled";
};
@@ -640,6 +954,7 @@
pinctrl-0 = <&pinctrl_i2c1>;
#address-cells = <1>;
#size-cells = <0>;
+ clocks = <&twi1_clk>;
status = "disabled";
};
@@ -649,6 +964,8 @@
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+ clocks = <&ssc0_clk>;
+ clock-names = "pclk";
status = "disabled";
};
@@ -658,6 +975,8 @@
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
+ clocks = <&ssc1_clk>;
+ clock-names = "pclk";
status = "disabled";
};
@@ -667,6 +986,8 @@
compatible = "atmel,at91sam9g45-adc";
reg = <0xfffb0000 0x100>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&adc_clk>, <&adc_op_clk>;
+ clock-names = "adc_clk", "adc_op_clk";
atmel,adc-channels-used = <0xff>;
atmel,adc-vref = <3300>;
atmel,adc-startup-time = <40>;
@@ -706,6 +1027,7 @@
reg = <0xfffb8000 0x300>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
#pwm-cells = <3>;
+ clocks = <&pwm_clk>;
status = "disabled";
};
@@ -718,6 +1040,8 @@
dma-names = "rxtx";
#address-cells = <1>;
#size-cells = <0>;
+ clocks = <&mci0_clk>;
+ clock-names = "mci_clk";
status = "disabled";
};
@@ -730,6 +1054,8 @@
dma-names = "rxtx";
#address-cells = <1>;
#size-cells = <0>;
+ clocks = <&mci1_clk>;
+ clock-names = "mci_clk";
status = "disabled";
};
@@ -752,6 +1078,8 @@
interrupts = <14 4 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
+ clocks = <&spi0_clk>;
+ clock-names = "spi_clk";
status = "disabled";
};
@@ -763,6 +1091,8 @@
interrupts = <15 4 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
+ clocks = <&spi1_clk>;
+ clock-names = "spi_clk";
status = "disabled";
};
@@ -773,6 +1103,8 @@
reg = <0x00600000 0x80000
0xfff78000 0x400>;
interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&udphs_clk>, <&utmi>;
+ clock-names = "pclk", "hclk";
status = "disabled";
ep0 {
@@ -835,6 +1167,8 @@
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fb>;
+ clocks = <&lcd_clk>, <&lcd_clk>;
+ clock-names = "hclk", "lcdc_clk";
status = "disabled";
};
@@ -861,6 +1195,9 @@
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00700000 0x100000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
+ //TODO
+ clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
+ clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
status = "disabled";
};
@@ -868,6 +1205,9 @@
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00800000 0x100000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
+ //TODO
+ clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
+ clock-names = "usb_clk", "ehci_clk", "hclk", "uhpck";
status = "disabled";
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 25/34] ARM: at91: move at91sam9g45 SoC to the CCF
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91sam9g45
SoC support. This will automatically enable COMMON_CLK_AT91 option and add
support for at91 common clock implementation.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index a2efe6e1e224..461966d0ee4d 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -153,7 +153,6 @@ config SOC_AT91SAM9G45
select HAVE_AT91_DBGU1
select HAVE_FB_ATMEL
select SOC_AT91SAM9
- select AT91_USE_OLD_CLK
select HAVE_AT91_UTMI
select HAVE_AT91_USB_CLK
help
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 25/34] ARM: at91: move at91sam9g45 SoC to the CCF
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91sam9g45
SoC support. This will automatically enable COMMON_CLK_AT91 option and add
support for at91 common clock implementation.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index a2efe6e1e224..461966d0ee4d 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -153,7 +153,6 @@ config SOC_AT91SAM9G45
select HAVE_AT91_DBGU1
select HAVE_FB_ATMEL
select SOC_AT91SAM9
- select AT91_USE_OLD_CLK
select HAVE_AT91_UTMI
select HAVE_AT91_USB_CLK
help
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 26/34] ARM: at91/dt: sam9m10g45ek: define crystals frequencies
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Define at91sam9m10g45ek main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91sam9m10g45ek.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 9f5b0a674995..96ccc7de4f0a 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -31,6 +31,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <12000000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 26/34] ARM: at91/dt: sam9m10g45ek: define crystals frequencies
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define at91sam9m10g45ek main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91sam9m10g45ek.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 9f5b0a674995..96ccc7de4f0a 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -31,6 +31,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <12000000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 27/34] ARM: at91/dt: pm9g45: crystals frequencies
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Define Ronetix pm9g45 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/pm9g45.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/pm9g45.dts b/arch/arm/boot/dts/pm9g45.dts
index 33ffabe9c4c8..66afcff67fde 100644
--- a/arch/arm/boot/dts/pm9g45.dts
+++ b/arch/arm/boot/dts/pm9g45.dts
@@ -29,6 +29,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <12000000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 27/34] ARM: at91/dt: pm9g45: crystals frequencies
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define Ronetix pm9g45 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/pm9g45.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/pm9g45.dts b/arch/arm/boot/dts/pm9g45.dts
index 33ffabe9c4c8..66afcff67fde 100644
--- a/arch/arm/boot/dts/pm9g45.dts
+++ b/arch/arm/boot/dts/pm9g45.dts
@@ -29,6 +29,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <12000000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 28/34] ARM: at91/dt: cosino define crystals frequencies
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni,
Rodolfo Giometti
Define Cosino boards main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Rodolfo Giometti <giometti@linux.it>
---
arch/arm/boot/dts/at91-cosino.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91-cosino.dtsi b/arch/arm/boot/dts/at91-cosino.dtsi
index df4b78695695..b6ea3f4a7206 100644
--- a/arch/arm/boot/dts/at91-cosino.dtsi
+++ b/arch/arm/boot/dts/at91-cosino.dtsi
@@ -34,6 +34,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <12000000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 28/34] ARM: at91/dt: cosino define crystals frequencies
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define Cosino boards main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Rodolfo Giometti <giometti@linux.it>
---
arch/arm/boot/dts/at91-cosino.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91-cosino.dtsi b/arch/arm/boot/dts/at91-cosino.dtsi
index df4b78695695..b6ea3f4a7206 100644
--- a/arch/arm/boot/dts/at91-cosino.dtsi
+++ b/arch/arm/boot/dts/at91-cosino.dtsi
@@ -34,6 +34,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <12000000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 29/34] ARM: at91: prepare common clk transition for sam9263
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Enclose the sam9263 old clk registration in "#if defined(CONFIG_OLD_CLK_AT91)
#endif"
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/at91sam9263.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index f30290572293..c07465361947 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -25,10 +25,11 @@
#include "at91_rstc.h"
#include "soc.h"
#include "generic.h"
-#include "clock.h"
#include "sam9_smc.h"
#include "pm.h"
+#if defined(CONFIG_OLD_CLK_AT91)
+#include "clock.h"
/* --------------------------------------------------------------------
* Clocks
* -------------------------------------------------------------------- */
@@ -280,6 +281,9 @@ static void __init at91sam9263_register_clocks(void)
clk_register(&pck2);
clk_register(&pck3);
}
+#else
+#define at91sam9263_register_clocks NULL
+#endif
/* --------------------------------------------------------------------
* GPIO
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 29/34] ARM: at91: prepare common clk transition for sam9263
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Enclose the sam9263 old clk registration in "#if defined(CONFIG_OLD_CLK_AT91)
#endif"
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/at91sam9263.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index f30290572293..c07465361947 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -25,10 +25,11 @@
#include "at91_rstc.h"
#include "soc.h"
#include "generic.h"
-#include "clock.h"
#include "sam9_smc.h"
#include "pm.h"
+#if defined(CONFIG_OLD_CLK_AT91)
+#include "clock.h"
/* --------------------------------------------------------------------
* Clocks
* -------------------------------------------------------------------- */
@@ -280,6 +281,9 @@ static void __init at91sam9263_register_clocks(void)
clk_register(&pck2);
clk_register(&pck3);
}
+#else
+#define at91sam9263_register_clocks NULL
+#endif
/* --------------------------------------------------------------------
* GPIO
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 30/34] ARM: at91/dt: sam9263: define clocks
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Define the at91sam9263 clocks in the SoC dtsi file.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91sam9263.dtsi | 311 +++++++++++++++++++++++++++++++++++++
1 file changed, 311 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index fece8665fb63..bb23c2d33cf8 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -10,6 +10,7 @@
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
/ {
model = "Atmel AT91SAM9263 family SoC";
@@ -32,6 +33,7 @@
ssc1 = &ssc1;
pwm0 = &pwm0;
};
+
cpus {
#address-cells = <0>;
#size-cells = <0>;
@@ -46,6 +48,20 @@
reg = <0x20000000 0x08000000>;
};
+ clocks {
+ main_xtal: main_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ slow_xtal: slow_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ };
+
ahb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -69,6 +85,264 @@
pmc: pmc@fffffc00 {
compatible = "atmel,at91rm9200-pmc";
reg = <0xfffffc00 0x100>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+
+ main_osc: main_osc {
+ compatible = "atmel,at91rm9200-clk-main-osc";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MOSCS>;
+ clocks = <&main_xtal>;
+ };
+
+ main: mainck {
+ compatible = "atmel,at91rm9200-clk-main";
+ #clock-cells = <0>;
+ clocks = <&main_osc>;
+ };
+
+ plla: pllack {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKA>;
+ clocks = <&main>;
+ reg = <0>;
+ atmel,clk-input-range = <1000000 32000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
+ <190000000 240000000 2 1>;
+ };
+
+ pllb: pllbck {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKB>;
+ clocks = <&main>;
+ reg = <1>;
+ atmel,clk-input-range = <1000000 5000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
+ };
+
+ mck: masterck {
+ compatible = "atmel,at91rm9200-clk-master";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
+ clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
+ atmel,clk-output-range = <0 120000000>;
+ atmel,clk-divisors = <1 2 4 0>;
+ };
+
+ usb: usbck {
+ compatible = "atmel,at91rm9200-clk-usb";
+ #clock-cells = <0>;
+ atmel,clk-divisors = <1 2 4 0>;
+ clocks = <&pllb>;
+ };
+
+ prog: progck {
+ compatible = "atmel,at91rm9200-clk-programmable";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&pmc>;
+ clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
+
+ prog0: prog0 {
+ #clock-cells = <0>;
+ reg = <0>;
+ interrupts = <AT91_PMC_PCKRDY(0)>;
+ };
+
+ prog1: prog1 {
+ #clock-cells = <0>;
+ reg = <1>;
+ interrupts = <AT91_PMC_PCKRDY(1)>;
+ };
+
+ prog2: prog2 {
+ #clock-cells = <0>;
+ reg = <2>;
+ interrupts = <AT91_PMC_PCKRDY(2)>;
+ };
+
+ prog3: prog3 {
+ #clock-cells = <0>;
+ reg = <3>;
+ interrupts = <AT91_PMC_PCKRDY(3)>;
+ };
+ };
+
+ systemck {
+ compatible = "atmel,at91rm9200-clk-system";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ uhpck: uhpck {
+ #clock-cells = <0>;
+ reg = <6>;
+ clocks = <&usb>;
+ };
+
+ udpck: udpck {
+ #clock-cells = <0>;
+ reg = <7>;
+ clocks = <&usb>;
+ };
+
+ pck0: pck0 {
+ #clock-cells = <0>;
+ reg = <8>;
+ clocks = <&prog0>;
+ };
+
+ pck1: pck1 {
+ #clock-cells = <0>;
+ reg = <9>;
+ clocks = <&prog1>;
+ };
+
+ pck2: pck2 {
+ #clock-cells = <0>;
+ reg = <10>;
+ clocks = <&prog2>;
+ };
+
+ pck3: pck3 {
+ #clock-cells = <0>;
+ reg = <11>;
+ clocks = <&prog3>;
+ };
+ };
+
+ periphck {
+ compatible = "atmel,at91rm9200-clk-peripheral";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&mck>;
+
+ pioA_clk: pioA_clk {
+ #clock-cells = <0>;
+ reg = <2>;
+ };
+
+ pioB_clk: pioB_clk {
+ #clock-cells = <0>;
+ reg = <3>;
+ };
+
+ pioCDE_clk: pioCDE_clk {
+ #clock-cells = <0>;
+ reg = <4>;
+ };
+
+ usart0_clk: usart0_clk {
+ #clock-cells = <0>;
+ reg = <7>;
+ };
+
+ usart1_clk: usart1_clk {
+ #clock-cells = <0>;
+ reg = <8>;
+ };
+
+ usart2_clk: usart2_clk {
+ #clock-cells = <0>;
+ reg = <9>;
+ };
+
+ mci0_clk: mci0_clk {
+ #clock-cells = <0>;
+ reg = <10>;
+ };
+
+ mci1_clk: mci1_clk {
+ #clock-cells = <0>;
+ reg = <11>;
+ };
+
+ can_clk: can_clk {
+ #clock-cells = <0>;
+ reg = <12>;
+ };
+
+ twi0_clk: twi0_clk {
+ #clock-cells = <0>;
+ reg = <13>;
+ };
+
+ spi0_clk: spi0_clk {
+ #clock-cells = <0>;
+ reg = <14>;
+ };
+
+ spi1_clk: spi1_clk {
+ #clock-cells = <0>;
+ reg = <15>;
+ };
+
+ ssc0_clk: ssc0_clk {
+ #clock-cells = <0>;
+ reg = <16>;
+ };
+
+ ssc1_clk: ssc1_clk {
+ #clock-cells = <0>;
+ reg = <17>;
+ };
+
+ ac91_clk: ac97_clk {
+ #clock-cells = <0>;
+ reg = <18>;
+ };
+
+ tcb_clk: tcb_clk {
+ #clock-cells = <0>;
+ reg = <19>;
+ };
+
+ pwm_clk: pwm_clk {
+ #clock-cells = <0>;
+ reg = <20>;
+ };
+
+ macb0_clk: macb0_clk {
+ #clock-cells = <0>;
+ reg = <21>;
+ };
+
+ g2de_clk: g2de_clk {
+ #clock-cells = <0>;
+ reg = <23>;
+ };
+
+ udc_clk: udc_clk {
+ #clock-cells = <0>;
+ reg = <24>;
+ };
+
+ isi_clk: isi_clk {
+ #clock-cells = <0>;
+ reg = <25>;
+ };
+
+ lcd_clk: lcd_clk {
+ #clock-cells = <0>;
+ reg = <26>;
+ };
+
+ dma_clk: dma_clk {
+ #clock-cells = <0>;
+ reg = <27>;
+ };
+
+ ohci_clk: ohci_clk {
+ #clock-cells = <0>;
+ reg = <29>;
+ };
+ };
};
ramc: ramc@ffffe200 {
@@ -81,12 +355,15 @@
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&mck>;
};
tcb0: timer@fff7c000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfff7c000 0x100>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tcb_clk>;
+ clock-names = "t0_clk";
};
rstc@fffffd00 {
@@ -403,6 +680,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioA_clk>;
};
pioB: gpio@fffff400 {
@@ -413,6 +691,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioB_clk>;
};
pioC: gpio@fffff600 {
@@ -423,6 +702,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioCDE_clk>;
};
pioD: gpio@fffff800 {
@@ -433,6 +713,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioCDE_clk>;
};
pioE: gpio@fffffa00 {
@@ -443,6 +724,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioCDE_clk>;
};
};
@@ -452,6 +734,8 @@
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
+ clocks = <&mck>;
+ clock-names = "usart";
status = "disabled";
};
@@ -463,6 +747,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>;
+ clocks = <&usart0_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -474,6 +760,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>;
+ clocks = <&usart1_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -485,6 +773,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>;
+ clocks = <&usart2_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -494,6 +784,8 @@
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+ clocks = <&ssc0_clk>;
+ clock-names = "pclk";
status = "disabled";
};
@@ -503,6 +795,8 @@
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
+ clocks = <&ssc1_clk>;
+ clock-names = "pclk";
status = "disabled";
};
@@ -512,6 +806,8 @@
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb_rmii>;
+ clocks = <&macb0_clk>, <&macb0_clk>;
+ clock-names = "hclk", "pclk";
status = "disabled";
};
@@ -519,6 +815,8 @@
compatible = "atmel,at91rm9200-udc";
reg = <0xfff78000 0x4000>;
interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&udc_clk>, <&udpck>;
+ clock-names = "pclk", "hclk";
status = "disabled";
};
@@ -528,6 +826,7 @@
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
#address-cells = <1>;
#size-cells = <0>;
+ clocks = <&twi0_clk>;
status = "disabled";
};
@@ -537,6 +836,8 @@
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
+ clocks = <&mci0_clk>;
+ clock-names = "mci_clk";
status = "disabled";
};
@@ -546,6 +847,8 @@
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
+ clocks = <&mci1_clk>;
+ clock-names = "mci_clk";
status = "disabled";
};
@@ -568,6 +871,8 @@
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
+ clocks = <&spi0_clk>;
+ clock-names = "spi_clk";
status = "disabled";
};
@@ -579,6 +884,8 @@
interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
+ clocks = <&spi1_clk>;
+ clock-names = "spi_clk";
status = "disabled";
};
@@ -587,6 +894,8 @@
reg = <0xfffb8000 0x300>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
#pwm-cells = <3>;
+ clocks = <&pwm_clk>;
+ clock-names = "pwm_clk";
status = "disabled";
};
};
@@ -622,6 +931,8 @@
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00a00000 0x100000>;
interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>;
+ clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
status = "disabled";
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 30/34] ARM: at91/dt: sam9263: define clocks
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
Define the at91sam9263 clocks in the SoC dtsi file.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91sam9263.dtsi | 311 +++++++++++++++++++++++++++++++++++++
1 file changed, 311 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index fece8665fb63..bb23c2d33cf8 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -10,6 +10,7 @@
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
/ {
model = "Atmel AT91SAM9263 family SoC";
@@ -32,6 +33,7 @@
ssc1 = &ssc1;
pwm0 = &pwm0;
};
+
cpus {
#address-cells = <0>;
#size-cells = <0>;
@@ -46,6 +48,20 @@
reg = <0x20000000 0x08000000>;
};
+ clocks {
+ main_xtal: main_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ slow_xtal: slow_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ };
+
ahb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -69,6 +85,264 @@
pmc: pmc at fffffc00 {
compatible = "atmel,at91rm9200-pmc";
reg = <0xfffffc00 0x100>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+
+ main_osc: main_osc {
+ compatible = "atmel,at91rm9200-clk-main-osc";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MOSCS>;
+ clocks = <&main_xtal>;
+ };
+
+ main: mainck {
+ compatible = "atmel,at91rm9200-clk-main";
+ #clock-cells = <0>;
+ clocks = <&main_osc>;
+ };
+
+ plla: pllack {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKA>;
+ clocks = <&main>;
+ reg = <0>;
+ atmel,clk-input-range = <1000000 32000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
+ <190000000 240000000 2 1>;
+ };
+
+ pllb: pllbck {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKB>;
+ clocks = <&main>;
+ reg = <1>;
+ atmel,clk-input-range = <1000000 5000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
+ };
+
+ mck: masterck {
+ compatible = "atmel,at91rm9200-clk-master";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
+ clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
+ atmel,clk-output-range = <0 120000000>;
+ atmel,clk-divisors = <1 2 4 0>;
+ };
+
+ usb: usbck {
+ compatible = "atmel,at91rm9200-clk-usb";
+ #clock-cells = <0>;
+ atmel,clk-divisors = <1 2 4 0>;
+ clocks = <&pllb>;
+ };
+
+ prog: progck {
+ compatible = "atmel,at91rm9200-clk-programmable";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&pmc>;
+ clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
+
+ prog0: prog0 {
+ #clock-cells = <0>;
+ reg = <0>;
+ interrupts = <AT91_PMC_PCKRDY(0)>;
+ };
+
+ prog1: prog1 {
+ #clock-cells = <0>;
+ reg = <1>;
+ interrupts = <AT91_PMC_PCKRDY(1)>;
+ };
+
+ prog2: prog2 {
+ #clock-cells = <0>;
+ reg = <2>;
+ interrupts = <AT91_PMC_PCKRDY(2)>;
+ };
+
+ prog3: prog3 {
+ #clock-cells = <0>;
+ reg = <3>;
+ interrupts = <AT91_PMC_PCKRDY(3)>;
+ };
+ };
+
+ systemck {
+ compatible = "atmel,at91rm9200-clk-system";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ uhpck: uhpck {
+ #clock-cells = <0>;
+ reg = <6>;
+ clocks = <&usb>;
+ };
+
+ udpck: udpck {
+ #clock-cells = <0>;
+ reg = <7>;
+ clocks = <&usb>;
+ };
+
+ pck0: pck0 {
+ #clock-cells = <0>;
+ reg = <8>;
+ clocks = <&prog0>;
+ };
+
+ pck1: pck1 {
+ #clock-cells = <0>;
+ reg = <9>;
+ clocks = <&prog1>;
+ };
+
+ pck2: pck2 {
+ #clock-cells = <0>;
+ reg = <10>;
+ clocks = <&prog2>;
+ };
+
+ pck3: pck3 {
+ #clock-cells = <0>;
+ reg = <11>;
+ clocks = <&prog3>;
+ };
+ };
+
+ periphck {
+ compatible = "atmel,at91rm9200-clk-peripheral";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&mck>;
+
+ pioA_clk: pioA_clk {
+ #clock-cells = <0>;
+ reg = <2>;
+ };
+
+ pioB_clk: pioB_clk {
+ #clock-cells = <0>;
+ reg = <3>;
+ };
+
+ pioCDE_clk: pioCDE_clk {
+ #clock-cells = <0>;
+ reg = <4>;
+ };
+
+ usart0_clk: usart0_clk {
+ #clock-cells = <0>;
+ reg = <7>;
+ };
+
+ usart1_clk: usart1_clk {
+ #clock-cells = <0>;
+ reg = <8>;
+ };
+
+ usart2_clk: usart2_clk {
+ #clock-cells = <0>;
+ reg = <9>;
+ };
+
+ mci0_clk: mci0_clk {
+ #clock-cells = <0>;
+ reg = <10>;
+ };
+
+ mci1_clk: mci1_clk {
+ #clock-cells = <0>;
+ reg = <11>;
+ };
+
+ can_clk: can_clk {
+ #clock-cells = <0>;
+ reg = <12>;
+ };
+
+ twi0_clk: twi0_clk {
+ #clock-cells = <0>;
+ reg = <13>;
+ };
+
+ spi0_clk: spi0_clk {
+ #clock-cells = <0>;
+ reg = <14>;
+ };
+
+ spi1_clk: spi1_clk {
+ #clock-cells = <0>;
+ reg = <15>;
+ };
+
+ ssc0_clk: ssc0_clk {
+ #clock-cells = <0>;
+ reg = <16>;
+ };
+
+ ssc1_clk: ssc1_clk {
+ #clock-cells = <0>;
+ reg = <17>;
+ };
+
+ ac91_clk: ac97_clk {
+ #clock-cells = <0>;
+ reg = <18>;
+ };
+
+ tcb_clk: tcb_clk {
+ #clock-cells = <0>;
+ reg = <19>;
+ };
+
+ pwm_clk: pwm_clk {
+ #clock-cells = <0>;
+ reg = <20>;
+ };
+
+ macb0_clk: macb0_clk {
+ #clock-cells = <0>;
+ reg = <21>;
+ };
+
+ g2de_clk: g2de_clk {
+ #clock-cells = <0>;
+ reg = <23>;
+ };
+
+ udc_clk: udc_clk {
+ #clock-cells = <0>;
+ reg = <24>;
+ };
+
+ isi_clk: isi_clk {
+ #clock-cells = <0>;
+ reg = <25>;
+ };
+
+ lcd_clk: lcd_clk {
+ #clock-cells = <0>;
+ reg = <26>;
+ };
+
+ dma_clk: dma_clk {
+ #clock-cells = <0>;
+ reg = <27>;
+ };
+
+ ohci_clk: ohci_clk {
+ #clock-cells = <0>;
+ reg = <29>;
+ };
+ };
};
ramc: ramc at ffffe200 {
@@ -81,12 +355,15 @@
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&mck>;
};
tcb0: timer at fff7c000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfff7c000 0x100>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tcb_clk>;
+ clock-names = "t0_clk";
};
rstc at fffffd00 {
@@ -403,6 +680,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioA_clk>;
};
pioB: gpio at fffff400 {
@@ -413,6 +691,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioB_clk>;
};
pioC: gpio at fffff600 {
@@ -423,6 +702,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioCDE_clk>;
};
pioD: gpio at fffff800 {
@@ -433,6 +713,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioCDE_clk>;
};
pioE: gpio at fffffa00 {
@@ -443,6 +724,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioCDE_clk>;
};
};
@@ -452,6 +734,8 @@
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
+ clocks = <&mck>;
+ clock-names = "usart";
status = "disabled";
};
@@ -463,6 +747,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>;
+ clocks = <&usart0_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -474,6 +760,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>;
+ clocks = <&usart1_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -485,6 +773,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>;
+ clocks = <&usart2_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -494,6 +784,8 @@
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+ clocks = <&ssc0_clk>;
+ clock-names = "pclk";
status = "disabled";
};
@@ -503,6 +795,8 @@
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
+ clocks = <&ssc1_clk>;
+ clock-names = "pclk";
status = "disabled";
};
@@ -512,6 +806,8 @@
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb_rmii>;
+ clocks = <&macb0_clk>, <&macb0_clk>;
+ clock-names = "hclk", "pclk";
status = "disabled";
};
@@ -519,6 +815,8 @@
compatible = "atmel,at91rm9200-udc";
reg = <0xfff78000 0x4000>;
interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&udc_clk>, <&udpck>;
+ clock-names = "pclk", "hclk";
status = "disabled";
};
@@ -528,6 +826,7 @@
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
#address-cells = <1>;
#size-cells = <0>;
+ clocks = <&twi0_clk>;
status = "disabled";
};
@@ -537,6 +836,8 @@
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
+ clocks = <&mci0_clk>;
+ clock-names = "mci_clk";
status = "disabled";
};
@@ -546,6 +847,8 @@
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
+ clocks = <&mci1_clk>;
+ clock-names = "mci_clk";
status = "disabled";
};
@@ -568,6 +871,8 @@
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
+ clocks = <&spi0_clk>;
+ clock-names = "spi_clk";
status = "disabled";
};
@@ -579,6 +884,8 @@
interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
+ clocks = <&spi1_clk>;
+ clock-names = "spi_clk";
status = "disabled";
};
@@ -587,6 +894,8 @@
reg = <0xfffb8000 0x300>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
#pwm-cells = <3>;
+ clocks = <&pwm_clk>;
+ clock-names = "pwm_clk";
status = "disabled";
};
};
@@ -622,6 +931,8 @@
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00a00000 0x100000>;
interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>;
+ clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
status = "disabled";
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 31/34] ARM: at91: move at91sam9263 SoC to the CCF
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:06 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
This patch removes the selection of AT91_USE_OLD_CLK when selecting
at91sam9263 SoC support. This will automatically enable COMMON_CLK_AT91
option and add support for at91 common clock implementation.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 461966d0ee4d..6cc6f7aebdae 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -138,7 +138,6 @@ config SOC_AT91SAM9263
select HAVE_AT91_DBGU1
select HAVE_FB_ATMEL
select SOC_AT91SAM9
- select AT91_USE_OLD_CLK
select HAVE_AT91_USB_CLK
config SOC_AT91SAM9RL
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 31/34] ARM: at91: move at91sam9263 SoC to the CCF
@ 2014-07-09 15:06 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:06 UTC (permalink / raw)
To: linux-arm-kernel
This patch removes the selection of AT91_USE_OLD_CLK when selecting
at91sam9263 SoC support. This will automatically enable COMMON_CLK_AT91
option and add support for at91 common clock implementation.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 461966d0ee4d..6cc6f7aebdae 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -138,7 +138,6 @@ config SOC_AT91SAM9263
select HAVE_AT91_DBGU1
select HAVE_FB_ATMEL
select SOC_AT91SAM9
- select AT91_USE_OLD_CLK
select HAVE_AT91_USB_CLK
config SOC_AT91SAM9RL
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 32/34] ARM: at91/dt: sam9263ek: define crystals frequencies
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:07 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:07 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni
Define at91sam9263ek main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91sam9263ek.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts
index 15009c9f2293..5cf93eecd8f1 100644
--- a/arch/arm/boot/dts/at91sam9263ek.dts
+++ b/arch/arm/boot/dts/at91sam9263ek.dts
@@ -29,6 +29,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <16367660>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <16367660>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 32/34] ARM: at91/dt: sam9263ek: define crystals frequencies
@ 2014-07-09 15:07 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:07 UTC (permalink / raw)
To: linux-arm-kernel
Define at91sam9263ek main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/boot/dts/at91sam9263ek.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts
index 15009c9f2293..5cf93eecd8f1 100644
--- a/arch/arm/boot/dts/at91sam9263ek.dts
+++ b/arch/arm/boot/dts/at91sam9263ek.dts
@@ -29,6 +29,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <16367660>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <16367660>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 33/34] ARM: at91/dt: tny_a9263: define crystals frequencies
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:07 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:07 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni,
Gregory Hermant
Define Calao TNY-A9263 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Gregory Hermant <gregory.hermant@calao-systems.com>
---
arch/arm/boot/dts/tny_a9263.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/tny_a9263.dts b/arch/arm/boot/dts/tny_a9263.dts
index 0751a6a979a8..3043296345b7 100644
--- a/arch/arm/boot/dts/tny_a9263.dts
+++ b/arch/arm/boot/dts/tny_a9263.dts
@@ -29,6 +29,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <12000000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 33/34] ARM: at91/dt: tny_a9263: define crystals frequencies
@ 2014-07-09 15:07 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:07 UTC (permalink / raw)
To: linux-arm-kernel
Define Calao TNY-A9263 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Gregory Hermant <gregory.hermant@calao-systems.com>
---
arch/arm/boot/dts/tny_a9263.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/tny_a9263.dts b/arch/arm/boot/dts/tny_a9263.dts
index 0751a6a979a8..3043296345b7 100644
--- a/arch/arm/boot/dts/tny_a9263.dts
+++ b/arch/arm/boot/dts/tny_a9263.dts
@@ -29,6 +29,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <12000000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 34/34] ARM: at91/dt: usb_a9263: define crystals frequencies
2014-07-09 15:06 ` Alexandre Belloni
@ 2014-07-09 15:07 ` Alexandre Belloni
-1 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:07 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, Boris Brezillon,
linux-arm-kernel, linux-kernel, Alexandre Belloni,
Gregory Hermant
Define Calao USB-A9263 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Gregory Hermant <gregory.hermant@calao-systems.com>
---
arch/arm/boot/dts/usb_a9263.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/usb_a9263.dts b/arch/arm/boot/dts/usb_a9263.dts
index 290e60383baf..68c0de36c339 100644
--- a/arch/arm/boot/dts/usb_a9263.dts
+++ b/arch/arm/boot/dts/usb_a9263.dts
@@ -29,6 +29,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <12000000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
* [PATCHv3 34/34] ARM: at91/dt: usb_a9263: define crystals frequencies
@ 2014-07-09 15:07 ` Alexandre Belloni
0 siblings, 0 replies; 70+ messages in thread
From: Alexandre Belloni @ 2014-07-09 15:07 UTC (permalink / raw)
To: linux-arm-kernel
Define Calao USB-A9263 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Gregory Hermant <gregory.hermant@calao-systems.com>
---
arch/arm/boot/dts/usb_a9263.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/usb_a9263.dts b/arch/arm/boot/dts/usb_a9263.dts
index 290e60383baf..68c0de36c339 100644
--- a/arch/arm/boot/dts/usb_a9263.dts
+++ b/arch/arm/boot/dts/usb_a9263.dts
@@ -29,6 +29,14 @@
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
+
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <12000000>;
+ };
};
ahb {
--
1.9.1
^ permalink raw reply related [flat|nested] 70+ messages in thread
end of thread, other threads:[~2014-07-09 15:37 UTC | newest]
Thread overview: 70+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-07-09 15:06 [PATCHv3 00/34] ARM: at91: Switch remaining SoCs and boards to CCF Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 01/34] Documentation: dt: document all the atmel pmc compatibles Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 02/34] ARM: at91/dt: ariag25: define crystals frequencies Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 03/34] ARM: at91: prepare common clk transition for rm9200 Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 04/34] ARM: at91/dt: rm9200: define clocks Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 05/34] ARM: at91: move at91rm9200 SoC to the CCF Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 06/34] ARM: at91/dt: at91rm9200ek: define crystals frequencies Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 07/34] ARM: at91: prepare common clk transition for sam9260 Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 08/34] ARM: at91/dt: sam9260: define clocks Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 09/34] ARM: at91/dt: sam9g20: " Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 10/34] ARM: at91: move at91sam9260 SoCs to the CCF Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 11/34] ARM: at91/dt: at91sam9g20ek: define crystals frequencies Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 12/34] ARM: at91/dt: foxg20: " Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 13/34] ARM: at91/dt: usb_a9260: " Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 14/34] ARM: at91/dt: tny_a9260: " Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 15/34] ARM: at91/dt: qil_a9260: " Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 16/34] ARM: at91/dt: mpa1600: define crytals frequencies Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 17/34] ARM: at91/dt: ge863-pro3: define main crystal frequency Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 18/34] ARM: at91/dt: aks-cdu: define slow crytal frequency Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 19/34] ARM: at91/dt: evk-pro3: " Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 20/34] ARM: at91/dt: ethernut5: define crystals frequencies Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 21/34] ARM: at91/dt: animeo_ip: " Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 22/34] ARM: at91/dt: kizbox: define main crystal frequency Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 23/34] ARM: at91: prepare common clk transition for sam9g45 Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 24/34] ARM: at91/dt: sam9g45: define clocks Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 25/34] ARM: at91: move at91sam9g45 SoC to the CCF Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 26/34] ARM: at91/dt: sam9m10g45ek: define crystals frequencies Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 27/34] ARM: at91/dt: pm9g45: " Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 28/34] ARM: at91/dt: cosino define " Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 29/34] ARM: at91: prepare common clk transition for sam9263 Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 30/34] ARM: at91/dt: sam9263: define clocks Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:06 ` [PATCHv3 31/34] ARM: at91: move at91sam9263 SoC to the CCF Alexandre Belloni
2014-07-09 15:06 ` Alexandre Belloni
2014-07-09 15:07 ` [PATCHv3 32/34] ARM: at91/dt: sam9263ek: define crystals frequencies Alexandre Belloni
2014-07-09 15:07 ` Alexandre Belloni
2014-07-09 15:07 ` [PATCHv3 33/34] ARM: at91/dt: tny_a9263: " Alexandre Belloni
2014-07-09 15:07 ` Alexandre Belloni
2014-07-09 15:07 ` [PATCHv3 34/34] ARM: at91/dt: usb_a9263: " Alexandre Belloni
2014-07-09 15:07 ` Alexandre Belloni
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