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From: Andre Przywara <andre.przywara@arm.com>
To: marc.zyngier@arm.com, christoffer.dall@linaro.org
Cc: eric.auger@linaro.org, p.fedin@samsung.com,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org
Subject: [PATCH v3 02/16] KVM: arm/arm64: remove now unused code after stay-in-LR rework
Date: Wed,  7 Oct 2015 15:55:12 +0100	[thread overview]
Message-ID: <1444229726-31559-3-git-send-email-andre.przywara@arm.com> (raw)
In-Reply-To: <1444229726-31559-1-git-send-email-andre.przywara@arm.com>

Now that we synchronize the LR state into our emulation upon guest
exit, there is no need for taking extra care of disabled IRQs.
Remove that code.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
Changelog v2..v3:
- new patch

 virt/kvm/arm/vgic.c | 29 -----------------------------
 1 file changed, 29 deletions(-)

diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c
index da0a866..a5360b7 100644
--- a/virt/kvm/arm/vgic.c
+++ b/virt/kvm/arm/vgic.c
@@ -101,7 +101,6 @@
 
 #include "vgic.h"
 
-static void vgic_retire_disabled_irqs(struct kvm_vcpu *vcpu);
 static void vgic_retire_lr(int lr_nr, struct kvm_vcpu *vcpu);
 static struct vgic_lr vgic_get_lr(const struct kvm_vcpu *vcpu, int lr);
 static void vgic_set_lr(struct kvm_vcpu *vcpu, int lr, struct vgic_lr lr_desc);
@@ -477,7 +476,6 @@ bool vgic_handle_enable_reg(struct kvm *kvm, struct kvm_exit_mmio *mmio,
 {
 	u32 *reg;
 	int mode = ACCESS_READ_VALUE | access;
-	struct kvm_vcpu *target_vcpu = kvm_get_vcpu(kvm, vcpu_id);
 
 	reg = vgic_bitmap_get_reg(&kvm->arch.vgic.irq_enabled, vcpu_id, offset);
 	vgic_reg_access(mmio, reg, offset, mode);
@@ -485,7 +483,6 @@ bool vgic_handle_enable_reg(struct kvm *kvm, struct kvm_exit_mmio *mmio,
 		if (access & ACCESS_WRITE_CLEARBIT) {
 			if (offset < 4) /* Force SGI enabled */
 				*reg |= 0xffff;
-			vgic_retire_disabled_irqs(target_vcpu);
 		}
 		vgic_update_state(kvm);
 		return true;
@@ -1099,32 +1096,6 @@ static void vgic_retire_lr(int lr_nr, struct kvm_vcpu *vcpu)
 	vgic_sync_lr_elrsr(vcpu, lr_nr, vlr);
 }
 
-/*
- * An interrupt may have been disabled after being made pending on the
- * CPU interface (the classic case is a timer running while we're
- * rebooting the guest - the interrupt would kick as soon as the CPU
- * interface gets enabled, with deadly consequences).
- *
- * The solution is to examine already active LRs, and check the
- * interrupt is still enabled. If not, just retire it.
- */
-static void vgic_retire_disabled_irqs(struct kvm_vcpu *vcpu)
-{
-	u64 elrsr = vgic_get_elrsr(vcpu);
-	unsigned long *elrsr_ptr = u64_to_bitmask(&elrsr);
-	int lr;
-
-	for_each_clear_bit(lr, elrsr_ptr, vgic->nr_lr) {
-		struct vgic_lr vlr = vgic_get_lr(vcpu, lr);
-
-		if (!vgic_irq_is_enabled(vcpu, vlr.irq)) {
-			vgic_retire_lr(lr, vcpu);
-			if (vgic_irq_is_queued(vcpu, vlr.irq))
-				vgic_irq_clear_queued(vcpu, vlr.irq);
-		}
-	}
-}
-
 static void vgic_queue_irq_to_lr(struct kvm_vcpu *vcpu, int irq,
 				 int lr_nr, struct vgic_lr vlr)
 {
-- 
2.5.1


WARNING: multiple messages have this Message-ID (diff)
From: andre.przywara@arm.com (Andre Przywara)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 02/16] KVM: arm/arm64: remove now unused code after stay-in-LR rework
Date: Wed,  7 Oct 2015 15:55:12 +0100	[thread overview]
Message-ID: <1444229726-31559-3-git-send-email-andre.przywara@arm.com> (raw)
In-Reply-To: <1444229726-31559-1-git-send-email-andre.przywara@arm.com>

Now that we synchronize the LR state into our emulation upon guest
exit, there is no need for taking extra care of disabled IRQs.
Remove that code.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
Changelog v2..v3:
- new patch

 virt/kvm/arm/vgic.c | 29 -----------------------------
 1 file changed, 29 deletions(-)

diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c
index da0a866..a5360b7 100644
--- a/virt/kvm/arm/vgic.c
+++ b/virt/kvm/arm/vgic.c
@@ -101,7 +101,6 @@
 
 #include "vgic.h"
 
-static void vgic_retire_disabled_irqs(struct kvm_vcpu *vcpu);
 static void vgic_retire_lr(int lr_nr, struct kvm_vcpu *vcpu);
 static struct vgic_lr vgic_get_lr(const struct kvm_vcpu *vcpu, int lr);
 static void vgic_set_lr(struct kvm_vcpu *vcpu, int lr, struct vgic_lr lr_desc);
@@ -477,7 +476,6 @@ bool vgic_handle_enable_reg(struct kvm *kvm, struct kvm_exit_mmio *mmio,
 {
 	u32 *reg;
 	int mode = ACCESS_READ_VALUE | access;
-	struct kvm_vcpu *target_vcpu = kvm_get_vcpu(kvm, vcpu_id);
 
 	reg = vgic_bitmap_get_reg(&kvm->arch.vgic.irq_enabled, vcpu_id, offset);
 	vgic_reg_access(mmio, reg, offset, mode);
@@ -485,7 +483,6 @@ bool vgic_handle_enable_reg(struct kvm *kvm, struct kvm_exit_mmio *mmio,
 		if (access & ACCESS_WRITE_CLEARBIT) {
 			if (offset < 4) /* Force SGI enabled */
 				*reg |= 0xffff;
-			vgic_retire_disabled_irqs(target_vcpu);
 		}
 		vgic_update_state(kvm);
 		return true;
@@ -1099,32 +1096,6 @@ static void vgic_retire_lr(int lr_nr, struct kvm_vcpu *vcpu)
 	vgic_sync_lr_elrsr(vcpu, lr_nr, vlr);
 }
 
-/*
- * An interrupt may have been disabled after being made pending on the
- * CPU interface (the classic case is a timer running while we're
- * rebooting the guest - the interrupt would kick as soon as the CPU
- * interface gets enabled, with deadly consequences).
- *
- * The solution is to examine already active LRs, and check the
- * interrupt is still enabled. If not, just retire it.
- */
-static void vgic_retire_disabled_irqs(struct kvm_vcpu *vcpu)
-{
-	u64 elrsr = vgic_get_elrsr(vcpu);
-	unsigned long *elrsr_ptr = u64_to_bitmask(&elrsr);
-	int lr;
-
-	for_each_clear_bit(lr, elrsr_ptr, vgic->nr_lr) {
-		struct vgic_lr vlr = vgic_get_lr(vcpu, lr);
-
-		if (!vgic_irq_is_enabled(vcpu, vlr.irq)) {
-			vgic_retire_lr(lr, vcpu);
-			if (vgic_irq_is_queued(vcpu, vlr.irq))
-				vgic_irq_clear_queued(vcpu, vlr.irq);
-		}
-	}
-}
-
 static void vgic_queue_irq_to_lr(struct kvm_vcpu *vcpu, int irq,
 				 int lr_nr, struct vgic_lr vlr)
 {
-- 
2.5.1

  parent reply	other threads:[~2015-10-07 14:54 UTC|newest]

Thread overview: 101+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-07 14:55 [PATCH v3 00/16] KVM: arm64: GICv3 ITS emulation Andre Przywara
2015-10-07 14:55 ` Andre Przywara
2015-10-07 14:55 ` [PATCH v3 01/16] KVM: arm/arm64: VGIC: don't track used LRs in the distributor Andre Przywara
2015-10-07 14:55   ` Andre Przywara
2015-10-07 14:55 ` Andre Przywara [this message]
2015-10-07 14:55   ` [PATCH v3 02/16] KVM: arm/arm64: remove now unused code after stay-in-LR rework Andre Przywara
2015-10-07 14:55 ` [PATCH v3 03/16] KVM: extend struct kvm_msi to hold a 32-bit device ID Andre Przywara
2015-10-07 14:55   ` Andre Przywara
2015-10-07 14:55 ` [PATCH v3 04/16] KVM: arm/arm64: add emulation model specific destroy function Andre Przywara
2015-10-07 14:55   ` Andre Przywara
2015-10-07 14:55 ` [PATCH v3 05/16] KVM: arm/arm64: extend arch CAP checks to allow per-VM capabilities Andre Przywara
2015-10-07 14:55   ` Andre Przywara
2015-10-07 14:55 ` [PATCH v3 06/16] KVM: arm/arm64: make GIC frame address initialization model specific Andre Przywara
2015-10-07 14:55   ` Andre Przywara
2015-10-07 14:55 ` [PATCH v3 07/16] KVM: arm64: Introduce new MMIO region for the ITS base address Andre Przywara
2015-10-07 14:55   ` Andre Przywara
2015-10-07 14:55 ` [PATCH v3 08/16] KVM: arm64: handle ITS related GICv3 redistributor registers Andre Przywara
2015-10-07 14:55   ` Andre Przywara
2015-10-22 15:46   ` Pavel Fedin
2015-10-22 15:46     ` Pavel Fedin
2015-10-22 15:55     ` Pavel Fedin
2015-10-22 15:55       ` Pavel Fedin
2015-10-07 14:55 ` [PATCH v3 09/16] KVM: arm64: introduce ITS emulation file with stub functions Andre Przywara
2015-10-07 14:55   ` Andre Przywara
2015-10-07 14:55 ` [PATCH v3 10/16] KVM: arm64: implement basic ITS register handlers Andre Przywara
2015-10-07 14:55   ` Andre Przywara
2015-10-07 14:55 ` [PATCH v3 11/16] KVM: arm64: add data structures to model ITS interrupt translation Andre Przywara
2015-10-07 14:55   ` Andre Przywara
2015-10-07 14:55 ` [PATCH v3 12/16] KVM: arm64: handle pending bit for LPIs in ITS emulation Andre Przywara
2015-10-07 14:55   ` Andre Przywara
2015-10-07 15:10   ` Pavel Fedin
2015-10-07 15:10     ` Pavel Fedin
2015-10-07 15:35     ` Marc Zyngier
2015-10-07 15:35       ` Marc Zyngier
2015-10-07 15:46       ` Pavel Fedin
2015-10-07 15:46         ` Pavel Fedin
2015-10-07 15:49         ` Marc Zyngier
2015-10-07 15:49           ` Marc Zyngier
2015-10-12  7:40   ` Pavel Fedin
2015-10-12  7:40     ` Pavel Fedin
2015-10-12 11:39     ` Pavel Fedin
2015-10-12 11:39       ` Pavel Fedin
2015-10-12 14:17     ` Andre Przywara
2015-10-12 14:17       ` Andre Przywara
2015-10-07 14:55 ` [PATCH v3 13/16] KVM: arm64: sync LPI configuration and pending tables Andre Przywara
2015-10-07 14:55   ` Andre Przywara
2015-10-21 11:29   ` Pavel Fedin
2015-10-21 11:29     ` Pavel Fedin
2015-10-07 14:55 ` [PATCH v3 14/16] KVM: arm64: implement ITS command queue command handlers Andre Przywara
2015-10-07 14:55   ` Andre Przywara
2015-10-14 12:26   ` Pavel Fedin
2015-10-14 12:26     ` Pavel Fedin
2015-10-07 14:55 ` [PATCH v3 15/16] KVM: arm64: implement MSI injection in ITS emulation Andre Przywara
2015-10-07 14:55   ` Andre Przywara
2015-11-25 13:28   ` Pavel Fedin
2015-11-25 13:28     ` Pavel Fedin
2015-10-07 14:55 ` [PATCH v3 16/16] KVM: arm64: enable ITS emulation as a virtual MSI controller Andre Przywara
2015-10-07 14:55   ` Andre Przywara
2015-10-07 16:05 ` [PATCH v3 00/16] KVM: arm64: GICv3 ITS emulation Pavel Fedin
2015-10-07 16:05   ` Pavel Fedin
2015-10-07 16:22   ` Marc Zyngier
2015-10-07 16:22     ` Marc Zyngier
2015-10-07 18:09     ` Pavel Fedin
2015-10-07 18:09       ` Pavel Fedin
2015-10-07 19:48       ` Marc Zyngier
2015-10-07 19:48         ` Marc Zyngier
2015-10-07 19:48         ` Marc Zyngier
2015-10-08  8:41         ` Pavel Fedin
2015-10-08  8:41           ` Pavel Fedin
2015-10-10 15:37 ` Christoffer Dall
2015-10-10 15:37   ` Christoffer Dall
2015-10-12 14:12   ` Andre Przywara
2015-10-12 14:12     ` Andre Przywara
2015-10-12 15:18     ` Pavel Fedin
2015-10-12 15:18       ` Pavel Fedin
2015-10-14  8:48       ` Eric Auger
2015-10-14  8:48         ` Eric Auger
2015-10-14  8:50         ` Pavel Fedin
2015-10-14  8:50           ` Pavel Fedin
2015-10-13 15:46 ` Pavel Fedin
2015-10-13 15:46   ` Pavel Fedin
2016-03-09 11:35 ` Tomasz Nowicki
2016-03-09 11:35   ` Tomasz Nowicki
2016-03-13 18:16   ` Christoffer Dall
2016-03-13 18:16     ` Christoffer Dall
2016-03-14 11:13     ` Andre Przywara
2016-03-14 11:13       ` Andre Przywara
2016-03-14 17:29       ` Peter Maydell
2016-03-14 17:29         ` Peter Maydell
2016-03-14 17:54         ` Marc Zyngier
2016-03-14 17:54           ` Marc Zyngier
2016-03-14 18:20           ` Andre Przywara
2016-03-14 18:20             ` Andre Przywara
2016-03-14 18:36             ` Marc Zyngier
2016-03-14 18:36               ` Marc Zyngier
2016-03-18  9:40             ` Christoffer Dall
2016-03-18  9:40               ` Christoffer Dall
2016-03-18 17:14               ` Peter Maydell
2016-03-18 17:14                 ` Peter Maydell
2016-03-18  9:38         ` Christoffer Dall
2016-03-18  9:38           ` Christoffer Dall

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