From: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> To: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>, Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>, Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>, "Rafael J. Wysocki" <rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org>, Kevin Hilman <khilman-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>, Ulf Hansson <ulf.hansson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>, Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>, Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>, Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>, Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>, Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Subject: [PATCH V5 06/14] soc: tegra: pmc: Fix checking of valid partitions Date: Thu, 28 Jan 2016 16:33:44 +0000 [thread overview] Message-ID: <1453998832-27383-7-git-send-email-jonathanh@nvidia.com> (raw) In-Reply-To: <1453998832-27383-1-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> The tegra power partitions are referenced by a numerical ID which are the same values programmed into the PMC registers for controlling the partition. For a given device, the valid partition IDs may not be contiguous and so simply checking that an ID is not greater than the maximum ID supported may not mean it is valid. Fix this by adding a bitmap for representing the valid partitions of a device and add a helper function will test if the partition is valid. Signed-off-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> --- drivers/soc/tegra/pmc.c | 21 +++++++++++++++++---- include/soc/tegra/pmc.h | 1 + 2 files changed, 18 insertions(+), 4 deletions(-) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 35ee60fd17be..032dd5c17130 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -132,6 +132,7 @@ struct tegra_pmc_soc { * @cpu_pwr_good_en: CPU power good signal is enabled * @lp0_vec_phys: physical base address of the LP0 warm boot code * @lp0_vec_size: size of the LP0 warm boot code + * @powergates_valid: Bitmap of valid power gates * @powergates_lock: mutex for power gate register access */ struct tegra_pmc { @@ -156,6 +157,7 @@ struct tegra_pmc { bool cpu_pwr_good_en; u32 lp0_vec_phys; u32 lp0_vec_size; + DECLARE_BITMAP(powergates_valid, TEGRA_POWERGATE_MAX); struct mutex powergates_lock; }; @@ -180,6 +182,11 @@ static inline bool tegra_powergate_state(int id) return (tegra_pmc_readl(PWRGATE_STATUS) & BIT(id)) != 0; } +static inline bool tegra_powergate_is_valid(int id) +{ + return test_bit(id, pmc->powergates_valid); +} + /** * tegra_powergate_set() - set the state of a partition * @id: partition ID @@ -213,7 +220,7 @@ static int tegra_powergate_set(unsigned int id, bool new_state) */ int tegra_powergate_power_on(unsigned int id) { - if (!pmc->soc || id >= pmc->soc->num_powergates) + if (!tegra_powergate_is_valid(id)) return -EINVAL; return tegra_powergate_set(id, true); @@ -225,7 +232,7 @@ int tegra_powergate_power_on(unsigned int id) */ int tegra_powergate_power_off(unsigned int id) { - if (!pmc->soc || id >= pmc->soc->num_powergates) + if (!tegra_powergate_is_valid(id)) return -EINVAL; return tegra_powergate_set(id, false); @@ -240,7 +247,7 @@ int tegra_powergate_is_powered(unsigned int id) { int status; - if (!pmc->soc || id >= pmc->soc->num_powergates) + if (!tegra_powergate_is_valid(id)) return -EINVAL; mutex_lock(&pmc->powergates_lock); @@ -258,7 +265,7 @@ int tegra_powergate_remove_clamping(unsigned int id) { u32 mask; - if (!pmc->soc || id >= pmc->soc->num_powergates) + if (!tegra_powergate_is_valid(id)) return -EINVAL; mutex_lock(&pmc->powergates_lock); @@ -1118,6 +1125,7 @@ static int __init tegra_pmc_early_init(void) const struct of_device_id *match; struct device_node *np; struct resource regs; + unsigned int i; bool invert; u32 value; @@ -1167,6 +1175,11 @@ static int __init tegra_pmc_early_init(void) return -ENXIO; } + /* Create a bit-mask of the valid partitions */ + for (i = 0; i < pmc->soc->num_powergates; i++) + if (pmc->soc->powergates[i]) + set_bit(i, pmc->powergates_valid); + mutex_init(&pmc->powergates_lock); /* diff --git a/include/soc/tegra/pmc.h b/include/soc/tegra/pmc.h index 07e332dd44fb..e9e53473a63e 100644 --- a/include/soc/tegra/pmc.h +++ b/include/soc/tegra/pmc.h @@ -72,6 +72,7 @@ int tegra_pmc_cpu_remove_clamping(unsigned int cpuid); #define TEGRA_POWERGATE_AUD 27 #define TEGRA_POWERGATE_DFD 28 #define TEGRA_POWERGATE_VE2 29 +#define TEGRA_POWERGATE_MAX TEGRA_POWERGATE_VE2 #define TEGRA_POWERGATE_3D0 TEGRA_POWERGATE_3D -- 2.1.4
WARNING: multiple messages have this Message-ID (diff)
From: jonathanh@nvidia.com (Jon Hunter) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH V5 06/14] soc: tegra: pmc: Fix checking of valid partitions Date: Thu, 28 Jan 2016 16:33:44 +0000 [thread overview] Message-ID: <1453998832-27383-7-git-send-email-jonathanh@nvidia.com> (raw) In-Reply-To: <1453998832-27383-1-git-send-email-jonathanh@nvidia.com> The tegra power partitions are referenced by a numerical ID which are the same values programmed into the PMC registers for controlling the partition. For a given device, the valid partition IDs may not be contiguous and so simply checking that an ID is not greater than the maximum ID supported may not mean it is valid. Fix this by adding a bitmap for representing the valid partitions of a device and add a helper function will test if the partition is valid. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> --- drivers/soc/tegra/pmc.c | 21 +++++++++++++++++---- include/soc/tegra/pmc.h | 1 + 2 files changed, 18 insertions(+), 4 deletions(-) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 35ee60fd17be..032dd5c17130 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -132,6 +132,7 @@ struct tegra_pmc_soc { * @cpu_pwr_good_en: CPU power good signal is enabled * @lp0_vec_phys: physical base address of the LP0 warm boot code * @lp0_vec_size: size of the LP0 warm boot code + * @powergates_valid: Bitmap of valid power gates * @powergates_lock: mutex for power gate register access */ struct tegra_pmc { @@ -156,6 +157,7 @@ struct tegra_pmc { bool cpu_pwr_good_en; u32 lp0_vec_phys; u32 lp0_vec_size; + DECLARE_BITMAP(powergates_valid, TEGRA_POWERGATE_MAX); struct mutex powergates_lock; }; @@ -180,6 +182,11 @@ static inline bool tegra_powergate_state(int id) return (tegra_pmc_readl(PWRGATE_STATUS) & BIT(id)) != 0; } +static inline bool tegra_powergate_is_valid(int id) +{ + return test_bit(id, pmc->powergates_valid); +} + /** * tegra_powergate_set() - set the state of a partition * @id: partition ID @@ -213,7 +220,7 @@ static int tegra_powergate_set(unsigned int id, bool new_state) */ int tegra_powergate_power_on(unsigned int id) { - if (!pmc->soc || id >= pmc->soc->num_powergates) + if (!tegra_powergate_is_valid(id)) return -EINVAL; return tegra_powergate_set(id, true); @@ -225,7 +232,7 @@ int tegra_powergate_power_on(unsigned int id) */ int tegra_powergate_power_off(unsigned int id) { - if (!pmc->soc || id >= pmc->soc->num_powergates) + if (!tegra_powergate_is_valid(id)) return -EINVAL; return tegra_powergate_set(id, false); @@ -240,7 +247,7 @@ int tegra_powergate_is_powered(unsigned int id) { int status; - if (!pmc->soc || id >= pmc->soc->num_powergates) + if (!tegra_powergate_is_valid(id)) return -EINVAL; mutex_lock(&pmc->powergates_lock); @@ -258,7 +265,7 @@ int tegra_powergate_remove_clamping(unsigned int id) { u32 mask; - if (!pmc->soc || id >= pmc->soc->num_powergates) + if (!tegra_powergate_is_valid(id)) return -EINVAL; mutex_lock(&pmc->powergates_lock); @@ -1118,6 +1125,7 @@ static int __init tegra_pmc_early_init(void) const struct of_device_id *match; struct device_node *np; struct resource regs; + unsigned int i; bool invert; u32 value; @@ -1167,6 +1175,11 @@ static int __init tegra_pmc_early_init(void) return -ENXIO; } + /* Create a bit-mask of the valid partitions */ + for (i = 0; i < pmc->soc->num_powergates; i++) + if (pmc->soc->powergates[i]) + set_bit(i, pmc->powergates_valid); + mutex_init(&pmc->powergates_lock); /* diff --git a/include/soc/tegra/pmc.h b/include/soc/tegra/pmc.h index 07e332dd44fb..e9e53473a63e 100644 --- a/include/soc/tegra/pmc.h +++ b/include/soc/tegra/pmc.h @@ -72,6 +72,7 @@ int tegra_pmc_cpu_remove_clamping(unsigned int cpuid); #define TEGRA_POWERGATE_AUD 27 #define TEGRA_POWERGATE_DFD 28 #define TEGRA_POWERGATE_VE2 29 +#define TEGRA_POWERGATE_MAX TEGRA_POWERGATE_VE2 #define TEGRA_POWERGATE_3D0 TEGRA_POWERGATE_3D -- 2.1.4
next prev parent reply other threads:[~2016-01-28 16:33 UTC|newest] Thread overview: 98+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-01-28 16:33 [PATCH V5 00/14] Add generic PM domain support for Tegra Jon Hunter 2016-01-28 16:33 ` Jon Hunter 2016-01-28 16:33 ` [PATCH V5 02/14] soc: tegra: pmc: Protect public functions from potential race conditions Jon Hunter 2016-01-28 16:33 ` Jon Hunter 2016-01-29 16:20 ` Mathieu Poirier 2016-01-29 16:20 ` Mathieu Poirier 2016-02-01 13:42 ` Jon Hunter 2016-02-01 13:42 ` Jon Hunter 2016-01-28 16:33 ` [PATCH V5 03/14] soc: tegra: pmc: Change powergate and rail IDs to be an unsigned type Jon Hunter 2016-01-28 16:33 ` Jon Hunter 2016-01-28 16:33 ` [PATCH V5 04/14] soc: tegra: pmc: Fix testing of powergate state Jon Hunter 2016-01-28 16:33 ` Jon Hunter 2016-01-28 16:33 ` [PATCH V5 07/14] soc: tegra: pmc: Ensure partitions can be toggled on/off by PMC Jon Hunter 2016-01-28 16:33 ` Jon Hunter 2016-01-28 16:33 ` [PATCH V5 08/14] PM / Domains: Add function to remove a pm-domain Jon Hunter 2016-01-28 16:33 ` Jon Hunter [not found] ` <1453998832-27383-9-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2016-02-02 15:35 ` Ulf Hansson 2016-02-02 15:35 ` Ulf Hansson [not found] ` <CAPDyKFqJLdoee4a9819XukXTmYyd3pue452K_zbiV6XhfA=fTw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2016-02-03 10:51 ` Jon Hunter 2016-02-03 10:51 ` Jon Hunter [not found] ` <1453998832-27383-1-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2016-01-28 16:33 ` [PATCH V5 01/14] soc: tegra: pmc: Restore base address on probe failure Jon Hunter 2016-01-28 16:33 ` Jon Hunter 2016-01-28 16:33 ` [PATCH V5 05/14] soc: tegra: pmc: Wait for powergate state to change Jon Hunter 2016-01-28 16:33 ` Jon Hunter 2016-01-29 16:58 ` Mathieu Poirier 2016-01-29 16:58 ` Mathieu Poirier [not found] ` <CANLsYkycbEo+wyMX8RJ9H-S5kDTjQR4nnDZc5gvf2kShOZAv9w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2016-02-01 13:44 ` Jon Hunter 2016-02-01 13:44 ` Jon Hunter [not found] ` <56AF613A.1000909-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2016-02-03 9:20 ` Jon Hunter 2016-02-03 9:20 ` Jon Hunter [not found] ` <56B1C647.4060504-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2016-02-03 15:58 ` Mathieu Poirier 2016-02-03 15:58 ` Mathieu Poirier 2016-01-28 16:33 ` Jon Hunter [this message] 2016-01-28 16:33 ` [PATCH V5 06/14] soc: tegra: pmc: Fix checking of valid partitions Jon Hunter [not found] ` <1453998832-27383-7-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2016-01-29 17:08 ` Mathieu Poirier 2016-01-29 17:08 ` Mathieu Poirier [not found] ` <CANLsYkxY5P2wQxGev0veN39nD-1cTVkZCVpX9jca7da39JJpWg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2016-02-01 13:45 ` Jon Hunter 2016-02-01 13:45 ` Jon Hunter 2016-01-28 16:33 ` [PATCH V5 09/14] Documentation: DT: bindings: Update NVIDIA PMC for Tegra Jon Hunter 2016-01-28 16:33 ` Jon Hunter 2016-01-29 16:08 ` Rob Herring 2016-01-29 16:08 ` Rob Herring 2016-01-28 16:33 ` [PATCH V5 10/14] Documentation: DT: bindings: Add power domain info for NVIDIA PMC Jon Hunter 2016-01-28 16:33 ` Jon Hunter 2016-01-29 16:06 ` Rob Herring 2016-01-29 16:06 ` Rob Herring 2016-02-03 11:02 ` Jon Hunter 2016-02-03 11:02 ` Jon Hunter [not found] ` <56B1DE40.7080403-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2016-02-03 15:48 ` Rob Herring 2016-02-03 15:48 ` Rob Herring [not found] ` <CAL_JsqLcoKW2znNNvM=sYLmZ6O6ZWqn7+aXspkXoONw6-O1ygg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2016-02-10 10:57 ` Jon Hunter 2016-02-10 10:57 ` Jon Hunter [not found] ` <56BB1787.4050801-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2016-02-10 14:06 ` Rob Herring 2016-02-10 14:06 ` Rob Herring 2016-01-28 16:33 ` [PATCH V5 11/14] soc: tegra: pmc: Add generic PM domain support Jon Hunter 2016-01-28 16:33 ` Jon Hunter 2016-02-04 15:44 ` Ulf Hansson 2016-02-04 15:44 ` Ulf Hansson 2016-02-10 18:01 ` Jon Hunter 2016-02-10 18:01 ` Jon Hunter [not found] ` <56BB7AF4.8040708-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2016-02-10 18:25 ` Ulf Hansson 2016-02-10 18:25 ` Ulf Hansson [not found] ` <CAPDyKFrZ6tWBsQC0tyWWeChiZja3h_zcbaiX25ak-Zyp4MzqVw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2016-02-11 9:13 ` Jon Hunter 2016-02-11 9:13 ` Jon Hunter 2016-02-11 9:57 ` Ulf Hansson 2016-02-11 9:57 ` Ulf Hansson [not found] ` <CAPDyKFrdmufsMqNL0U7q5gPEUqsg3SrkrNChcziQjEOjvd30Ng-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2016-02-11 10:13 ` Jon Hunter 2016-02-11 10:13 ` Jon Hunter [not found] ` <56BC5EE0.2040804-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2016-02-11 10:26 ` Jon Hunter 2016-02-11 10:26 ` Jon Hunter 2016-02-11 10:37 ` Ulf Hansson 2016-02-11 10:37 ` Ulf Hansson 2016-02-11 10:52 ` Jon Hunter 2016-02-11 10:52 ` Jon Hunter 2016-02-11 10:28 ` Ulf Hansson 2016-02-11 10:28 ` Ulf Hansson [not found] ` <CAPDyKFq_0t4tcvkgMBW8p8ubJDALWMjdhgGM+_Z6auRxEkSPdA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2016-02-11 16:38 ` Jon Hunter 2016-02-11 16:38 ` Jon Hunter [not found] ` <56BCB90C.8000302-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2016-02-18 15:06 ` Ulf Hansson 2016-02-18 15:06 ` Ulf Hansson 2016-02-12 23:14 ` Kevin Hilman 2016-02-12 23:14 ` Kevin Hilman [not found] ` <7hh9hdzflv.fsf-rdvid1DuHRBWk0Htik3J/w@public.gmane.org> 2016-02-15 11:27 ` Jon Hunter 2016-02-15 11:27 ` Jon Hunter [not found] ` <56C1B62B.5060708-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2016-02-18 16:00 ` Ulf Hansson 2016-02-18 16:00 ` Ulf Hansson [not found] ` <CAPDyKFoPrFoMOFxC37zXX4L3VdLKknaw_LUTw7ycr9mfa_=7_A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2016-02-18 16:31 ` Jon Hunter 2016-02-18 16:31 ` Jon Hunter 2016-02-24 0:03 ` Kevin Hilman 2016-02-24 0:03 ` Kevin Hilman 2016-01-28 16:33 ` [PATCH V5 12/14] clk: tegra210: Add the APB2APE audio clock Jon Hunter 2016-01-28 16:33 ` Jon Hunter 2016-02-02 14:37 ` Thierry Reding 2016-02-02 14:37 ` Thierry Reding 2016-01-28 16:33 ` [PATCH V5 13/14] ARM64: tegra: Add audio PM domain device node for Tegra210 Jon Hunter 2016-01-28 16:33 ` Jon Hunter 2016-01-28 16:33 ` [PATCH V5 14/14] ARM64: tegra: select PM_GENERIC_DOMAINS Jon Hunter 2016-01-28 16:33 ` Jon Hunter
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