* [PATCH] drm/i915/execlists: Use rmb() to order CSB reads
@ 2018-05-08 10:15 Chris Wilson
2018-05-08 10:33 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
` (7 more replies)
0 siblings, 8 replies; 12+ messages in thread
From: Chris Wilson @ 2018-05-08 10:15 UTC (permalink / raw)
To: intel-gfx
We assume that the CSB is written using the normal ringbuffer
coherency protocols, as outlined in kernel/events/ring_buffer.c:
* (HW) (DRIVER)
*
* if (LOAD ->data_tail) { LOAD ->data_head
* (A) smp_rmb() (C)
* STORE $data LOAD $data
* smp_wmb() (B) smp_mb() (D)
* STORE ->data_head STORE ->data_tail
* }
So we assume that the HW fulfils it's ordering requirements, and so we
should use a complimentary rmb() to ensure that our read of its WRITE
pointer is completed before we start accessing the data.
The final mb() is implied by the uncached mmio we perform to inform the
HW of our READ pointer.
References: https://bugs.freedesktop.org/show_bug.cgi?id=105064
References: https://bugs.freedesktop.org/show_bug.cgi?id=105888
References: https://bugs.freedesktop.org/show_bug.cgi?id=106185
References: 61bf9719fa17 ("drm/i915/cnl: Use mmio access to context status buffer")
Suggested-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Rafael Antognolli <rafael.antognolli@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
Cc: Timo Aaltonen <tjaalton@ubuntu.com>
---
drivers/gpu/drm/i915/intel_engine_cs.c | 3 ---
drivers/gpu/drm/i915/intel_lrc.c | 1 +
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index 70325e0824e3..8303e05b0c7d 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -470,9 +470,6 @@ static bool csb_force_mmio(struct drm_i915_private *i915)
if (intel_vgpu_active(i915) && !intel_vgpu_has_hwsp_emulation(i915))
return true;
- if (IS_CANNONLAKE(i915))
- return true;
-
return false;
}
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index f9f4064dec0e..81dd5da7d055 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -993,6 +993,7 @@ static void execlists_submission_tasklet(unsigned long data)
head = execlists->csb_head;
tail = READ_ONCE(buf[write_idx]);
+ rmb(); /* Hopefully paired with a wmb() in HW */
}
GEM_TRACE("%s cs-irq head=%d [%d%s], tail=%d [%d%s]\n",
engine->name,
--
2.17.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915/execlists: Use rmb() to order CSB reads
2018-05-08 10:15 [PATCH] drm/i915/execlists: Use rmb() to order CSB reads Chris Wilson
@ 2018-05-08 10:33 ` Patchwork
2018-05-08 10:52 ` ✓ Fi.CI.BAT: success " Patchwork
` (6 subsequent siblings)
7 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2018-05-08 10:33 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/execlists: Use rmb() to order CSB reads
URL : https://patchwork.freedesktop.org/series/42867/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b2a542fb03c9 drm/i915/execlists: Use rmb() to order CSB reads
-:31: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#31:
References: 61bf9719fa17 ("drm/i915/cnl: Use mmio access to context status buffer")
-:31: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit 61bf9719fa17 ("drm/i915/cnl: Use mmio access to context status buffer")'
#31:
References: 61bf9719fa17 ("drm/i915/cnl: Use mmio access to context status buffer")
total: 1 errors, 1 warnings, 0 checks, 16 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/execlists: Use rmb() to order CSB reads
2018-05-08 10:15 [PATCH] drm/i915/execlists: Use rmb() to order CSB reads Chris Wilson
2018-05-08 10:33 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
@ 2018-05-08 10:52 ` Patchwork
2018-05-08 12:04 ` ✓ Fi.CI.IGT: " Patchwork
` (5 subsequent siblings)
7 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2018-05-08 10:52 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/execlists: Use rmb() to order CSB reads
URL : https://patchwork.freedesktop.org/series/42867/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4153 -> Patchwork_8938 =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_8938 need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_8938, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/42867/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_8938:
=== IGT changes ===
==== Warnings ====
igt@gem_exec_gttfill@basic:
fi-pnv-d510: PASS -> SKIP
== Known issues ==
Here are the changes found in Patchwork_8938 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@gem_exec_suspend@basic-s3:
fi-skl-guc: PASS -> FAIL (fdo#105900, fdo#104699) +1
igt@kms_frontbuffer_tracking@basic:
{fi-hsw-peppy}: PASS -> DMESG-FAIL (fdo#106103, fdo#102614)
==== Possible fixes ====
igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
fi-bxt-j4205: FAIL (fdo#106436) -> PASS
igt@kms_pipe_crc_basic@read-crc-pipe-c-frame-sequence:
fi-glk-j4005: DMESG-WARN (fdo#106097) -> PASS +1
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#104699 https://bugs.freedesktop.org/show_bug.cgi?id=104699
fdo#105900 https://bugs.freedesktop.org/show_bug.cgi?id=105900
fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097
fdo#106103 https://bugs.freedesktop.org/show_bug.cgi?id=106103
fdo#106436 https://bugs.freedesktop.org/show_bug.cgi?id=106436
== Participating hosts (41 -> 37) ==
Missing (4): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-skl-6700hq
== Build changes ==
* Linux: CI_DRM_4153 -> Patchwork_8938
CI_DRM_4153: b360612517f613fdf14107a2f0bfc7f1f792a476 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4464: 1bb318b32db003a377da14715c7b80675a712b6b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_8938: b2a542fb03c946d9e6b127302a7ddb92ab779c41 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4464: 33e58d5583eb7ed3966a1b905f875a1dfa959f6b @ git://anongit.freedesktop.org/piglit
== Linux commits ==
b2a542fb03c9 drm/i915/execlists: Use rmb() to order CSB reads
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8938/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/execlists: Use rmb() to order CSB reads
2018-05-08 10:15 [PATCH] drm/i915/execlists: Use rmb() to order CSB reads Chris Wilson
2018-05-08 10:33 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2018-05-08 10:52 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2018-05-08 12:04 ` Patchwork
2018-05-08 12:46 ` [PATCH] " Timo Aaltonen
` (4 subsequent siblings)
7 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2018-05-08 12:04 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/execlists: Use rmb() to order CSB reads
URL : https://patchwork.freedesktop.org/series/42867/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4153_full -> Patchwork_8938_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_8938_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_8938_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/42867/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_8938_full:
=== IGT changes ===
==== Warnings ====
igt@kms_vblank@pipe-b-wait-busy-hang:
shard-kbl: PASS -> SKIP +12
== Known issues ==
Here are the changes found in Patchwork_8938_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_suspend@debugfs-reader:
shard-kbl: PASS -> DMESG-WARN (fdo#103558)
igt@kms_flip@2x-dpms-vs-vblank-race-interruptible:
shard-hsw: PASS -> FAIL (fdo#103060)
igt@kms_flip@2x-plain-flip-ts-check-interruptible:
shard-hsw: PASS -> FAIL (fdo#100368)
igt@kms_flip@absolute-wf_vblank-interruptible:
shard-glk: PASS -> FAIL (fdo#106087)
igt@kms_flip@flip-vs-modeset-vs-hang-interruptible:
shard-kbl: PASS -> DMESG-WARN (fdo#103558, fdo#103313, fdo#105602) +15
igt@kms_flip@flip-vs-wf_vblank-interruptible:
shard-glk: PASS -> FAIL (fdo#100368) +1
igt@kms_flip@nonblocking-read:
shard-kbl: PASS -> DMESG-WARN (fdo#103313)
igt@kms_frontbuffer_tracking@fbc-1p-indfb-fliptrack:
shard-kbl: PASS -> DMESG-WARN (fdo#103558, fdo#105602) +23
igt@kms_rotation_crc@primary-rotation-90:
shard-apl: PASS -> FAIL (fdo#104724, fdo#103925)
igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
shard-kbl: PASS -> DMESG-WARN (fdo#103558, fdo#105602, fdo#103841)
==== Possible fixes ====
igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
shard-hsw: FAIL (fdo#104873) -> PASS
igt@kms_cursor_legacy@flip-vs-cursor-toggle:
shard-hsw: FAIL (fdo#102670) -> PASS
igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible:
shard-glk: FAIL (fdo#100368) -> PASS
igt@kms_flip@plain-flip-ts-check:
shard-hsw: FAIL (fdo#100368) -> PASS
igt@kms_vblank@pipe-c-ts-continuation-modeset:
shard-kbl: DMESG-WARN (fdo#106247) -> PASS
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102670 https://bugs.freedesktop.org/show_bug.cgi?id=102670
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#103313 https://bugs.freedesktop.org/show_bug.cgi?id=103313
fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558
fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724
fdo#104873 https://bugs.freedesktop.org/show_bug.cgi?id=104873
fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
fdo#106087 https://bugs.freedesktop.org/show_bug.cgi?id=106087
fdo#106247 https://bugs.freedesktop.org/show_bug.cgi?id=106247
== Participating hosts (6 -> 5) ==
Missing (1): pig-snb-2600
== Build changes ==
* Linux: CI_DRM_4153 -> Patchwork_8938
CI_DRM_4153: b360612517f613fdf14107a2f0bfc7f1f792a476 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4464: 1bb318b32db003a377da14715c7b80675a712b6b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_8938: b2a542fb03c946d9e6b127302a7ddb92ab779c41 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4464: 33e58d5583eb7ed3966a1b905f875a1dfa959f6b @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8938/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH] drm/i915/execlists: Use rmb() to order CSB reads
2018-05-08 10:15 [PATCH] drm/i915/execlists: Use rmb() to order CSB reads Chris Wilson
` (2 preceding siblings ...)
2018-05-08 12:04 ` ✓ Fi.CI.IGT: " Patchwork
@ 2018-05-08 12:46 ` Timo Aaltonen
2018-05-08 12:52 ` Chris Wilson
` (3 subsequent siblings)
7 siblings, 0 replies; 12+ messages in thread
From: Timo Aaltonen @ 2018-05-08 12:46 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On 08.05.2018 13:15, Chris Wilson wrote:
> We assume that the CSB is written using the normal ringbuffer
> coherency protocols, as outlined in kernel/events/ring_buffer.c:
>
> * (HW) (DRIVER)
> *
> * if (LOAD ->data_tail) { LOAD ->data_head
> * (A) smp_rmb() (C)
> * STORE $data LOAD $data
> * smp_wmb() (B) smp_mb() (D)
> * STORE ->data_head STORE ->data_tail
> * }
>
> So we assume that the HW fulfils it's ordering requirements, and so we
> should use a complimentary rmb() to ensure that our read of its WRITE
> pointer is completed before we start accessing the data.
>
> The final mb() is implied by the uncached mmio we perform to inform the
> HW of our READ pointer.
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=105064
> References: https://bugs.freedesktop.org/show_bug.cgi?id=105888
> References: https://bugs.freedesktop.org/show_bug.cgi?id=106185
> References: 61bf9719fa17 ("drm/i915/cnl: Use mmio access to context status buffer")
> Suggested-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Michał Winiarski <michal.winiarski@intel.com>
> Cc: Rafael Antognolli <rafael.antognolli@intel.com>
> Cc: Michel Thierry <michel.thierry@intel.com>
> Cc: Timo Aaltonen <tjaalton@ubuntu.com>
Seems to work here on CNL-Y just like 61bf9719fa17.
Tested-by: Timo Aaltonen <tjaalton@ubuntu.com>
--
t
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH] drm/i915/execlists: Use rmb() to order CSB reads
2018-05-08 10:15 [PATCH] drm/i915/execlists: Use rmb() to order CSB reads Chris Wilson
` (3 preceding siblings ...)
2018-05-08 12:46 ` [PATCH] " Timo Aaltonen
@ 2018-05-08 12:52 ` Chris Wilson
2018-05-08 12:54 ` Chris Wilson
2018-05-08 13:21 ` Mika Kuoppala
2018-05-08 15:41 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/execlists: Use rmb() to order CSB reads (rev2) Patchwork
` (2 subsequent siblings)
7 siblings, 2 replies; 12+ messages in thread
From: Chris Wilson @ 2018-05-08 12:52 UTC (permalink / raw)
To: intel-gfx
We assume that the CSB is written using the normal ringbuffer
coherency protocols, as outlined in kernel/events/ring_buffer.c:
* (HW) (DRIVER)
*
* if (LOAD ->data_tail) { LOAD ->data_head
* (A) smp_rmb() (C)
* STORE $data LOAD $data
* smp_wmb() (B) smp_mb() (D)
* STORE ->data_head STORE ->data_tail
* }
So we assume that the HW fulfils it's ordering requirements (B), and so
we should use a complimentary rmb (C) to ensure that our read of its
WRITE pointer is completed before we start accessing the data.
The final mb (D) is implied by the uncached mmio we perform to inform
the HW of our READ pointer.
References: https://bugs.freedesktop.org/show_bug.cgi?id=105064
References: https://bugs.freedesktop.org/show_bug.cgi?id=105888
References: https://bugs.freedesktop.org/show_bug.cgi?id=106185
References: 61bf9719fa17 ("drm/i915/cnl: Use mmio access to context status buffer")
Suggested-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Rafael Antognolli <rafael.antognolli@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
Cc: Timo Aaltonen <tjaalton@ubuntu.com>
Tested-by: Timo Aaltonen <tjaalton@ubuntu.com>
---
Just tweaked the commitmsg to cross reference the mb against the
diagram.
-Chris
---
drivers/gpu/drm/i915/intel_engine_cs.c | 3 ---
drivers/gpu/drm/i915/intel_lrc.c | 1 +
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index 70325e0824e3..8303e05b0c7d 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -470,9 +470,6 @@ static bool csb_force_mmio(struct drm_i915_private *i915)
if (intel_vgpu_active(i915) && !intel_vgpu_has_hwsp_emulation(i915))
return true;
- if (IS_CANNONLAKE(i915))
- return true;
-
return false;
}
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 911f288f78aa..8977600f0d81 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -992,6 +992,7 @@ static void execlists_submission_tasklet(unsigned long data)
head = execlists->csb_head;
tail = READ_ONCE(buf[write_idx]);
+ rmb(); /* Hopefully paired with a wmb() in HW */
}
GEM_TRACE("%s cs-irq head=%d [%d%s], tail=%d [%d%s]\n",
engine->name,
--
2.17.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH] drm/i915/execlists: Use rmb() to order CSB reads
2018-05-08 12:52 ` Chris Wilson
@ 2018-05-08 12:54 ` Chris Wilson
2018-05-08 13:21 ` Mika Kuoppala
1 sibling, 0 replies; 12+ messages in thread
From: Chris Wilson @ 2018-05-08 12:54 UTC (permalink / raw)
To: intel-gfx; +Cc: Mika
Quoting Chris Wilson (2018-05-08 13:52:30)
> We assume that the CSB is written using the normal ringbuffer
> coherency protocols, as outlined in kernel/events/ring_buffer.c:
>
> * (HW) (DRIVER)
> *
> * if (LOAD ->data_tail) { LOAD ->data_head
> * (A) smp_rmb() (C)
> * STORE $data LOAD $data
> * smp_wmb() (B) smp_mb() (D)
> * STORE ->data_head STORE ->data_tail
> * }
>
> So we assume that the HW fulfils it's ordering requirements (B), and so
> we should use a complimentary rmb (C) to ensure that our read of its
> WRITE pointer is completed before we start accessing the data.
>
> The final mb (D) is implied by the uncached mmio we perform to inform
> the HW of our READ pointer.
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=105064
> References: https://bugs.freedesktop.org/show_bug.cgi?id=105888
> References: https://bugs.freedesktop.org/show_bug.cgi?id=106185
> References: 61bf9719fa17 ("drm/i915/cnl: Use mmio access to context status buffer")
> Suggested-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Michał Winiarski <michal.winiarski@intel.com>
> Cc: Rafael Antognolli <rafael.antognolli@intel.com>
> Cc: Michel Thierry <michel.thierry@intel.com>
> Cc: Timo Aaltonen <tjaalton@ubuntu.com>
> Tested-by: Timo Aaltonen <tjaalton@ubuntu.com>
> ---
>
> Just tweaked the commitmsg to cross reference the mb against the
> diagram.
And still forgot to fix s/it's/its/
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH] drm/i915/execlists: Use rmb() to order CSB reads
2018-05-08 12:52 ` Chris Wilson
2018-05-08 12:54 ` Chris Wilson
@ 2018-05-08 13:21 ` Mika Kuoppala
2018-05-08 13:30 ` Chris Wilson
1 sibling, 1 reply; 12+ messages in thread
From: Mika Kuoppala @ 2018-05-08 13:21 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Chris Wilson <chris@chris-wilson.co.uk> writes:
> We assume that the CSB is written using the normal ringbuffer
> coherency protocols, as outlined in kernel/events/ring_buffer.c:
>
> * (HW) (DRIVER)
> *
> * if (LOAD ->data_tail) { LOAD ->data_head
> * (A) smp_rmb() (C)
> * STORE $data LOAD $data
> * smp_wmb() (B) smp_mb() (D)
> * STORE ->data_head STORE ->data_tail
> * }
>
> So we assume that the HW fulfils it's ordering requirements (B), and so
> we should use a complimentary rmb (C) to ensure that our read of its
> WRITE pointer is completed before we start accessing the data.
>
> The final mb (D) is implied by the uncached mmio we perform to inform
> the HW of our READ pointer.
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=105064
> References: https://bugs.freedesktop.org/show_bug.cgi?id=105888
> References: https://bugs.freedesktop.org/show_bug.cgi?id=106185
> References: 61bf9719fa17 ("drm/i915/cnl: Use mmio access to context status buffer")
> Suggested-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Michał Winiarski <michal.winiarski@intel.com>
> Cc: Rafael Antognolli <rafael.antognolli@intel.com>
> Cc: Michel Thierry <michel.thierry@intel.com>
> Cc: Timo Aaltonen <tjaalton@ubuntu.com>
> Tested-by: Timo Aaltonen <tjaalton@ubuntu.com>
> ---
>
> Just tweaked the commitmsg to cross reference the mb against the
> diagram.
> -Chris
>
> ---
> drivers/gpu/drm/i915/intel_engine_cs.c | 3 ---
> drivers/gpu/drm/i915/intel_lrc.c | 1 +
> 2 files changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index 70325e0824e3..8303e05b0c7d 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -470,9 +470,6 @@ static bool csb_force_mmio(struct drm_i915_private *i915)
> if (intel_vgpu_active(i915) && !intel_vgpu_has_hwsp_emulation(i915))
> return true;
>
> - if (IS_CANNONLAKE(i915))
> - return true;
> -
> return false;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 911f288f78aa..8977600f0d81 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -992,6 +992,7 @@ static void execlists_submission_tasklet(unsigned long data)
>
> head = execlists->csb_head;
> tail = READ_ONCE(buf[write_idx]);
> + rmb(); /* Hopefully paired with a wmb() in HW */
If the gpu does ordered writes (with write buffer in between), this is ok.
If the gpu does not order writes, we would still need the rmb()
to prevent cpu from loading an stale csb entry ahead of tail read?
Quoting memory-barries.txt:
" (*) loads may be done speculatively, leading to the result having been fetched
at the wrong time in the expected sequence of events;
"
So I would change the comment to /* Enforce tail vs csb entry read order */
-Mika
> }
> GEM_TRACE("%s cs-irq head=%d [%d%s], tail=%d [%d%s]\n",
> engine->name,
> --
> 2.17.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH] drm/i915/execlists: Use rmb() to order CSB reads
2018-05-08 13:21 ` Mika Kuoppala
@ 2018-05-08 13:30 ` Chris Wilson
0 siblings, 0 replies; 12+ messages in thread
From: Chris Wilson @ 2018-05-08 13:30 UTC (permalink / raw)
To: Mika Kuoppala, intel-gfx; +Cc: Joonas
Quoting Mika Kuoppala (2018-05-08 14:21:34)
> Chris Wilson <chris@chris-wilson.co.uk> writes:
>
> > We assume that the CSB is written using the normal ringbuffer
> > coherency protocols, as outlined in kernel/events/ring_buffer.c:
> >
> > * (HW) (DRIVER)
> > *
> > * if (LOAD ->data_tail) { LOAD ->data_head
> > * (A) smp_rmb() (C)
> > * STORE $data LOAD $data
> > * smp_wmb() (B) smp_mb() (D)
> > * STORE ->data_head STORE ->data_tail
> > * }
> >
> > So we assume that the HW fulfils it's ordering requirements (B), and so
> > we should use a complimentary rmb (C) to ensure that our read of its
> > WRITE pointer is completed before we start accessing the data.
> >
> > The final mb (D) is implied by the uncached mmio we perform to inform
> > the HW of our READ pointer.
> >
> > References: https://bugs.freedesktop.org/show_bug.cgi?id=105064
> > References: https://bugs.freedesktop.org/show_bug.cgi?id=105888
> > References: https://bugs.freedesktop.org/show_bug.cgi?id=106185
> > References: 61bf9719fa17 ("drm/i915/cnl: Use mmio access to context status buffer")
> > Suggested-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > Cc: Michał Winiarski <michal.winiarski@intel.com>
> > Cc: Rafael Antognolli <rafael.antognolli@intel.com>
> > Cc: Michel Thierry <michel.thierry@intel.com>
> > Cc: Timo Aaltonen <tjaalton@ubuntu.com>
> > Tested-by: Timo Aaltonen <tjaalton@ubuntu.com>
> > ---
> >
> > Just tweaked the commitmsg to cross reference the mb against the
> > diagram.
> > -Chris
> >
> > ---
> > drivers/gpu/drm/i915/intel_engine_cs.c | 3 ---
> > drivers/gpu/drm/i915/intel_lrc.c | 1 +
> > 2 files changed, 1 insertion(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> > index 70325e0824e3..8303e05b0c7d 100644
> > --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> > +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> > @@ -470,9 +470,6 @@ static bool csb_force_mmio(struct drm_i915_private *i915)
> > if (intel_vgpu_active(i915) && !intel_vgpu_has_hwsp_emulation(i915))
> > return true;
> >
> > - if (IS_CANNONLAKE(i915))
> > - return true;
> > -
> > return false;
> > }
> >
> > diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> > index 911f288f78aa..8977600f0d81 100644
> > --- a/drivers/gpu/drm/i915/intel_lrc.c
> > +++ b/drivers/gpu/drm/i915/intel_lrc.c
> > @@ -992,6 +992,7 @@ static void execlists_submission_tasklet(unsigned long data)
> >
> > head = execlists->csb_head;
> > tail = READ_ONCE(buf[write_idx]);
> > + rmb(); /* Hopefully paired with a wmb() in HW */
>
> If the gpu does ordered writes (with write buffer in between), this is ok.
>
> If the gpu does not order writes, we would still need the rmb()
> to prevent cpu from loading an stale csb entry ahead of tail read?
>
> Quoting memory-barries.txt:
> " (*) loads may be done speculatively, leading to the result having been fetched
> at the wrong time in the expected sequence of events;
> "
>
> So I would change the comment to /* Enforce tail vs csb entry read order */
Barriers are always paired, and the comment should tell the reader where
the other barrier is. Otherwise we would just need read_barrier_depends()
to enforce the read order (which is just READ_ONCE).
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915/execlists: Use rmb() to order CSB reads (rev2)
2018-05-08 10:15 [PATCH] drm/i915/execlists: Use rmb() to order CSB reads Chris Wilson
` (4 preceding siblings ...)
2018-05-08 12:52 ` Chris Wilson
@ 2018-05-08 15:41 ` Patchwork
2018-05-08 15:57 ` ✓ Fi.CI.BAT: success " Patchwork
2018-05-08 18:40 ` ✓ Fi.CI.IGT: " Patchwork
7 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2018-05-08 15:41 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/execlists: Use rmb() to order CSB reads (rev2)
URL : https://patchwork.freedesktop.org/series/42867/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
69f939942cdf drm/i915/execlists: Use rmb() to order CSB reads
-:31: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#31:
References: 61bf9719fa17 ("drm/i915/cnl: Use mmio access to context status buffer")
-:31: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit 61bf9719fa17 ("drm/i915/cnl: Use mmio access to context status buffer")'
#31:
References: 61bf9719fa17 ("drm/i915/cnl: Use mmio access to context status buffer")
total: 1 errors, 1 warnings, 0 checks, 16 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/execlists: Use rmb() to order CSB reads (rev2)
2018-05-08 10:15 [PATCH] drm/i915/execlists: Use rmb() to order CSB reads Chris Wilson
` (5 preceding siblings ...)
2018-05-08 15:41 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/execlists: Use rmb() to order CSB reads (rev2) Patchwork
@ 2018-05-08 15:57 ` Patchwork
2018-05-08 18:40 ` ✓ Fi.CI.IGT: " Patchwork
7 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2018-05-08 15:57 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/execlists: Use rmb() to order CSB reads (rev2)
URL : https://patchwork.freedesktop.org/series/42867/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4158 -> Patchwork_8943 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/42867/revisions/2/mbox/
== Known issues ==
Here are the changes found in Patchwork_8943 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@debugfs_test@read_all_entries:
fi-snb-2520m: PASS -> INCOMPLETE (fdo#103713)
==== Possible fixes ====
igt@drv_module_reload@basic-reload:
fi-bsw-n3050: DMESG-FAIL (fdo#106373) -> PASS
igt@gem_exec_suspend@basic-s3:
fi-skl-guc: FAIL (fdo#105900, fdo#104699) -> PASS
igt@gem_exec_suspend@basic-s4-devices:
fi-kbl-7500u: DMESG-WARN (fdo#105128) -> PASS
igt@kms_frontbuffer_tracking@basic:
fi-hsw-4200u: DMESG-FAIL (fdo#106103, fdo#102614) -> PASS
fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#104699 https://bugs.freedesktop.org/show_bug.cgi?id=104699
fdo#105128 https://bugs.freedesktop.org/show_bug.cgi?id=105128
fdo#105900 https://bugs.freedesktop.org/show_bug.cgi?id=105900
fdo#106103 https://bugs.freedesktop.org/show_bug.cgi?id=106103
fdo#106373 https://bugs.freedesktop.org/show_bug.cgi?id=106373
== Participating hosts (40 -> 36) ==
Missing (4): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-skl-6700hq
== Build changes ==
* Linux: CI_DRM_4158 -> Patchwork_8943
CI_DRM_4158: b4cf5831333d423c2420f167111c03e4c1729672 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4465: 41eb85f918b02918787fc59d9cb5aab93b81f323 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_8943: 69f939942cdf1f39ebf42fc376e95be8ef5a89f6 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4465: 33e58d5583eb7ed3966a1b905f875a1dfa959f6b @ git://anongit.freedesktop.org/piglit
== Linux commits ==
69f939942cdf drm/i915/execlists: Use rmb() to order CSB reads
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8943/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/execlists: Use rmb() to order CSB reads (rev2)
2018-05-08 10:15 [PATCH] drm/i915/execlists: Use rmb() to order CSB reads Chris Wilson
` (6 preceding siblings ...)
2018-05-08 15:57 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2018-05-08 18:40 ` Patchwork
7 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2018-05-08 18:40 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/execlists: Use rmb() to order CSB reads (rev2)
URL : https://patchwork.freedesktop.org/series/42867/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4158_full -> Patchwork_8943_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_8943_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_8943_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/42867/revisions/2/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_8943_full:
=== IGT changes ===
==== Warnings ====
igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
shard-hsw: SKIP -> PASS
igt@kms_vblank@pipe-c-wait-forked:
shard-kbl: PASS -> SKIP +6
== Known issues ==
Here are the changes found in Patchwork_8943_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move:
shard-kbl: PASS -> DMESG-WARN (fdo#103558, fdo#105602) +2
igt@perf@blocking:
shard-hsw: PASS -> FAIL (fdo#102252)
igt@pm_rpm@universal-planes:
shard-kbl: PASS -> DMESG-WARN (fdo#103558, fdo#103313)
==== Possible fixes ====
igt@drv_selftest@live_gtt:
shard-apl: DMESG-FAIL -> PASS
igt@drv_selftest@live_hugepages:
shard-apl: INCOMPLETE (fdo#103927) -> PASS
igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
shard-hsw: FAIL (fdo#104873) -> PASS
igt@kms_flip@2x-plain-flip-ts-check:
shard-hsw: FAIL (fdo#103928) -> PASS
igt@kms_flip@absolute-wf_vblank-interruptible:
shard-glk: FAIL (fdo#106087) -> PASS
igt@kms_flip@plain-flip-ts-check-interruptible:
shard-glk: FAIL (fdo#105312) -> PASS
igt@kms_flip@wf_vblank-ts-check-interruptible:
shard-kbl: DMESG-WARN (fdo#103558, fdo#105602) -> PASS +4
igt@kms_rotation_crc@primary-rotation-270:
shard-apl: FAIL (fdo#104724, fdo#103925) -> PASS +1
igt@kms_setmode@basic:
shard-apl: FAIL (fdo#99912) -> PASS
shard-glk: FAIL (fdo#99912) -> PASS
igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend:
shard-kbl: INCOMPLETE (fdo#103665) -> PASS
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#103313 https://bugs.freedesktop.org/show_bug.cgi?id=103313
fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558
fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928
fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724
fdo#104873 https://bugs.freedesktop.org/show_bug.cgi?id=104873
fdo#105312 https://bugs.freedesktop.org/show_bug.cgi?id=105312
fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
fdo#106087 https://bugs.freedesktop.org/show_bug.cgi?id=106087
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
== Participating hosts (5 -> 5) ==
No changes in participating hosts
== Build changes ==
* Linux: CI_DRM_4158 -> Patchwork_8943
CI_DRM_4158: b4cf5831333d423c2420f167111c03e4c1729672 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4465: 41eb85f918b02918787fc59d9cb5aab93b81f323 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_8943: 69f939942cdf1f39ebf42fc376e95be8ef5a89f6 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4465: 33e58d5583eb7ed3966a1b905f875a1dfa959f6b @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8943/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2018-05-08 18:40 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-05-08 10:15 [PATCH] drm/i915/execlists: Use rmb() to order CSB reads Chris Wilson
2018-05-08 10:33 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2018-05-08 10:52 ` ✓ Fi.CI.BAT: success " Patchwork
2018-05-08 12:04 ` ✓ Fi.CI.IGT: " Patchwork
2018-05-08 12:46 ` [PATCH] " Timo Aaltonen
2018-05-08 12:52 ` Chris Wilson
2018-05-08 12:54 ` Chris Wilson
2018-05-08 13:21 ` Mika Kuoppala
2018-05-08 13:30 ` Chris Wilson
2018-05-08 15:41 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/execlists: Use rmb() to order CSB reads (rev2) Patchwork
2018-05-08 15:57 ` ✓ Fi.CI.BAT: success " Patchwork
2018-05-08 18:40 ` ✓ Fi.CI.IGT: " Patchwork
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.