From: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> To: Borislav Petkov <bp@alien8.de>, evgreen@chromium.org, robh@kernel.org, mchehab@kernel.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Gross <andy.gross@linaro.org>, David Brown <david.brown@linaro.org>, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, tsoni@codeaurora.org, ckadabi@codeaurora.org, rishabhb@codeaurora.org, swboyd@chromium.org, bjorn.andersson@linaro.org, Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Cc: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Subject: [PATCH v5 4/4] dt-bindings: msm: Update documentation of qcom,llcc Date: Mon, 10 Sep 2018 16:46:55 -0700 [thread overview] Message-ID: <1536623215-20018-5-git-send-email-vnkgutta@codeaurora.org> (raw) In-Reply-To: <1536623215-20018-1-git-send-email-vnkgutta@codeaurora.org> Add reg-names and interrupts for LLCC documentation and the usage examples. llcc broadcast base is added in addition to llcc base, which is used for llcc broadcast writes. Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> --- .../devicetree/bindings/arm/msm/qcom,llcc.txt | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt index 5e85749..eaee06b 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt @@ -16,11 +16,26 @@ Properties: - reg: Usage: required Value Type: <prop-encoded-array> - Definition: Start address and the the size of the register region. + Definition: The first element specifies the llcc base start address and + the size of the register region. The second element specifies + the llcc broadcast base address and size of the register region. + +- reg-names: + Usage: required + Value Type: <stringlist> + Definition: Register region names. Must be "llcc_base", "llcc_broadcast_base". + +- interrupts: + Usage: required + Definition: The interrupt is associated with the llcc edac device. + It's used for llcc cache single and double bit error detection + and reporting. Example: cache-controller@1100000 { compatible = "qcom,sdm845-llcc"; - reg = <0x1100000 0x250000>; + reg = <0x1100000 0x200000>, <0x1300000 0x50000> ; + reg-names = "llcc_base", "llcc_broadcast_base"; + interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; }; -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
WARNING: multiple messages have this Message-ID (diff)
From: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> To: Borislav Petkov <bp@alien8.de>, evgreen@chromium.org, robh@kernel.org, mchehab@kernel.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Gross <andy.gross@linaro.org>, David Brown <david.brown@linaro.org>, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, tsoni@codeaurora.org, ckadabi@codeaurora.org, rishabhb@codeaurora.org, swboyd@chromium.org, bjorn.andersson@linaro.org, Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Cc: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Subject: [v5,4/4] dt-bindings: msm: Update documentation of qcom,llcc Date: Mon, 10 Sep 2018 16:46:55 -0700 [thread overview] Message-ID: <1536623215-20018-5-git-send-email-vnkgutta@codeaurora.org> (raw) Add reg-names and interrupts for LLCC documentation and the usage examples. llcc broadcast base is added in addition to llcc base, which is used for llcc broadcast writes. Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> --- .../devicetree/bindings/arm/msm/qcom,llcc.txt | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt index 5e85749..eaee06b 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt @@ -16,11 +16,26 @@ Properties: - reg: Usage: required Value Type: <prop-encoded-array> - Definition: Start address and the the size of the register region. + Definition: The first element specifies the llcc base start address and + the size of the register region. The second element specifies + the llcc broadcast base address and size of the register region. + +- reg-names: + Usage: required + Value Type: <stringlist> + Definition: Register region names. Must be "llcc_base", "llcc_broadcast_base". + +- interrupts: + Usage: required + Definition: The interrupt is associated with the llcc edac device. + It's used for llcc cache single and double bit error detection + and reporting. Example: cache-controller@1100000 { compatible = "qcom,sdm845-llcc"; - reg = <0x1100000 0x250000>; + reg = <0x1100000 0x200000>, <0x1300000 0x50000> ; + reg-names = "llcc_base", "llcc_broadcast_base"; + interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; };
next prev parent reply other threads:[~2018-09-10 23:46 UTC|newest] Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-09-10 23:46 [PATCH v5 0/4] Add EDAC driver for QCOM SoCs Venkata Narendra Kumar Gutta 2018-09-10 23:46 ` [PATCH v5 1/4] drivers: soc: Add broadcast base for Last Level Cache Controller (LLCC) Venkata Narendra Kumar Gutta 2018-09-10 23:46 ` [v5,1/4] " Venkata Narendra Kumar Gutta 2018-09-10 23:46 ` [PATCH v5 2/4] drivers: soc: Add support to register LLCC EDAC driver Venkata Narendra Kumar Gutta 2018-09-10 23:46 ` [v5,2/4] " Venkata Narendra Kumar Gutta 2018-09-10 23:46 ` [PATCH v5 3/4] drivers: edac: Add EDAC driver support for QCOM SoCs Venkata Narendra Kumar Gutta 2018-09-10 23:46 ` [v5,3/4] " Venkata Narendra Kumar Gutta 2018-09-10 23:46 ` Venkata Narendra Kumar Gutta [this message] 2018-09-10 23:46 ` [v5,4/4] dt-bindings: msm: Update documentation of qcom,llcc Venkata Narendra Kumar Gutta
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