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From: Stephen Boyd <sboyd@kernel.org>
To: Jerome Brunet <jbrunet@baylibre.com>,
	Jianxin Pan <jianxin.pan@amlogic.com>,
	Neil Armstrong <narmstrong@baylibre.com>
Cc: Yixun Lan <yixun.lan@amlogic.com>,
	Jianxin Pan <jianxin.pan@amlogic.com>,
	Kevin Hilman <khilman@baylibre.com>,
	Carlo Caione <carlo@caione.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Rob Herring <robh@kernel.org>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Boris Brezillon <boris.brezillon@bootlin.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	Liang Yang <liang.yang@amlogic.com>,
	Jian Hu <jian.hu@amlogic.com>,
	Qiufang Dai <qiufang.dai@amlogic.com>,
	Hanjie Lin <hanjie.lin@amlogic.com>,
	Victor Wan <victor.wan@amlogic.com>,
	linux-clk@vger.kernel.org, linux-amlogic@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v5 1/3] clk: meson: add emmc sub clock phase delay driver
Date: Thu, 18 Oct 2018 10:14:31 -0700	[thread overview]
Message-ID: <153988287137.5275.1146335138540290297@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <1539839245-13793-2-git-send-email-jianxin.pan@amlogic.com>

Quoting Jianxin Pan (2018-10-17 22:07:23)
> diff --git a/drivers/clk/meson/clkc.h b/drivers/clk/meson/clkc.h
> index 6b96d55..3309d78 100644
> --- a/drivers/clk/meson/clkc.h
> +++ b/drivers/clk/meson/clkc.h
> @@ -105,6 +105,18 @@ struct clk_regmap _name = {                                                \
>         },                                                              \
>  };
>  
> +struct meson_clk_phase_delay_data {
> +       struct parm                     phase;
> +       struct parm                     delay;
> +       unsigned int                    delay_step_ps;
> +};
> +
> +static inline struct meson_clk_phase_delay_data *
> +meson_clk_get_phase_delay_data(struct clk_regmap *clk)
> +{
> +       return (struct meson_clk_phase_delay_data *)clk->data;

Is data a void *? If so, please drop the useless cast.

> +}
> +
>  /* clk_ops */
>  extern const struct clk_ops meson_clk_pll_ro_ops;
>  extern const struct clk_ops meson_clk_pll_ops;

WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <sboyd@kernel.org>
To: Jerome Brunet <jbrunet@baylibre.com>,
	Neil Armstrong <narmstrong@baylibre.com>
Cc: Yixun Lan <yixun.lan@amlogic.com>,
	Jianxin Pan <jianxin.pan@amlogic.com>,
	Kevin Hilman <khilman@baylibre.com>,
	Carlo Caione <carlo@caione.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Rob Herring <robh@kernel.org>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Boris Brezillon <boris.brezillon@bootlin.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	Liang Yang <liang.yang@amlogic.com>,
	Jian Hu <jian.hu@amlogic.com>,
	Qiufang Dai <qiufang.dai@amlogic.com>,
	Hanjie Lin <hanjie.lin@amlogic.com>,
	Victor Wan <victor.wan@amlogic.com>,
	linux-clk@vger.kernel.org, linux-amlogic@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v5 1/3] clk: meson: add emmc sub clock phase delay driver
Date: Thu, 18 Oct 2018 10:14:31 -0700	[thread overview]
Message-ID: <153988287137.5275.1146335138540290297@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <1539839245-13793-2-git-send-email-jianxin.pan@amlogic.com>

Quoting Jianxin Pan (2018-10-17 22:07:23)
> diff --git a/drivers/clk/meson/clkc.h b/drivers/clk/meson/clkc.h
> index 6b96d55..3309d78 100644
> --- a/drivers/clk/meson/clkc.h
> +++ b/drivers/clk/meson/clkc.h
> @@ -105,6 +105,18 @@ struct clk_regmap _name = {                                                \
>         },                                                              \
>  };
>  
> +struct meson_clk_phase_delay_data {
> +       struct parm                     phase;
> +       struct parm                     delay;
> +       unsigned int                    delay_step_ps;
> +};
> +
> +static inline struct meson_clk_phase_delay_data *
> +meson_clk_get_phase_delay_data(struct clk_regmap *clk)
> +{
> +       return (struct meson_clk_phase_delay_data *)clk->data;

Is data a void *? If so, please drop the useless cast.

> +}
> +
>  /* clk_ops */
>  extern const struct clk_ops meson_clk_pll_ro_ops;
>  extern const struct clk_ops meson_clk_pll_ops;

WARNING: multiple messages have this Message-ID (diff)
From: sboyd@kernel.org (Stephen Boyd)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 1/3] clk: meson: add emmc sub clock phase delay driver
Date: Thu, 18 Oct 2018 10:14:31 -0700	[thread overview]
Message-ID: <153988287137.5275.1146335138540290297@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <1539839245-13793-2-git-send-email-jianxin.pan@amlogic.com>

Quoting Jianxin Pan (2018-10-17 22:07:23)
> diff --git a/drivers/clk/meson/clkc.h b/drivers/clk/meson/clkc.h
> index 6b96d55..3309d78 100644
> --- a/drivers/clk/meson/clkc.h
> +++ b/drivers/clk/meson/clkc.h
> @@ -105,6 +105,18 @@ struct clk_regmap _name = {                                                \
>         },                                                              \
>  };
>  
> +struct meson_clk_phase_delay_data {
> +       struct parm                     phase;
> +       struct parm                     delay;
> +       unsigned int                    delay_step_ps;
> +};
> +
> +static inline struct meson_clk_phase_delay_data *
> +meson_clk_get_phase_delay_data(struct clk_regmap *clk)
> +{
> +       return (struct meson_clk_phase_delay_data *)clk->data;

Is data a void *? If so, please drop the useless cast.

> +}
> +
>  /* clk_ops */
>  extern const struct clk_ops meson_clk_pll_ro_ops;
>  extern const struct clk_ops meson_clk_pll_ops;

WARNING: multiple messages have this Message-ID (diff)
From: sboyd@kernel.org (Stephen Boyd)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH v5 1/3] clk: meson: add emmc sub clock phase delay driver
Date: Thu, 18 Oct 2018 10:14:31 -0700	[thread overview]
Message-ID: <153988287137.5275.1146335138540290297@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <1539839245-13793-2-git-send-email-jianxin.pan@amlogic.com>

Quoting Jianxin Pan (2018-10-17 22:07:23)
> diff --git a/drivers/clk/meson/clkc.h b/drivers/clk/meson/clkc.h
> index 6b96d55..3309d78 100644
> --- a/drivers/clk/meson/clkc.h
> +++ b/drivers/clk/meson/clkc.h
> @@ -105,6 +105,18 @@ struct clk_regmap _name = {                                                \
>         },                                                              \
>  };
>  
> +struct meson_clk_phase_delay_data {
> +       struct parm                     phase;
> +       struct parm                     delay;
> +       unsigned int                    delay_step_ps;
> +};
> +
> +static inline struct meson_clk_phase_delay_data *
> +meson_clk_get_phase_delay_data(struct clk_regmap *clk)
> +{
> +       return (struct meson_clk_phase_delay_data *)clk->data;

Is data a void *? If so, please drop the useless cast.

> +}
> +
>  /* clk_ops */
>  extern const struct clk_ops meson_clk_pll_ro_ops;
>  extern const struct clk_ops meson_clk_pll_ops;

  reply	other threads:[~2018-10-18 17:14 UTC|newest]

Thread overview: 109+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-18  5:07 [PATCH v5 0/3] clk: meson: add a sub EMMC clock controller support Jianxin Pan
2018-10-18  5:07 ` Jianxin Pan
2018-10-18  5:07 ` Jianxin Pan
2018-10-18  5:07 ` Jianxin Pan
2018-10-18  5:07 ` [PATCH v5 1/3] clk: meson: add emmc sub clock phase delay driver Jianxin Pan
2018-10-18  5:07   ` Jianxin Pan
2018-10-18  5:07   ` Jianxin Pan
2018-10-18  5:07   ` Jianxin Pan
2018-10-18 17:14   ` Stephen Boyd [this message]
2018-10-18 17:14     ` Stephen Boyd
2018-10-18 17:14     ` Stephen Boyd
2018-10-18 17:14     ` Stephen Boyd
2018-10-24  8:58   ` Jerome Brunet
2018-10-24  8:58     ` Jerome Brunet
2018-10-24  8:58     ` Jerome Brunet
2018-10-24 10:57     ` Jianxin Pan
2018-10-24 10:57       ` Jianxin Pan
2018-10-24 10:57       ` Jianxin Pan
2018-10-24 10:57       ` Jianxin Pan
2018-10-18  5:07 ` [PATCH v5 2/3] clk: meson: add DT documentation for emmc clock controller Jianxin Pan
2018-10-18  5:07   ` Jianxin Pan
2018-10-18  5:07   ` Jianxin Pan
2018-10-18 17:08   ` Stephen Boyd
2018-10-18 17:08     ` Stephen Boyd
2018-10-18 17:08     ` Stephen Boyd
2018-10-19 15:50     ` Jianxin Pan
2018-10-19 15:50       ` Jianxin Pan
2018-10-19 15:50       ` Jianxin Pan
2018-10-19 18:04       ` Stephen Boyd
2018-10-19 18:04         ` Stephen Boyd
2018-10-19 18:04         ` Stephen Boyd
2018-10-22  6:05         ` Jianxin Pan
2018-10-22  6:05           ` Jianxin Pan
2018-10-22  6:05           ` Jianxin Pan
2018-10-24  8:58   ` Jerome Brunet
2018-10-24  8:58     ` Jerome Brunet
2018-10-24  8:58     ` Jerome Brunet
2018-10-25  7:29     ` Yixun Lan
2018-10-25  7:29       ` Yixun Lan
2018-10-25  7:29       ` Yixun Lan
2018-10-25 11:50       ` Jianxin Pan
2018-10-25 11:50         ` Jianxin Pan
2018-10-25 11:50         ` Jianxin Pan
2018-11-04  3:04       ` Stephen Boyd
2018-11-04  3:04         ` Stephen Boyd
2018-11-04  3:04         ` Stephen Boyd
2018-11-04 15:39         ` Jianxin Pan
2018-11-04 15:39           ` Jianxin Pan
2018-11-04 15:39           ` Jianxin Pan
2018-10-18  5:07 ` [PATCH v5 3/3] clk: meson: add sub MMC clock controller driver Jianxin Pan
2018-10-18  5:07   ` Jianxin Pan
2018-10-18  5:07   ` Jianxin Pan
2018-10-18 17:13   ` Stephen Boyd
2018-10-18 17:13     ` Stephen Boyd
2018-10-18 17:13     ` Stephen Boyd
2018-10-19 16:12     ` Jianxin Pan
2018-10-19 16:12       ` Jianxin Pan
2018-10-19 16:12       ` Jianxin Pan
2018-10-19 18:03       ` Stephen Boyd
2018-10-19 18:03         ` Stephen Boyd
2018-10-19 18:03         ` Stephen Boyd
2018-10-22  5:59         ` Jianxin Pan
2018-10-22  5:59           ` Jianxin Pan
2018-10-22  5:59           ` Jianxin Pan
2018-10-24  9:00         ` Jerome Brunet
2018-10-24  9:00           ` Jerome Brunet
2018-10-24  9:00           ` Jerome Brunet
2018-10-24  6:29     ` Jianxin Pan
2018-10-24  6:29       ` Jianxin Pan
2018-10-24  6:29       ` Jianxin Pan
2018-10-24  8:47       ` Stephen Boyd
2018-10-24  8:47         ` Stephen Boyd
2018-10-24  8:47         ` Stephen Boyd
2018-10-24  8:51         ` Jianxin Pan
2018-10-24  8:51           ` Jianxin Pan
2018-10-24  8:51           ` Jianxin Pan
2018-10-24  9:01   ` Jerome Brunet
2018-10-24  9:01     ` Jerome Brunet
2018-10-24  9:01     ` Jerome Brunet
2018-10-25 11:48     ` Jianxin Pan
2018-10-25 11:48       ` Jianxin Pan
2018-10-25 11:48       ` Jianxin Pan
2018-10-25 12:54       ` Jerome Brunet
2018-10-25 12:54         ` Jerome Brunet
2018-10-25 12:54         ` Jerome Brunet
2018-10-25 20:58         ` Martin Blumenstingl
2018-10-25 20:58           ` Martin Blumenstingl
2018-10-25 20:58           ` Martin Blumenstingl
2018-10-28 19:16           ` Jerome Brunet
2018-10-28 19:16             ` Jerome Brunet
2018-10-28 19:16             ` Jerome Brunet
2018-10-29 19:45             ` Martin Blumenstingl
2018-10-29 19:45               ` Martin Blumenstingl
2018-10-29 19:45               ` Martin Blumenstingl
2018-10-30 13:41             ` Jianxin Pan
2018-10-30 13:41               ` Jianxin Pan
2018-10-30 13:41               ` Jianxin Pan
2018-11-03 18:01             ` Jianxin Pan
2018-11-03 18:01               ` Jianxin Pan
2018-11-03 18:01               ` Jianxin Pan
2018-11-05  9:46               ` jbrunet
2018-11-05  9:46                 ` jbrunet at baylibre.com
2018-11-05  9:46                 ` jbrunet at baylibre.com
2018-11-05 11:29                 ` Jianxin Pan
2018-11-05 11:29                   ` Jianxin Pan
2018-11-05 11:29                   ` Jianxin Pan
2018-10-28 15:12         ` Jianxin Pan
2018-10-28 15:12           ` Jianxin Pan
2018-10-28 15:12           ` Jianxin Pan

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