* [Intel-gfx] [PATCH] drm/i915/pmu: Correct the rc6 offset upon enabling
@ 2020-01-13 22:04 Chris Wilson
2020-01-13 22:08 ` Chris Wilson
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Chris Wilson @ 2020-01-13 22:04 UTC (permalink / raw)
To: intel-gfx
The rc6 residency starts ticking from 0 from BIOS POST, but the kernel
starts measuring the time from its boot. If we start measuruing
I915_PMU_RC6_RESIDENCY while the GT is idle, we start our sampling from
0 and then upon first activity (park/unpark) add in all the rc6
residency since boot. After the first park with the sampler engaged, the
sleep/active counters are aligned.
Fixes: df6a42053513 ("drm/i915/pmu: Ensure monotonic rc6")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/i915_pmu.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 28a82c849bac..fe0f3e0aa4ce 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -648,6 +648,13 @@ static void i915_pmu_enable(struct perf_event *event)
BUILD_BUG_ON(ARRAY_SIZE(pmu->enable_count) != I915_PMU_MASK_BITS);
GEM_BUG_ON(bit >= ARRAY_SIZE(pmu->enable_count));
GEM_BUG_ON(pmu->enable_count[bit] == ~0);
+
+ if (pmu->enable_count[bit] == 0 &&
+ config_enabled_mask(I915_PMU_RC6_RESIDENCY) & BIT_ULL(bit)) {
+ pmu->sample[__I915_SAMPLE_RC6].cur = __get_rc6(&i915->gt);
+ pmu->sleep_last = ktime_get();
+ }
+
pmu->enable |= BIT_ULL(bit);
pmu->enable_count[bit]++;
--
2.25.0.rc2
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/pmu: Correct the rc6 offset upon enabling
2020-01-13 22:04 [Intel-gfx] [PATCH] drm/i915/pmu: Correct the rc6 offset upon enabling Chris Wilson
@ 2020-01-13 22:08 ` Chris Wilson
2020-01-14 0:11 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
2020-01-14 0:11 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2 siblings, 0 replies; 4+ messages in thread
From: Chris Wilson @ 2020-01-13 22:08 UTC (permalink / raw)
To: intel-gfx
Quoting Chris Wilson (2020-01-13 22:04:36)
> The rc6 residency starts ticking from 0 from BIOS POST, but the kernel
> starts measuring the time from its boot. If we start measuruing
> I915_PMU_RC6_RESIDENCY while the GT is idle, we start our sampling from
> 0 and then upon first activity (park/unpark) add in all the rc6
> residency since boot. After the first park with the sampler engaged, the
> sleep/active counters are aligned.
>
> Fixes: df6a42053513 ("drm/i915/pmu: Ensure monotonic rc6")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> drivers/gpu/drm/i915/i915_pmu.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
> index 28a82c849bac..fe0f3e0aa4ce 100644
> --- a/drivers/gpu/drm/i915/i915_pmu.c
> +++ b/drivers/gpu/drm/i915/i915_pmu.c
> @@ -648,6 +648,13 @@ static void i915_pmu_enable(struct perf_event *event)
> BUILD_BUG_ON(ARRAY_SIZE(pmu->enable_count) != I915_PMU_MASK_BITS);
> GEM_BUG_ON(bit >= ARRAY_SIZE(pmu->enable_count));
> GEM_BUG_ON(pmu->enable_count[bit] == ~0);
> +
> + if (pmu->enable_count[bit] == 0 &&
> + config_enabled_mask(I915_PMU_RC6_RESIDENCY) & BIT_ULL(bit)) {
> + pmu->sample[__I915_SAMPLE_RC6].cur = __get_rc6(&i915->gt);
> + pmu->sleep_last = ktime_get();
I guess strictly we need with_intel_runtime_pm_get {}
Good exercise for CI ;)
-Chris
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^ permalink raw reply [flat|nested] 4+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/pmu: Correct the rc6 offset upon enabling
2020-01-13 22:04 [Intel-gfx] [PATCH] drm/i915/pmu: Correct the rc6 offset upon enabling Chris Wilson
2020-01-13 22:08 ` Chris Wilson
@ 2020-01-14 0:11 ` Patchwork
2020-01-14 0:11 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2020-01-14 0:11 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/pmu: Correct the rc6 offset upon enabling
URL : https://patchwork.freedesktop.org/series/71982/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7737 -> Patchwork_16085
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_16085 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_16085, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16085/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_16085:
### IGT changes ###
#### Possible regressions ####
* igt@runner@aborted:
- fi-cfl-guc: NOTRUN -> [FAIL][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16085/fi-cfl-guc/igt@runner@aborted.html
Known issues
------------
Here are the changes found in Patchwork_16085 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_module_load@reload-with-fault-injection:
- fi-cfl-guc: [PASS][2] -> [INCOMPLETE][3] ([i915#505] / [i915#671])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7737/fi-cfl-guc/igt@i915_module_load@reload-with-fault-injection.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16085/fi-cfl-guc/igt@i915_module_load@reload-with-fault-injection.html
- fi-skl-6700k2: [PASS][4] -> [DMESG-WARN][5] ([i915#889])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7737/fi-skl-6700k2/igt@i915_module_load@reload-with-fault-injection.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16085/fi-skl-6700k2/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_selftest@live_gem_contexts:
- fi-cfl-8700k: [PASS][6] -> [INCOMPLETE][7] ([CI#80] / [i915#424])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7737/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16085/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html
#### Possible fixes ####
* igt@gem_exec_fence@basic-wait-default:
- {fi-ehl-1}: [INCOMPLETE][8] ([i915#937]) -> [PASS][9]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7737/fi-ehl-1/igt@gem_exec_fence@basic-wait-default.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16085/fi-ehl-1/igt@gem_exec_fence@basic-wait-default.html
* igt@i915_module_load@reload-with-fault-injection:
- fi-skl-lmem: [INCOMPLETE][10] ([i915#671]) -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7737/fi-skl-lmem/igt@i915_module_load@reload-with-fault-injection.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16085/fi-skl-lmem/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_selftest@live_blt:
- fi-hsw-4770: [DMESG-FAIL][12] ([i915#553] / [i915#725]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7737/fi-hsw-4770/igt@i915_selftest@live_blt.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16085/fi-hsw-4770/igt@i915_selftest@live_blt.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80
[i915#424]: https://gitlab.freedesktop.org/drm/intel/issues/424
[i915#505]: https://gitlab.freedesktop.org/drm/intel/issues/505
[i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553
[i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
[i915#889]: https://gitlab.freedesktop.org/drm/intel/issues/889
[i915#937]: https://gitlab.freedesktop.org/drm/intel/issues/937
Participating hosts (40 -> 43)
------------------------------
Additional (11): fi-hsw-4770r fi-hsw-peppy fi-skl-6770hq fi-bwr-2160 fi-snb-2520m fi-ilk-650 fi-kbl-7500u fi-gdg-551 fi-ivb-3770 fi-blb-e6850 fi-skl-6600u
Missing (8): fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-bsw-kefka fi-byt-n2820 fi-byt-clapper fi-bsw-nick
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7737 -> Patchwork_16085
CI-20190529: 20190529
CI_DRM_7737: 2a331333791d2e499ac843e1dc25cd8ea5bdc81f @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5364: b7cb6ffdb65cbd233f5ddee2f2dabf97b34fa640 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16085: 04aa0e368f17908e65b76e04a98dbf65ab891a4d @ git://anongit.freedesktop.org/gfx-ci/linux
== Kernel 32bit build ==
Warning: Kernel 32bit buildtest failed:
https://intel-gfx-ci.01.org/Patchwork_16085/build_32bit.log
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready (#1)
Building modules, stage 2.
MODPOST 122 modules
ERROR: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
scripts/Makefile.modpost:93: recipe for target '__modpost' failed
make[1]: *** [__modpost] Error 1
Makefile:1282: recipe for target 'modules' failed
make: *** [modules] Error 2
== Linux commits ==
04aa0e368f17 drm/i915/pmu: Correct the rc6 offset upon enabling
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16085/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915/pmu: Correct the rc6 offset upon enabling
2020-01-13 22:04 [Intel-gfx] [PATCH] drm/i915/pmu: Correct the rc6 offset upon enabling Chris Wilson
2020-01-13 22:08 ` Chris Wilson
2020-01-14 0:11 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
@ 2020-01-14 0:11 ` Patchwork
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2020-01-14 0:11 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/pmu: Correct the rc6 offset upon enabling
URL : https://patchwork.freedesktop.org/series/71982/
State : warning
== Summary ==
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready (#1)
Building modules, stage 2.
MODPOST 122 modules
ERROR: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
scripts/Makefile.modpost:93: recipe for target '__modpost' failed
make[1]: *** [__modpost] Error 1
Makefile:1282: recipe for target 'modules' failed
make: *** [modules] Error 2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16085/build_32bit.log
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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2020-01-13 22:04 [Intel-gfx] [PATCH] drm/i915/pmu: Correct the rc6 offset upon enabling Chris Wilson
2020-01-13 22:08 ` Chris Wilson
2020-01-14 0:11 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
2020-01-14 0:11 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
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