* [Intel-gfx] [CI] drm/i915/gt: Stop holding onto the pinned_default_state
@ 2020-05-04 18:07 Chris Wilson
2020-05-04 19:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Stop holding onto the pinned_default_state (rev2) Patchwork
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Chris Wilson @ 2020-05-04 18:07 UTC (permalink / raw)
To: intel-gfx
As we only restore the default context state upon banning a context, we
only need enough of the state to run the ring and nothing more. That is
we only need our bare protocontext.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Andi Shyti <andi.shyti@intel.com>
---
drivers/gpu/drm/i915/gt/intel_engine_pm.c | 14 +-----
drivers/gpu/drm/i915/gt/intel_engine_types.h | 1 -
drivers/gpu/drm/i915/gt/intel_lrc.c | 14 ++----
drivers/gpu/drm/i915/gt/selftest_context.c | 11 ++--
drivers/gpu/drm/i915/gt/selftest_lrc.c | 53 +++++++++++++++-----
5 files changed, 47 insertions(+), 46 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
index 811debefebc0..d0a1078ef632 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
@@ -21,18 +21,11 @@ static int __engine_unpark(struct intel_wakeref *wf)
struct intel_engine_cs *engine =
container_of(wf, typeof(*engine), wakeref);
struct intel_context *ce;
- void *map;
ENGINE_TRACE(engine, "\n");
intel_gt_pm_get(engine->gt);
- /* Pin the default state for fast resets from atomic context. */
- map = NULL;
- if (engine->default_state)
- map = shmem_pin_map(engine->default_state);
- engine->pinned_default_state = map;
-
/* Discard stale context state from across idling */
ce = engine->kernel_context;
if (ce) {
@@ -42,6 +35,7 @@ static int __engine_unpark(struct intel_wakeref *wf)
if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM) && ce->state) {
struct drm_i915_gem_object *obj = ce->state->obj;
int type = i915_coherent_map_type(engine->i915);
+ void *map;
map = i915_gem_object_pin_map(obj, type);
if (!IS_ERR(map)) {
@@ -260,12 +254,6 @@ static int __engine_park(struct intel_wakeref *wf)
if (engine->park)
engine->park(engine);
- if (engine->pinned_default_state) {
- shmem_unpin_map(engine->default_state,
- engine->pinned_default_state);
- engine->pinned_default_state = NULL;
- }
-
engine->execlists.no_priolist = false;
/* While gt calls i915_vma_parked(), we have to break the lock cycle */
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 6c676774dcd9..c84525363bb7 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -339,7 +339,6 @@ struct intel_engine_cs {
unsigned long wakeref_serial;
struct intel_wakeref wakeref;
struct file *default_state;
- void *pinned_default_state;
struct {
struct intel_ring *ring;
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index d4ef344657b0..100ed0fce2e2 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1271,14 +1271,11 @@ execlists_check_context(const struct intel_context *ce,
static void restore_default_state(struct intel_context *ce,
struct intel_engine_cs *engine)
{
- u32 *regs = ce->lrc_reg_state;
+ u32 *regs;
- if (engine->pinned_default_state)
- memcpy(regs, /* skip restoring the vanilla PPHWSP */
- engine->pinned_default_state + LRC_STATE_OFFSET,
- engine->context_size - PAGE_SIZE);
+ regs = memset(ce->lrc_reg_state, 0, engine->context_size - PAGE_SIZE);
+ execlists_init_reg_state(regs, ce, engine, ce->ring, true);
- execlists_init_reg_state(regs, ce, engine, ce->ring, false);
ce->runtime.last = intel_context_get_runtime(ce);
}
@@ -4166,8 +4163,6 @@ static void __execlists_reset(struct intel_engine_cs *engine, bool stalled)
* image back to the expected values to skip over the guilty request.
*/
__i915_request_reset(rq, stalled);
- if (!stalled)
- goto out_replay;
/*
* We want a simple context + ring to execute the breadcrumb update.
@@ -4177,9 +4172,6 @@ static void __execlists_reset(struct intel_engine_cs *engine, bool stalled)
* future request will be after userspace has had the opportunity
* to recreate its own state.
*/
- GEM_BUG_ON(!intel_context_is_pinned(ce));
- restore_default_state(ce, engine);
-
out_replay:
ENGINE_TRACE(engine, "replay {head:%04x, tail:%04x}\n",
head, ce->ring->tail);
diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c b/drivers/gpu/drm/i915/gt/selftest_context.c
index b8ed3cbe1277..a56dff3b157a 100644
--- a/drivers/gpu/drm/i915/gt/selftest_context.c
+++ b/drivers/gpu/drm/i915/gt/selftest_context.c
@@ -154,10 +154,7 @@ static int live_context_size(void *arg)
*/
for_each_engine(engine, gt, id) {
- struct {
- struct file *state;
- void *pinned;
- } saved;
+ struct file *saved;
if (!engine->context_size)
continue;
@@ -171,8 +168,7 @@ static int live_context_size(void *arg)
* active state is sufficient, we are only checking that we
* don't use more than we planned.
*/
- saved.state = fetch_and_zero(&engine->default_state);
- saved.pinned = fetch_and_zero(&engine->pinned_default_state);
+ saved = fetch_and_zero(&engine->default_state);
/* Overlaps with the execlists redzone */
engine->context_size += I915_GTT_PAGE_SIZE;
@@ -181,8 +177,7 @@ static int live_context_size(void *arg)
engine->context_size -= I915_GTT_PAGE_SIZE;
- engine->pinned_default_state = saved.pinned;
- engine->default_state = saved.state;
+ engine->default_state = saved;
intel_engine_pm_put(engine);
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 3ced73533f6b..824f99c4cc7c 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -5177,6 +5177,7 @@ store_context(struct intel_context *ce, struct i915_vma *scratch)
{
struct i915_vma *batch;
u32 dw, x, *cs, *hw;
+ u32 *defaults;
batch = create_user_vma(ce->vm, SZ_64K);
if (IS_ERR(batch))
@@ -5188,9 +5189,16 @@ store_context(struct intel_context *ce, struct i915_vma *scratch)
return ERR_CAST(cs);
}
+ defaults = shmem_pin_map(ce->engine->default_state);
+ if (!defaults) {
+ i915_gem_object_unpin_map(batch->obj);
+ i915_vma_put(batch);
+ return ERR_PTR(-ENOMEM);
+ }
+
x = 0;
dw = 0;
- hw = ce->engine->pinned_default_state;
+ hw = defaults;
hw += LRC_STATE_OFFSET / sizeof(*hw);
do {
u32 len = hw[dw] & 0x7f;
@@ -5221,6 +5229,8 @@ store_context(struct intel_context *ce, struct i915_vma *scratch)
*cs++ = MI_BATCH_BUFFER_END;
+ shmem_unpin_map(ce->engine->default_state, defaults);
+
i915_gem_object_flush_map(batch->obj);
i915_gem_object_unpin_map(batch->obj);
@@ -5331,6 +5341,7 @@ static struct i915_vma *load_context(struct intel_context *ce, u32 poison)
{
struct i915_vma *batch;
u32 dw, *cs, *hw;
+ u32 *defaults;
batch = create_user_vma(ce->vm, SZ_64K);
if (IS_ERR(batch))
@@ -5342,8 +5353,15 @@ static struct i915_vma *load_context(struct intel_context *ce, u32 poison)
return ERR_CAST(cs);
}
+ defaults = shmem_pin_map(ce->engine->default_state);
+ if (!defaults) {
+ i915_gem_object_unpin_map(batch->obj);
+ i915_vma_put(batch);
+ return ERR_PTR(-ENOMEM);
+ }
+
dw = 0;
- hw = ce->engine->pinned_default_state;
+ hw = defaults;
hw += LRC_STATE_OFFSET / sizeof(*hw);
do {
u32 len = hw[dw] & 0x7f;
@@ -5371,6 +5389,8 @@ static struct i915_vma *load_context(struct intel_context *ce, u32 poison)
*cs++ = MI_BATCH_BUFFER_END;
+ shmem_unpin_map(ce->engine->default_state, defaults);
+
i915_gem_object_flush_map(batch->obj);
i915_gem_object_unpin_map(batch->obj);
@@ -5438,6 +5458,7 @@ static int compare_isolation(struct intel_engine_cs *engine,
{
u32 x, dw, *hw, *lrc;
u32 *A[2], *B[2];
+ u32 *defaults;
int err = 0;
A[0] = i915_gem_object_pin_map(ref[0]->obj, I915_MAP_WC);
@@ -5470,9 +5491,15 @@ static int compare_isolation(struct intel_engine_cs *engine,
}
lrc += LRC_STATE_OFFSET / sizeof(*hw);
+ defaults = shmem_pin_map(ce->engine->default_state);
+ if (!defaults) {
+ err = -ENOMEM;
+ goto err_lrc;
+ }
+
x = 0;
dw = 0;
- hw = engine->pinned_default_state;
+ hw = defaults;
hw += LRC_STATE_OFFSET / sizeof(*hw);
do {
u32 len = hw[dw] & 0x7f;
@@ -5512,6 +5539,8 @@ static int compare_isolation(struct intel_engine_cs *engine,
} while (dw < PAGE_SIZE / sizeof(u32) &&
(hw[dw] & ~BIT(0)) != MI_BATCH_BUFFER_END);
+ shmem_unpin_map(ce->engine->default_state, defaults);
+err_lrc:
i915_gem_object_unpin_map(ce->state->obj);
err_B1:
i915_gem_object_unpin_map(result[1]->obj);
@@ -5661,18 +5690,16 @@ static int live_lrc_isolation(void *arg)
continue;
intel_engine_pm_get(engine);
- if (engine->pinned_default_state) {
- for (i = 0; i < ARRAY_SIZE(poison); i++) {
- int result;
+ for (i = 0; i < ARRAY_SIZE(poison); i++) {
+ int result;
- result = __lrc_isolation(engine, poison[i]);
- if (result && !err)
- err = result;
+ result = __lrc_isolation(engine, poison[i]);
+ if (result && !err)
+ err = result;
- result = __lrc_isolation(engine, ~poison[i]);
- if (result && !err)
- err = result;
- }
+ result = __lrc_isolation(engine, ~poison[i]);
+ if (result && !err)
+ err = result;
}
intel_engine_pm_put(engine);
if (igt_flush_test(gt->i915)) {
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Stop holding onto the pinned_default_state (rev2)
2020-05-04 18:07 [Intel-gfx] [CI] drm/i915/gt: Stop holding onto the pinned_default_state Chris Wilson
@ 2020-05-04 19:34 ` Patchwork
2020-05-05 8:44 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-05-05 9:12 ` [Intel-gfx] [CI] drm/i915/gt: Stop holding onto the pinned_default_state Mika Kuoppala
2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2020-05-04 19:34 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/gt: Stop holding onto the pinned_default_state (rev2)
URL : https://patchwork.freedesktop.org/series/76738/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8422 -> Patchwork_17574
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/index.html
Known issues
------------
Here are the changes found in Patchwork_17574 that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@i915_selftest@live@perf:
- fi-bwr-2160: [INCOMPLETE][1] ([i915#489]) -> [PASS][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/fi-bwr-2160/igt@i915_selftest@live@perf.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/fi-bwr-2160/igt@i915_selftest@live@perf.html
[i915#489]: https://gitlab.freedesktop.org/drm/intel/issues/489
Participating hosts (52 -> 44)
------------------------------
Missing (8): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-kbl-7560u fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8422 -> Patchwork_17574
CI-20190529: 20190529
CI_DRM_8422: 0ca0fee447b032331962bc5c717786bdb3594bd9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5628: 652a3fd8966345fa5498904ce80a2027a6782783 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17574: ca23be75c4c21a2a54eec2b4836307b869e4356f @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
ca23be75c4c2 drm/i915/gt: Stop holding onto the pinned_default_state
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gt: Stop holding onto the pinned_default_state (rev2)
2020-05-04 18:07 [Intel-gfx] [CI] drm/i915/gt: Stop holding onto the pinned_default_state Chris Wilson
2020-05-04 19:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Stop holding onto the pinned_default_state (rev2) Patchwork
@ 2020-05-05 8:44 ` Patchwork
2020-05-05 9:12 ` [Intel-gfx] [CI] drm/i915/gt: Stop holding onto the pinned_default_state Mika Kuoppala
2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2020-05-05 8:44 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/gt: Stop holding onto the pinned_default_state (rev2)
URL : https://patchwork.freedesktop.org/series/76738/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8422_full -> Patchwork_17574_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_17574_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3:
- shard-apl: [PASS][1] -> [DMESG-WARN][2] ([i915#180])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/shard-apl7/igt@gem_exec_suspend@basic-s3.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/shard-apl4/igt@gem_exec_suspend@basic-s3.html
* igt@gem_exec_whisper@basic-queues-forked:
- shard-kbl: [PASS][3] -> [FAIL][4] ([i915#1479] / [i915#1772])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/shard-kbl1/igt@gem_exec_whisper@basic-queues-forked.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/shard-kbl1/igt@gem_exec_whisper@basic-queues-forked.html
* igt@gen9_exec_parse@allowed-all:
- shard-skl: [PASS][5] -> [DMESG-WARN][6] ([i915#716])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/shard-skl9/igt@gen9_exec_parse@allowed-all.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/shard-skl10/igt@gen9_exec_parse@allowed-all.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-kbl: [PASS][7] -> [DMESG-WARN][8] ([i915#180]) +2 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/shard-kbl7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/shard-kbl4/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
* igt@kms_flip_tiling@flip-changes-tiling-y:
- shard-apl: [PASS][9] -> [FAIL][10] ([i915#95])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/shard-apl2/igt@kms_flip_tiling@flip-changes-tiling-y.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/shard-apl6/igt@kms_flip_tiling@flip-changes-tiling-y.html
- shard-kbl: [PASS][11] -> [FAIL][12] ([i915#699] / [i915#93] / [i915#95])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/shard-kbl6/igt@kms_flip_tiling@flip-changes-tiling-y.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/shard-kbl2/igt@kms_flip_tiling@flip-changes-tiling-y.html
* igt@kms_hdr@bpc-switch:
- shard-skl: [PASS][13] -> [FAIL][14] ([i915#1188])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/shard-skl4/igt@kms_hdr@bpc-switch.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/shard-skl6/igt@kms_hdr@bpc-switch.html
* igt@kms_psr@psr2_sprite_blt:
- shard-iclb: [PASS][15] -> [SKIP][16] ([fdo#109441]) +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/shard-iclb8/igt@kms_psr@psr2_sprite_blt.html
#### Possible fixes ####
* {igt@gem_ctx_isolation@preservation-s3@bcs0}:
- shard-kbl: [DMESG-WARN][17] ([i915#180]) -> [PASS][18] +2 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/shard-kbl6/igt@gem_ctx_isolation@preservation-s3@bcs0.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/shard-kbl6/igt@gem_ctx_isolation@preservation-s3@bcs0.html
- shard-apl: [DMESG-WARN][19] ([i915#180]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/shard-apl1/igt@gem_ctx_isolation@preservation-s3@bcs0.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/shard-apl2/igt@gem_ctx_isolation@preservation-s3@bcs0.html
* igt@gem_exec_params@invalid-bsd-ring:
- shard-iclb: [SKIP][21] ([fdo#109276]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/shard-iclb6/igt@gem_exec_params@invalid-bsd-ring.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/shard-iclb2/igt@gem_exec_params@invalid-bsd-ring.html
* igt@kms_cursor_crc@pipe-b-cursor-suspend:
- shard-skl: [INCOMPLETE][23] ([i915#300]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/shard-skl7/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/shard-skl2/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
* igt@kms_cursor_legacy@cursora-vs-flipb-toggle:
- shard-hsw: [SKIP][25] ([fdo#109271]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/shard-hsw6/igt@kms_cursor_legacy@cursora-vs-flipb-toggle.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/shard-hsw1/igt@kms_cursor_legacy@cursora-vs-flipb-toggle.html
* {igt@kms_flip@2x-plain-flip-fb-recreate@ab-hdmi-a1-hdmi-a2}:
- shard-glk: [FAIL][27] ([i915#34]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/shard-glk9/igt@kms_flip@2x-plain-flip-fb-recreate@ab-hdmi-a1-hdmi-a2.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/shard-glk8/igt@kms_flip@2x-plain-flip-fb-recreate@ab-hdmi-a1-hdmi-a2.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: [FAIL][29] ([fdo#108145] / [i915#265]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [SKIP][31] ([fdo#109642] / [fdo#111068]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/shard-iclb4/igt@kms_psr2_su@frontbuffer.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@psr2_cursor_plane_move:
- shard-iclb: [SKIP][33] ([fdo#109441]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/shard-iclb4/igt@kms_psr@psr2_cursor_plane_move.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html
* {igt@perf@polling-parameterized}:
- shard-hsw: [FAIL][35] ([i915#1542]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/shard-hsw6/igt@perf@polling-parameterized.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/shard-hsw2/igt@perf@polling-parameterized.html
#### Warnings ####
* igt@i915_pm_dc@dc6-dpms:
- shard-tglb: [SKIP][37] ([i915#468]) -> [FAIL][38] ([i915#454])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/shard-tglb2/igt@i915_pm_dc@dc6-dpms.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/shard-tglb8/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_rpm@cursor:
- shard-snb: [SKIP][39] ([fdo#109271]) -> [INCOMPLETE][40] ([i915#82])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8422/shard-snb2/igt@i915_pm_rpm@cursor.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/shard-snb1/igt@i915_pm_rpm@cursor.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1479]: https://gitlab.freedesktop.org/drm/intel/issues/1479
[i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
[i915#1772]: https://gitlab.freedesktop.org/drm/intel/issues/1772
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#300]: https://gitlab.freedesktop.org/drm/intel/issues/300
[i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
[i915#699]: https://gitlab.freedesktop.org/drm/intel/issues/699
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
[i915#93]: https://gitlab.freedesktop.org/drm/intel/issues/93
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8422 -> Patchwork_17574
CI-20190529: 20190529
CI_DRM_8422: 0ca0fee447b032331962bc5c717786bdb3594bd9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5628: 652a3fd8966345fa5498904ce80a2027a6782783 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17574: ca23be75c4c21a2a54eec2b4836307b869e4356f @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17574/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Intel-gfx] [CI] drm/i915/gt: Stop holding onto the pinned_default_state
2020-05-04 18:07 [Intel-gfx] [CI] drm/i915/gt: Stop holding onto the pinned_default_state Chris Wilson
2020-05-04 19:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Stop holding onto the pinned_default_state (rev2) Patchwork
2020-05-05 8:44 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2020-05-05 9:12 ` Mika Kuoppala
2020-05-05 9:21 ` Chris Wilson
2 siblings, 1 reply; 6+ messages in thread
From: Mika Kuoppala @ 2020-05-05 9:12 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Chris Wilson <chris@chris-wilson.co.uk> writes:
> As we only restore the default context state upon banning a context, we
> only need enough of the state to run the ring and nothing more. That is
> we only need our bare protocontext.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Andi Shyti <andi.shyti@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_engine_pm.c | 14 +-----
> drivers/gpu/drm/i915/gt/intel_engine_types.h | 1 -
> drivers/gpu/drm/i915/gt/intel_lrc.c | 14 ++----
> drivers/gpu/drm/i915/gt/selftest_context.c | 11 ++--
> drivers/gpu/drm/i915/gt/selftest_lrc.c | 53 +++++++++++++++-----
> 5 files changed, 47 insertions(+), 46 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> index 811debefebc0..d0a1078ef632 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> @@ -21,18 +21,11 @@ static int __engine_unpark(struct intel_wakeref *wf)
> struct intel_engine_cs *engine =
> container_of(wf, typeof(*engine), wakeref);
> struct intel_context *ce;
> - void *map;
>
> ENGINE_TRACE(engine, "\n");
>
> intel_gt_pm_get(engine->gt);
>
> - /* Pin the default state for fast resets from atomic context. */
> - map = NULL;
> - if (engine->default_state)
> - map = shmem_pin_map(engine->default_state);
> - engine->pinned_default_state = map;
> -
> /* Discard stale context state from across idling */
> ce = engine->kernel_context;
> if (ce) {
> @@ -42,6 +35,7 @@ static int __engine_unpark(struct intel_wakeref *wf)
> if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM) && ce->state) {
> struct drm_i915_gem_object *obj = ce->state->obj;
> int type = i915_coherent_map_type(engine->i915);
> + void *map;
>
> map = i915_gem_object_pin_map(obj, type);
> if (!IS_ERR(map)) {
> @@ -260,12 +254,6 @@ static int __engine_park(struct intel_wakeref *wf)
> if (engine->park)
> engine->park(engine);
>
> - if (engine->pinned_default_state) {
> - shmem_unpin_map(engine->default_state,
> - engine->pinned_default_state);
> - engine->pinned_default_state = NULL;
> - }
> -
> engine->execlists.no_priolist = false;
>
> /* While gt calls i915_vma_parked(), we have to break the lock cycle */
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> index 6c676774dcd9..c84525363bb7 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> @@ -339,7 +339,6 @@ struct intel_engine_cs {
> unsigned long wakeref_serial;
> struct intel_wakeref wakeref;
> struct file *default_state;
> - void *pinned_default_state;
>
> struct {
> struct intel_ring *ring;
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index d4ef344657b0..100ed0fce2e2 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -1271,14 +1271,11 @@ execlists_check_context(const struct intel_context *ce,
> static void restore_default_state(struct intel_context *ce,
> struct intel_engine_cs *engine)
> {
> - u32 *regs = ce->lrc_reg_state;
> + u32 *regs;
>
> - if (engine->pinned_default_state)
> - memcpy(regs, /* skip restoring the vanilla PPHWSP */
> - engine->pinned_default_state + LRC_STATE_OFFSET,
> - engine->context_size - PAGE_SIZE);
> + regs = memset(ce->lrc_reg_state, 0, engine->context_size - PAGE_SIZE);
> + execlists_init_reg_state(regs, ce, engine, ce->ring, true);
>
> - execlists_init_reg_state(regs, ce, engine, ce->ring, false);
> ce->runtime.last = intel_context_get_runtime(ce);
> }
>
> @@ -4166,8 +4163,6 @@ static void __execlists_reset(struct intel_engine_cs *engine, bool stalled)
> * image back to the expected values to skip over the guilty request.
> */
> __i915_request_reset(rq, stalled);
> - if (!stalled)
> - goto out_replay;
Why the change how to handle stalled?
-Mika
>
> /*
> * We want a simple context + ring to execute the breadcrumb update.
> @@ -4177,9 +4172,6 @@ static void __execlists_reset(struct intel_engine_cs *engine, bool stalled)
> * future request will be after userspace has had the opportunity
> * to recreate its own state.
> */
> - GEM_BUG_ON(!intel_context_is_pinned(ce));
> - restore_default_state(ce, engine);
> -
> out_replay:
> ENGINE_TRACE(engine, "replay {head:%04x, tail:%04x}\n",
> head, ce->ring->tail);
> diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c b/drivers/gpu/drm/i915/gt/selftest_context.c
> index b8ed3cbe1277..a56dff3b157a 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_context.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_context.c
> @@ -154,10 +154,7 @@ static int live_context_size(void *arg)
> */
>
> for_each_engine(engine, gt, id) {
> - struct {
> - struct file *state;
> - void *pinned;
> - } saved;
> + struct file *saved;
>
> if (!engine->context_size)
> continue;
> @@ -171,8 +168,7 @@ static int live_context_size(void *arg)
> * active state is sufficient, we are only checking that we
> * don't use more than we planned.
> */
> - saved.state = fetch_and_zero(&engine->default_state);
> - saved.pinned = fetch_and_zero(&engine->pinned_default_state);
> + saved = fetch_and_zero(&engine->default_state);
>
> /* Overlaps with the execlists redzone */
> engine->context_size += I915_GTT_PAGE_SIZE;
> @@ -181,8 +177,7 @@ static int live_context_size(void *arg)
>
> engine->context_size -= I915_GTT_PAGE_SIZE;
>
> - engine->pinned_default_state = saved.pinned;
> - engine->default_state = saved.state;
> + engine->default_state = saved;
>
> intel_engine_pm_put(engine);
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> index 3ced73533f6b..824f99c4cc7c 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> @@ -5177,6 +5177,7 @@ store_context(struct intel_context *ce, struct i915_vma *scratch)
> {
> struct i915_vma *batch;
> u32 dw, x, *cs, *hw;
> + u32 *defaults;
>
> batch = create_user_vma(ce->vm, SZ_64K);
> if (IS_ERR(batch))
> @@ -5188,9 +5189,16 @@ store_context(struct intel_context *ce, struct i915_vma *scratch)
> return ERR_CAST(cs);
> }
>
> + defaults = shmem_pin_map(ce->engine->default_state);
> + if (!defaults) {
> + i915_gem_object_unpin_map(batch->obj);
> + i915_vma_put(batch);
> + return ERR_PTR(-ENOMEM);
> + }
> +
> x = 0;
> dw = 0;
> - hw = ce->engine->pinned_default_state;
> + hw = defaults;
> hw += LRC_STATE_OFFSET / sizeof(*hw);
> do {
> u32 len = hw[dw] & 0x7f;
> @@ -5221,6 +5229,8 @@ store_context(struct intel_context *ce, struct i915_vma *scratch)
>
> *cs++ = MI_BATCH_BUFFER_END;
>
> + shmem_unpin_map(ce->engine->default_state, defaults);
> +
> i915_gem_object_flush_map(batch->obj);
> i915_gem_object_unpin_map(batch->obj);
>
> @@ -5331,6 +5341,7 @@ static struct i915_vma *load_context(struct intel_context *ce, u32 poison)
> {
> struct i915_vma *batch;
> u32 dw, *cs, *hw;
> + u32 *defaults;
>
> batch = create_user_vma(ce->vm, SZ_64K);
> if (IS_ERR(batch))
> @@ -5342,8 +5353,15 @@ static struct i915_vma *load_context(struct intel_context *ce, u32 poison)
> return ERR_CAST(cs);
> }
>
> + defaults = shmem_pin_map(ce->engine->default_state);
> + if (!defaults) {
> + i915_gem_object_unpin_map(batch->obj);
> + i915_vma_put(batch);
> + return ERR_PTR(-ENOMEM);
> + }
> +
> dw = 0;
> - hw = ce->engine->pinned_default_state;
> + hw = defaults;
> hw += LRC_STATE_OFFSET / sizeof(*hw);
> do {
> u32 len = hw[dw] & 0x7f;
> @@ -5371,6 +5389,8 @@ static struct i915_vma *load_context(struct intel_context *ce, u32 poison)
>
> *cs++ = MI_BATCH_BUFFER_END;
>
> + shmem_unpin_map(ce->engine->default_state, defaults);
> +
> i915_gem_object_flush_map(batch->obj);
> i915_gem_object_unpin_map(batch->obj);
>
> @@ -5438,6 +5458,7 @@ static int compare_isolation(struct intel_engine_cs *engine,
> {
> u32 x, dw, *hw, *lrc;
> u32 *A[2], *B[2];
> + u32 *defaults;
> int err = 0;
>
> A[0] = i915_gem_object_pin_map(ref[0]->obj, I915_MAP_WC);
> @@ -5470,9 +5491,15 @@ static int compare_isolation(struct intel_engine_cs *engine,
> }
> lrc += LRC_STATE_OFFSET / sizeof(*hw);
>
> + defaults = shmem_pin_map(ce->engine->default_state);
> + if (!defaults) {
> + err = -ENOMEM;
> + goto err_lrc;
> + }
> +
> x = 0;
> dw = 0;
> - hw = engine->pinned_default_state;
> + hw = defaults;
> hw += LRC_STATE_OFFSET / sizeof(*hw);
> do {
> u32 len = hw[dw] & 0x7f;
> @@ -5512,6 +5539,8 @@ static int compare_isolation(struct intel_engine_cs *engine,
> } while (dw < PAGE_SIZE / sizeof(u32) &&
> (hw[dw] & ~BIT(0)) != MI_BATCH_BUFFER_END);
>
> + shmem_unpin_map(ce->engine->default_state, defaults);
> +err_lrc:
> i915_gem_object_unpin_map(ce->state->obj);
> err_B1:
> i915_gem_object_unpin_map(result[1]->obj);
> @@ -5661,18 +5690,16 @@ static int live_lrc_isolation(void *arg)
> continue;
>
> intel_engine_pm_get(engine);
> - if (engine->pinned_default_state) {
> - for (i = 0; i < ARRAY_SIZE(poison); i++) {
> - int result;
> + for (i = 0; i < ARRAY_SIZE(poison); i++) {
> + int result;
>
> - result = __lrc_isolation(engine, poison[i]);
> - if (result && !err)
> - err = result;
> + result = __lrc_isolation(engine, poison[i]);
> + if (result && !err)
> + err = result;
>
> - result = __lrc_isolation(engine, ~poison[i]);
> - if (result && !err)
> - err = result;
> - }
> + result = __lrc_isolation(engine, ~poison[i]);
> + if (result && !err)
> + err = result;
> }
> intel_engine_pm_put(engine);
> if (igt_flush_test(gt->i915)) {
> --
> 2.20.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Intel-gfx] [CI] drm/i915/gt: Stop holding onto the pinned_default_state
2020-05-05 9:12 ` [Intel-gfx] [CI] drm/i915/gt: Stop holding onto the pinned_default_state Mika Kuoppala
@ 2020-05-05 9:21 ` Chris Wilson
2020-05-05 9:25 ` Chris Wilson
0 siblings, 1 reply; 6+ messages in thread
From: Chris Wilson @ 2020-05-05 9:21 UTC (permalink / raw)
To: Mika Kuoppala, intel-gfx
Quoting Mika Kuoppala (2020-05-05 10:12:49)
> > @@ -4166,8 +4163,6 @@ static void __execlists_reset(struct intel_engine_cs *engine, bool stalled)
> > * image back to the expected values to skip over the guilty request.
> > */
> > __i915_request_reset(rq, stalled);
> > - if (!stalled)
> > - goto out_replay;
>
> Why the change how to handle stalled?
The protocontext is only sufficient to recover a hung context. If we are
resetting an innocent context, we need it to retain its register state.
stalled == guilty => really hung, we only replay for the breacrumbs
!stalled == innocent, global reset => we need to try and recover the
context exactly.
The secret is that if we declare innocence too early, we kill it with
fire in a second pass.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Intel-gfx] [CI] drm/i915/gt: Stop holding onto the pinned_default_state
2020-05-05 9:21 ` Chris Wilson
@ 2020-05-05 9:25 ` Chris Wilson
0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2020-05-05 9:25 UTC (permalink / raw)
To: Mika Kuoppala, intel-gfx
Quoting Chris Wilson (2020-05-05 10:21:46)
> Quoting Mika Kuoppala (2020-05-05 10:12:49)
> > > @@ -4166,8 +4163,6 @@ static void __execlists_reset(struct intel_engine_cs *engine, bool stalled)
> > > * image back to the expected values to skip over the guilty request.
> > > */
> > > __i915_request_reset(rq, stalled);
> > > - if (!stalled)
> > > - goto out_replay;
> >
> > Why the change how to handle stalled?
>
> The protocontext is only sufficient to recover a hung context. If we are
> resetting an innocent context, we need it to retain its register state.
>
> stalled == guilty => really hung, we only replay for the breacrumbs
> !stalled == innocent, global reset => we need to try and recover the
> context exactly.
>
> The secret is that if we declare innocence too early, we kill it with
> fire in a second pass.
The real secret is that the protocontext is being applied later on being
banned. And this change was because the two paths are not different at
this point.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-05-05 9:25 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-05-04 18:07 [Intel-gfx] [CI] drm/i915/gt: Stop holding onto the pinned_default_state Chris Wilson
2020-05-04 19:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Stop holding onto the pinned_default_state (rev2) Patchwork
2020-05-05 8:44 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-05-05 9:12 ` [Intel-gfx] [CI] drm/i915/gt: Stop holding onto the pinned_default_state Mika Kuoppala
2020-05-05 9:21 ` Chris Wilson
2020-05-05 9:25 ` Chris Wilson
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.