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From: Roger Lu <roger.lu@mediatek.com>
To: Nicolas Boichat <drinkcat@chromium.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Nicolas Boichat <drinkcat@google.com>, Nishanth Menon <nm@ti.com>,
	Kevin Hilman <khilman@kernel.org>,
	Enric Balletbo Serra <eballetbo@gmail.com>,
	"open list:THERMAL" <linux-pm@vger.kernel.org>,
	Angus Lin <Angus.Lin@mediatek.com>,
	Xiaoqing Liu <Xiaoqing.Liu@mediatek.com>,
	lkml <linux-kernel@vger.kernel.org>,
	Stephen Boyd <sboyd@kernel.org>,
	"Devicetree List" <devicetree@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	"moderated list:ARM/Mediatek SoC support" 
	<linux-mediatek@lists.infradead.org>,
	HenryC Chen <HenryC.Chen@mediatek.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	"Charles Yang" <Charles.Yang@mediatek.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	YT Lee <yt.lee@mediatek.com>, Fan Chen <fan.chen@mediatek.com>,
	linux-arm Mailing List <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v10 3/7] [v10, 3/7]: soc: mediatek: SVS: introduce MTK SVS engine
Date: Wed, 6 Jan 2021 16:41:55 +0800	[thread overview]
Message-ID: <1609922515.18506.17.camel@mtksdaap41> (raw)
In-Reply-To: <1609750266.20758.40.camel@mtksdaap41>

Hi Nicolas,

[snip]
> > 
> > > +
> > > +       /* Svs efuse parsing */
> > > +       ft_pgm = (svsp->efuse[0] >> 4) & GENMASK(3, 0);
> > > +
> > > +       for (idx = 0; idx < svsp->bank_num; idx++) {
> > > +               svsb = &svsp->banks[idx];
> > > +
> > > +               if (ft_pgm <= 1)
> > > +                       svsb->init01_volt_flag = SVSB_INIT01_VOLT_IGNORE;
> > > +
> > > +               switch (svsb->sw_id) {
> > > +               case SVSB_CPU_LITTLE:
> > > +                       svsb->bdes = svsp->efuse[16] & GENMASK(7, 0);
> > > +                       svsb->mdes = (svsp->efuse[16] >> 8) & GENMASK(7, 0);
> > > +                       svsb->dcbdet = (svsp->efuse[16] >> 16) & GENMASK(7, 0);
> > > +                       svsb->dcmdet = (svsp->efuse[16] >> 24) & GENMASK(7, 0);
> > > +                       svsb->mtdes  = (svsp->efuse[17] >> 16) & GENMASK(7, 0);
> > 
> > Again, if all of those values were u8, there'd be no need for these GENMASK
> 
> Ok, I'll use u8 instead of GENMASK. Thanks.

After refining the codes, I think it's much explicit to assign the bits
I want by GENMASK() and will remove other GENMASK() that are repetitive
like in svs_set_bank_phase() or svs_set_freqs_pct_v2().

[snip]


WARNING: multiple messages have this Message-ID (diff)
From: Roger Lu <roger.lu@mediatek.com>
To: Nicolas Boichat <drinkcat@chromium.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Nicolas Boichat <drinkcat@google.com>, Nishanth Menon <nm@ti.com>,
	"open list:THERMAL" <linux-pm@vger.kernel.org>,
	Enric Balletbo Serra <eballetbo@gmail.com>,
	Kevin Hilman <khilman@kernel.org>,
	Angus Lin <Angus.Lin@mediatek.com>,
	Xiaoqing Liu <Xiaoqing.Liu@mediatek.com>,
	lkml <linux-kernel@vger.kernel.org>,
	Stephen Boyd <sboyd@kernel.org>,
	Devicetree List <devicetree@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	"moderated list:ARM/Mediatek SoC support"
	<linux-mediatek@lists.infradead.org>,
	HenryC Chen <HenryC.Chen@mediatek.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Charles Yang <Charles.Yang@mediatek.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	YT Lee <yt.lee@mediatek.com>, Fan Chen <fan.chen@mediatek.com>,
	linux-arm Mailing List <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v10 3/7] [v10, 3/7]: soc: mediatek: SVS: introduce MTK SVS engine
Date: Wed, 6 Jan 2021 16:41:55 +0800	[thread overview]
Message-ID: <1609922515.18506.17.camel@mtksdaap41> (raw)
In-Reply-To: <1609750266.20758.40.camel@mtksdaap41>

Hi Nicolas,

[snip]
> > 
> > > +
> > > +       /* Svs efuse parsing */
> > > +       ft_pgm = (svsp->efuse[0] >> 4) & GENMASK(3, 0);
> > > +
> > > +       for (idx = 0; idx < svsp->bank_num; idx++) {
> > > +               svsb = &svsp->banks[idx];
> > > +
> > > +               if (ft_pgm <= 1)
> > > +                       svsb->init01_volt_flag = SVSB_INIT01_VOLT_IGNORE;
> > > +
> > > +               switch (svsb->sw_id) {
> > > +               case SVSB_CPU_LITTLE:
> > > +                       svsb->bdes = svsp->efuse[16] & GENMASK(7, 0);
> > > +                       svsb->mdes = (svsp->efuse[16] >> 8) & GENMASK(7, 0);
> > > +                       svsb->dcbdet = (svsp->efuse[16] >> 16) & GENMASK(7, 0);
> > > +                       svsb->dcmdet = (svsp->efuse[16] >> 24) & GENMASK(7, 0);
> > > +                       svsb->mtdes  = (svsp->efuse[17] >> 16) & GENMASK(7, 0);
> > 
> > Again, if all of those values were u8, there'd be no need for these GENMASK
> 
> Ok, I'll use u8 instead of GENMASK. Thanks.

After refining the codes, I think it's much explicit to assign the bits
I want by GENMASK() and will remove other GENMASK() that are repetitive
like in svs_set_bank_phase() or svs_set_freqs_pct_v2().

[snip]

_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Roger Lu <roger.lu@mediatek.com>
To: Nicolas Boichat <drinkcat@chromium.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Nicolas Boichat <drinkcat@google.com>, Nishanth Menon <nm@ti.com>,
	"open list:THERMAL" <linux-pm@vger.kernel.org>,
	Enric Balletbo Serra <eballetbo@gmail.com>,
	Kevin Hilman <khilman@kernel.org>,
	Angus Lin <Angus.Lin@mediatek.com>,
	Xiaoqing Liu <Xiaoqing.Liu@mediatek.com>,
	lkml <linux-kernel@vger.kernel.org>,
	Stephen Boyd <sboyd@kernel.org>,
	Devicetree List <devicetree@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	"moderated list:ARM/Mediatek SoC support"
	<linux-mediatek@lists.infradead.org>,
	HenryC Chen <HenryC.Chen@mediatek.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Charles Yang <Charles.Yang@mediatek.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	YT Lee <yt.lee@mediatek.com>, Fan Chen <fan.chen@mediatek.com>,
	linux-arm Mailing List <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v10 3/7] [v10, 3/7]: soc: mediatek: SVS: introduce MTK SVS engine
Date: Wed, 6 Jan 2021 16:41:55 +0800	[thread overview]
Message-ID: <1609922515.18506.17.camel@mtksdaap41> (raw)
In-Reply-To: <1609750266.20758.40.camel@mtksdaap41>

Hi Nicolas,

[snip]
> > 
> > > +
> > > +       /* Svs efuse parsing */
> > > +       ft_pgm = (svsp->efuse[0] >> 4) & GENMASK(3, 0);
> > > +
> > > +       for (idx = 0; idx < svsp->bank_num; idx++) {
> > > +               svsb = &svsp->banks[idx];
> > > +
> > > +               if (ft_pgm <= 1)
> > > +                       svsb->init01_volt_flag = SVSB_INIT01_VOLT_IGNORE;
> > > +
> > > +               switch (svsb->sw_id) {
> > > +               case SVSB_CPU_LITTLE:
> > > +                       svsb->bdes = svsp->efuse[16] & GENMASK(7, 0);
> > > +                       svsb->mdes = (svsp->efuse[16] >> 8) & GENMASK(7, 0);
> > > +                       svsb->dcbdet = (svsp->efuse[16] >> 16) & GENMASK(7, 0);
> > > +                       svsb->dcmdet = (svsp->efuse[16] >> 24) & GENMASK(7, 0);
> > > +                       svsb->mtdes  = (svsp->efuse[17] >> 16) & GENMASK(7, 0);
> > 
> > Again, if all of those values were u8, there'd be no need for these GENMASK
> 
> Ok, I'll use u8 instead of GENMASK. Thanks.

After refining the codes, I think it's much explicit to assign the bits
I want by GENMASK() and will remove other GENMASK() that are repetitive
like in svs_set_bank_phase() or svs_set_freqs_pct_v2().

[snip]

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2021-01-06  8:42 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-27 10:54 [PATCH v10 0/7] soc: mediatek: SVS: introduce MTK SVS engine Roger Lu
2020-12-27 10:54 ` Roger Lu
2020-12-27 10:54 ` Roger Lu
2020-12-27 10:54 ` [PATCH v10 1/7] [v10,1/7]: dt-bindings: soc: mediatek: add mtk svs dt-bindings Roger Lu
2020-12-27 10:54   ` [PATCH v10 1/7] [v10, 1/7]: " Roger Lu
2020-12-27 10:54   ` Roger Lu
2020-12-27 16:56   ` Rob Herring
2020-12-27 16:56     ` Rob Herring
2020-12-27 16:56     ` Rob Herring
2020-12-31 18:12   ` [PATCH v10 1/7] [v10,1/7]: " Rob Herring
2020-12-31 18:12     ` Rob Herring
2020-12-31 18:12     ` Rob Herring
2020-12-27 10:54 ` [PATCH v10 2/7] [v10,2/7]: arm64: dts: mt8183: add svs device information Roger Lu
2020-12-27 10:54   ` [PATCH v10 2/7] [v10, 2/7]: " Roger Lu
2020-12-27 10:54   ` Roger Lu
2020-12-27 10:54 ` [PATCH v10 3/7] [v10,3/7]: soc: mediatek: SVS: introduce MTK SVS engine Roger Lu
2020-12-27 10:54   ` [PATCH v10 3/7] [v10, 3/7]: " Roger Lu
2020-12-27 10:54   ` Roger Lu
2020-12-31  2:10   ` Nicolas Boichat
2020-12-31  2:10     ` Nicolas Boichat
2020-12-31  2:10     ` Nicolas Boichat
2021-01-04  8:51     ` Roger Lu
2021-01-04  8:51       ` Roger Lu
2021-01-04  9:27       ` Nicolas Boichat
2021-01-04  9:27         ` Nicolas Boichat
2021-01-04  9:27         ` Nicolas Boichat
2021-01-04  9:52         ` Roger Lu
2021-01-04  9:52           ` Roger Lu
2021-01-04  9:52           ` Roger Lu
2021-01-06  8:41       ` Roger Lu [this message]
2021-01-06  8:41         ` Roger Lu
2021-01-06  8:41         ` Roger Lu
2021-01-06  8:44         ` Nicolas Boichat
2021-01-06  8:44           ` Nicolas Boichat
2021-01-06  8:44           ` Nicolas Boichat
2020-12-27 10:54 ` [PATCH v10 4/7] [v10,4/7]: soc: mediatek: SVS: add debug commands Roger Lu
2020-12-27 10:54   ` Roger Lu
2020-12-27 10:54   ` Roger Lu
2020-12-27 10:54 ` [PATCH v10 5/7] [v10,5/7]: dt-bindings: soc: mediatek: add mt8192 svs dt-bindings Roger Lu
2020-12-27 10:54   ` [PATCH v10 5/7] [v10, 5/7]: " Roger Lu
2020-12-27 10:54   ` Roger Lu
2020-12-27 10:54 ` [PATCH v10 6/7] [v10,6/7]: arm64: dts: mt8192: add svs device information Roger Lu
2020-12-27 10:54   ` [PATCH v10 6/7] [v10, 6/7]: " Roger Lu
2020-12-27 10:54   ` Roger Lu
2020-12-27 10:54 ` [PATCH v10 7/7] [v10,7/7]: soc: mediatek: SVS: add mt8192 SVS GPU driver Roger Lu
2020-12-27 10:54   ` [PATCH v10 7/7] [v10, 7/7]: " Roger Lu
2020-12-27 10:54   ` Roger Lu

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