* [RFC 0/2] Implement SoC bus support for Vybrid @ 2015-05-11 5:11 ` Sanchayan Maity 0 siblings, 0 replies; 10+ messages in thread From: Sanchayan Maity @ 2015-05-11 5:11 UTC (permalink / raw) To: linux-arm-kernel, shawn.guo, kernel; +Cc: stefan, linux-kernel, Sanchayan Maity Hello, Currently this patchset is based of on our local branch but would like some comments before I push this to mainline through Shawn's tree. This patchset implements the following https://www.kernel.org/doc/Documentation/ABI/testing/sysfs-devices-soc Currently the required information is more or less read across the whole SoC, but I guess we cannot change that since these are the locations with the required information. There seem to be three options for the revision field: - ROM revision (see https://community.freescale.com/docs/DOC-94802) - ANADIG revision (ANADIG_DIGIPROC, as used for the i.MX SoC's) - OCOTP revision Some numbers: Colibri VF61 1.1A (2N02G) - 0x00000013 - 0x00610000 - 0x01000000 - 0x410000c8 Colibri VF61 V1.0B (1N02G) - 0x00000011 - 0x00610000 - 0x01000000 - 0x410000c8 Colibri VF61 V1.0A (which is actually a VF600 SoC, no L2 cache, since that was the only one we could buy back then, 1N02G printed on it) - 0x00000011 - 0x00610000 - 0x01000000 - none... Colibri VF50 V1.0A (1N02G) - 0x00000011 - 0x00610000 - 0x01000000 - none... Vybrid Tower Rev J (1N02G) - 0x00000011 - 0x00610000 - 0x01000000 - 0x410000c8 Read from u-boot md.l 0x80 1 md.l 0x40050260 1 md.l 0x400A5090 1 The ROM revision seems to differ most. So we would like to go with the revision from the ROM register 0x80. Now coming to the primary question. This ROM revision register is not really within any of the peripheral maps and I would like to access it for the versioning information. Currently, I used ioremap like below ioremap(ROM_REVISION_REGISTER, SZ_1); which I guess probably is not the right way to do it. What would be the correct or better way to do this? Also comments or feedback or any of the other parts of the patch are also welcome. Some Sample outputs are below: On Colibri VF61 V1.1A: root@colibri-vf:/sys/devices/soc0# ls backlight fxosc regulators sound uevent bl_on gpio-keys revision subsystem clk16m machine soc sxosc family power soc_id syscon-reboot root@colibri-vf:/sys/devices/soc0# cat revision 00000013 root@colibri-vf:/sys/devices/soc0# cat soc_id dbc8435c211629d4 root@colibri-vf:/sys/devices/soc0# cat family Freescale Vybrid VF610 On Colibri VF50 V1.1A: root@colibri-vf:/sys/devices/soc0# ls backlight machine subsystem bl_on power sxosc clk16m regulators syscon-reboot family revision toradex,vf50_touchctrl fxosc soc uevent gpio-keys soc_id root@colibri-vf:/sys/devices/soc0# cat revision 00000013 root@colibri-vf:/sys/devices/soc0# cat soc_id df63c12a2e2161d4 root@colibri-vf:/sys/devices/soc0# cat family Freescale Vybrid VF500 root@colibri-vf:/sys/devices/soc0# cat machine Freescale Vybrid Thanks & Regards, Sanchayan Maity. Sanchayan Maity (2): ARM: dts: vfxxx: Add OCOTP node ARM: vf610: Add SoC bus support for Vybrid arch/arm/boot/dts/vfxxx.dtsi | 5 +++ arch/arm/mach-imx/mach-vf610.c | 76 +++++++++++++++++++++++++++++++++++++++++- 2 files changed, 80 insertions(+), 1 deletion(-) -- 2.4.0 ^ permalink raw reply [flat|nested] 10+ messages in thread
* [RFC 0/2] Implement SoC bus support for Vybrid @ 2015-05-11 5:11 ` Sanchayan Maity 0 siblings, 0 replies; 10+ messages in thread From: Sanchayan Maity @ 2015-05-11 5:11 UTC (permalink / raw) To: linux-arm-kernel Hello, Currently this patchset is based of on our local branch but would like some comments before I push this to mainline through Shawn's tree. This patchset implements the following https://www.kernel.org/doc/Documentation/ABI/testing/sysfs-devices-soc Currently the required information is more or less read across the whole SoC, but I guess we cannot change that since these are the locations with the required information. There seem to be three options for the revision field: - ROM revision (see https://community.freescale.com/docs/DOC-94802) - ANADIG revision (ANADIG_DIGIPROC, as used for the i.MX SoC's) - OCOTP revision Some numbers: Colibri VF61 1.1A (2N02G) - 0x00000013 - 0x00610000 - 0x01000000 - 0x410000c8 Colibri VF61 V1.0B (1N02G) - 0x00000011 - 0x00610000 - 0x01000000 - 0x410000c8 Colibri VF61 V1.0A (which is actually a VF600 SoC, no L2 cache, since that was the only one we could buy back then, 1N02G printed on it) - 0x00000011 - 0x00610000 - 0x01000000 - none... Colibri VF50 V1.0A (1N02G) - 0x00000011 - 0x00610000 - 0x01000000 - none... Vybrid Tower Rev J (1N02G) - 0x00000011 - 0x00610000 - 0x01000000 - 0x410000c8 Read from u-boot md.l 0x80 1 md.l 0x40050260 1 md.l 0x400A5090 1 The ROM revision seems to differ most. So we would like to go with the revision from the ROM register 0x80. Now coming to the primary question. This ROM revision register is not really within any of the peripheral maps and I would like to access it for the versioning information. Currently, I used ioremap like below ioremap(ROM_REVISION_REGISTER, SZ_1); which I guess probably is not the right way to do it. What would be the correct or better way to do this? Also comments or feedback or any of the other parts of the patch are also welcome. Some Sample outputs are below: On Colibri VF61 V1.1A: root at colibri-vf:/sys/devices/soc0# ls backlight fxosc regulators sound uevent bl_on gpio-keys revision subsystem clk16m machine soc sxosc family power soc_id syscon-reboot root at colibri-vf:/sys/devices/soc0# cat revision 00000013 root at colibri-vf:/sys/devices/soc0# cat soc_id dbc8435c211629d4 root at colibri-vf:/sys/devices/soc0# cat family Freescale Vybrid VF610 On Colibri VF50 V1.1A: root at colibri-vf:/sys/devices/soc0# ls backlight machine subsystem bl_on power sxosc clk16m regulators syscon-reboot family revision toradex,vf50_touchctrl fxosc soc uevent gpio-keys soc_id root at colibri-vf:/sys/devices/soc0# cat revision 00000013 root at colibri-vf:/sys/devices/soc0# cat soc_id df63c12a2e2161d4 root at colibri-vf:/sys/devices/soc0# cat family Freescale Vybrid VF500 root at colibri-vf:/sys/devices/soc0# cat machine Freescale Vybrid Thanks & Regards, Sanchayan Maity. Sanchayan Maity (2): ARM: dts: vfxxx: Add OCOTP node ARM: vf610: Add SoC bus support for Vybrid arch/arm/boot/dts/vfxxx.dtsi | 5 +++ arch/arm/mach-imx/mach-vf610.c | 76 +++++++++++++++++++++++++++++++++++++++++- 2 files changed, 80 insertions(+), 1 deletion(-) -- 2.4.0 ^ permalink raw reply [flat|nested] 10+ messages in thread
* [RFC 1/2] ARM: dts: vfxxx: Add OCOTP node 2015-05-11 5:11 ` Sanchayan Maity @ 2015-05-11 5:11 ` Sanchayan Maity -1 siblings, 0 replies; 10+ messages in thread From: Sanchayan Maity @ 2015-05-11 5:11 UTC (permalink / raw) To: linux-arm-kernel, shawn.guo, kernel; +Cc: stefan, linux-kernel, Sanchayan Maity Add a device tree node for the On-Chip One Time Programmable Controller (OCOTP). Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> --- arch/arm/boot/dts/vfxxx.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi index 5857f60..a79776e 100644 --- a/arch/arm/boot/dts/vfxxx.dtsi +++ b/arch/arm/boot/dts/vfxxx.dtsi @@ -487,6 +487,11 @@ status = "disabled"; }; + ocotp: ocotp@400a5000 { + compatible = "fsl,vf610-ocotp", "syscon"; + reg = <0x400a5000 0x1000>; + }; + snvs0: snvs@400a7000 { compatible = "fsl,sec-v4.0-mon", "simple-bus"; #address-cells = <1>; -- 2.4.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [RFC 1/2] ARM: dts: vfxxx: Add OCOTP node @ 2015-05-11 5:11 ` Sanchayan Maity 0 siblings, 0 replies; 10+ messages in thread From: Sanchayan Maity @ 2015-05-11 5:11 UTC (permalink / raw) To: linux-arm-kernel Add a device tree node for the On-Chip One Time Programmable Controller (OCOTP). Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> --- arch/arm/boot/dts/vfxxx.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi index 5857f60..a79776e 100644 --- a/arch/arm/boot/dts/vfxxx.dtsi +++ b/arch/arm/boot/dts/vfxxx.dtsi @@ -487,6 +487,11 @@ status = "disabled"; }; + ocotp: ocotp at 400a5000 { + compatible = "fsl,vf610-ocotp", "syscon"; + reg = <0x400a5000 0x1000>; + }; + snvs0: snvs at 400a7000 { compatible = "fsl,sec-v4.0-mon", "simple-bus"; #address-cells = <1>; -- 2.4.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [RFC 2/2] ARM: vf610: Add SoC bus support for Vybrid 2015-05-11 5:11 ` Sanchayan Maity @ 2015-05-11 5:11 ` Sanchayan Maity -1 siblings, 0 replies; 10+ messages in thread From: Sanchayan Maity @ 2015-05-11 5:11 UTC (permalink / raw) To: linux-arm-kernel, shawn.guo, kernel; +Cc: stefan, linux-kernel, Sanchayan Maity Implements SoC bus support to export SoC specific information. Read the unique SoC ID from the Vybrid On Chip One Time Programmable (OCOTP) controller, SoC specific information from the Miscellaneous System Control Module (MSCM), revision from the ROM revision register and expose it via the SoC bus infrastructure. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> --- arch/arm/mach-imx/mach-vf610.c | 76 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 75 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/mach-vf610.c b/arch/arm/mach-imx/mach-vf610.c index 1ba7738..74681f1 100644 --- a/arch/arm/mach-imx/mach-vf610.c +++ b/arch/arm/mach-imx/mach-vf610.c @@ -9,13 +9,87 @@ #include <linux/of_platform.h> #include <linux/irqchip.h> +#include <linux/slab.h> +#include <linux/sys_soc.h> +#include <linux/mfd/syscon.h> +#include <linux/regmap.h> +#include <linux/random.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/hardware/cache-l2x0.h> #include "common.h" +#define OCOTP_CFG0_OFFSET 0x00000410 +#define OCOTP_CFG1_OFFSET 0x00000420 +#define MSCM_CPxCOUNT_OFFSET 0x0000002C +#define MSCM_CPxCFG1_OFFSET 0x00000014 +#define ROM_REVISION_REGISTER 0x00000080 + static void __init vf610_init_machine(void) { - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + struct regmap *ocotp_regmap, *mscm_regmap; + struct soc_device_attribute *soc_dev_attr; + struct device *parent = NULL; + struct soc_device *soc_dev; + char soc_type[] = "xx0"; + void __iomem *rom_rev; + u32 cpxcount, cpxcfg1; + u32 soc_id1, soc_id2; + u64 soc_id; + + ocotp_regmap = syscon_regmap_lookup_by_compatible("fsl,vf610-ocotp"); + if (IS_ERR(ocotp_regmap)) { + pr_err("regmap lookup for octop failed\n"); + goto out; + } + + mscm_regmap = syscon_regmap_lookup_by_compatible("fsl,vf610-mscm-cpucfg"); + if (IS_ERR(mscm_regmap)) { + pr_err("regmap lookup for mscm failed"); + goto out; + } + + regmap_read(ocotp_regmap, OCOTP_CFG0_OFFSET, &soc_id1); + regmap_read(ocotp_regmap, OCOTP_CFG1_OFFSET, &soc_id2); + + soc_id = (u64) soc_id1 << 32 | soc_id2; + add_device_randomness(&soc_id, sizeof(soc_id)); + + regmap_read(mscm_regmap, MSCM_CPxCOUNT_OFFSET, &cpxcount); + regmap_read(mscm_regmap, MSCM_CPxCFG1_OFFSET, &cpxcfg1); + + soc_type[0] = cpxcount ? '6' : '5'; /* Dual Core => VF6x0 */ + soc_type[1] = cpxcfg1 ? '1' : '0'; /* L2 Cache => VFx10 */ + + soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); + if (!soc_dev_attr) + goto out; + + soc_dev_attr->machine = kasprintf(GFP_KERNEL, "Freescale Vybrid"); + soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%llx", soc_id); + soc_dev_attr->family = kasprintf(GFP_KERNEL, "Freescale Vybrid VF%s", + soc_type); + + rom_rev = ioremap(ROM_REVISION_REGISTER, SZ_1); + if (rom_rev) + soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%08x", + readl(rom_rev)); + + soc_dev = soc_device_register(soc_dev_attr); + if (IS_ERR(soc_dev)) { + if (!rom_rev) + kfree(soc_dev_attr->revision); + kfree(soc_dev_attr->family); + kfree(soc_dev_attr->soc_id); + kfree(soc_dev_attr->machine); + kfree(soc_dev_attr); + goto out; + } + + parent = soc_device_to_device(soc_dev); + +out: + of_platform_populate(NULL, of_default_bus_match_table, NULL, parent); vf610_pm_init(); } -- 2.4.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [RFC 2/2] ARM: vf610: Add SoC bus support for Vybrid @ 2015-05-11 5:11 ` Sanchayan Maity 0 siblings, 0 replies; 10+ messages in thread From: Sanchayan Maity @ 2015-05-11 5:11 UTC (permalink / raw) To: linux-arm-kernel Implements SoC bus support to export SoC specific information. Read the unique SoC ID from the Vybrid On Chip One Time Programmable (OCOTP) controller, SoC specific information from the Miscellaneous System Control Module (MSCM), revision from the ROM revision register and expose it via the SoC bus infrastructure. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> --- arch/arm/mach-imx/mach-vf610.c | 76 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 75 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/mach-vf610.c b/arch/arm/mach-imx/mach-vf610.c index 1ba7738..74681f1 100644 --- a/arch/arm/mach-imx/mach-vf610.c +++ b/arch/arm/mach-imx/mach-vf610.c @@ -9,13 +9,87 @@ #include <linux/of_platform.h> #include <linux/irqchip.h> +#include <linux/slab.h> +#include <linux/sys_soc.h> +#include <linux/mfd/syscon.h> +#include <linux/regmap.h> +#include <linux/random.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/hardware/cache-l2x0.h> #include "common.h" +#define OCOTP_CFG0_OFFSET 0x00000410 +#define OCOTP_CFG1_OFFSET 0x00000420 +#define MSCM_CPxCOUNT_OFFSET 0x0000002C +#define MSCM_CPxCFG1_OFFSET 0x00000014 +#define ROM_REVISION_REGISTER 0x00000080 + static void __init vf610_init_machine(void) { - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + struct regmap *ocotp_regmap, *mscm_regmap; + struct soc_device_attribute *soc_dev_attr; + struct device *parent = NULL; + struct soc_device *soc_dev; + char soc_type[] = "xx0"; + void __iomem *rom_rev; + u32 cpxcount, cpxcfg1; + u32 soc_id1, soc_id2; + u64 soc_id; + + ocotp_regmap = syscon_regmap_lookup_by_compatible("fsl,vf610-ocotp"); + if (IS_ERR(ocotp_regmap)) { + pr_err("regmap lookup for octop failed\n"); + goto out; + } + + mscm_regmap = syscon_regmap_lookup_by_compatible("fsl,vf610-mscm-cpucfg"); + if (IS_ERR(mscm_regmap)) { + pr_err("regmap lookup for mscm failed"); + goto out; + } + + regmap_read(ocotp_regmap, OCOTP_CFG0_OFFSET, &soc_id1); + regmap_read(ocotp_regmap, OCOTP_CFG1_OFFSET, &soc_id2); + + soc_id = (u64) soc_id1 << 32 | soc_id2; + add_device_randomness(&soc_id, sizeof(soc_id)); + + regmap_read(mscm_regmap, MSCM_CPxCOUNT_OFFSET, &cpxcount); + regmap_read(mscm_regmap, MSCM_CPxCFG1_OFFSET, &cpxcfg1); + + soc_type[0] = cpxcount ? '6' : '5'; /* Dual Core => VF6x0 */ + soc_type[1] = cpxcfg1 ? '1' : '0'; /* L2 Cache => VFx10 */ + + soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); + if (!soc_dev_attr) + goto out; + + soc_dev_attr->machine = kasprintf(GFP_KERNEL, "Freescale Vybrid"); + soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%llx", soc_id); + soc_dev_attr->family = kasprintf(GFP_KERNEL, "Freescale Vybrid VF%s", + soc_type); + + rom_rev = ioremap(ROM_REVISION_REGISTER, SZ_1); + if (rom_rev) + soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%08x", + readl(rom_rev)); + + soc_dev = soc_device_register(soc_dev_attr); + if (IS_ERR(soc_dev)) { + if (!rom_rev) + kfree(soc_dev_attr->revision); + kfree(soc_dev_attr->family); + kfree(soc_dev_attr->soc_id); + kfree(soc_dev_attr->machine); + kfree(soc_dev_attr); + goto out; + } + + parent = soc_device_to_device(soc_dev); + +out: + of_platform_populate(NULL, of_default_bus_match_table, NULL, parent); vf610_pm_init(); } -- 2.4.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [RFC 2/2] ARM: vf610: Add SoC bus support for Vybrid 2015-05-11 5:11 ` Sanchayan Maity @ 2015-05-14 15:40 ` Stefan Agner -1 siblings, 0 replies; 10+ messages in thread From: Stefan Agner @ 2015-05-14 15:40 UTC (permalink / raw) To: Sanchayan Maity; +Cc: linux-arm-kernel, shawn.guo, kernel, linux-kernel Hi Sanchayan, The implementation looks good from my perspective. While the output differs a bit from what i.MX6 provides, I think its closer to what is specified. Also I like that we have the ROM revision available, since this information is relevant to identify early versions of the chip which have had issues... Some minor things below. On 2015-05-11 07:11, Sanchayan Maity wrote: > Implements SoC bus support to export SoC specific information. Read > the unique SoC ID from the Vybrid On Chip One Time Programmable (OCOTP) > controller, SoC specific information from the Miscellaneous System > Control Module (MSCM), revision from the ROM revision register and > expose it via the SoC bus infrastructure. > > Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> > --- > arch/arm/mach-imx/mach-vf610.c | 76 +++++++++++++++++++++++++++++++++++++++++- > 1 file changed, 75 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/mach-imx/mach-vf610.c b/arch/arm/mach-imx/mach-vf610.c > index 1ba7738..74681f1 100644 > --- a/arch/arm/mach-imx/mach-vf610.c > +++ b/arch/arm/mach-imx/mach-vf610.c > @@ -9,13 +9,87 @@ > > #include <linux/of_platform.h> > #include <linux/irqchip.h> > +#include <linux/slab.h> > +#include <linux/sys_soc.h> > +#include <linux/mfd/syscon.h> > +#include <linux/regmap.h> > +#include <linux/random.h> > +#include <linux/io.h> > #include <asm/mach/arch.h> > #include <asm/hardware/cache-l2x0.h> > #include "common.h" > > +#define OCOTP_CFG0_OFFSET 0x00000410 > +#define OCOTP_CFG1_OFFSET 0x00000420 > +#define MSCM_CPxCOUNT_OFFSET 0x0000002C > +#define MSCM_CPxCFG1_OFFSET 0x00000014 > +#define ROM_REVISION_REGISTER 0x00000080 > + > static void __init vf610_init_machine(void) > { > - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); > + struct regmap *ocotp_regmap, *mscm_regmap; > + struct soc_device_attribute *soc_dev_attr; > + struct device *parent = NULL; > + struct soc_device *soc_dev; > + char soc_type[] = "xx0"; > + void __iomem *rom_rev; > + u32 cpxcount, cpxcfg1; > + u32 soc_id1, soc_id2; > + u64 soc_id; > + > + ocotp_regmap = syscon_regmap_lookup_by_compatible("fsl,vf610-ocotp"); > + if (IS_ERR(ocotp_regmap)) { > + pr_err("regmap lookup for octop failed\n"); > + goto out; > + } > + > + mscm_regmap = syscon_regmap_lookup_by_compatible("fsl,vf610-mscm-cpucfg"); > + if (IS_ERR(mscm_regmap)) { > + pr_err("regmap lookup for mscm failed"); > + goto out; > + } > + > + regmap_read(ocotp_regmap, OCOTP_CFG0_OFFSET, &soc_id1); > + regmap_read(ocotp_regmap, OCOTP_CFG1_OFFSET, &soc_id2); > + > + soc_id = (u64) soc_id1 << 32 | soc_id2; > + add_device_randomness(&soc_id, sizeof(soc_id)); > + > + regmap_read(mscm_regmap, MSCM_CPxCOUNT_OFFSET, &cpxcount); > + regmap_read(mscm_regmap, MSCM_CPxCFG1_OFFSET, &cpxcfg1); > + > + soc_type[0] = cpxcount ? '6' : '5'; /* Dual Core => VF6x0 */ > + soc_type[1] = cpxcfg1 ? '1' : '0'; /* L2 Cache => VFx10 */ > + > + soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); > + if (!soc_dev_attr) > + goto out; This out seems not to take care of the memory allocated just above. > + > + soc_dev_attr->machine = kasprintf(GFP_KERNEL, "Freescale Vybrid"); > + soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%llx", soc_id); I would prefer %016llx as format, that shows that we have 64 bit identifier even when the highest bit is 0. > + soc_dev_attr->family = kasprintf(GFP_KERNEL, "Freescale Vybrid VF%s", > + soc_type); > + > + rom_rev = ioremap(ROM_REVISION_REGISTER, SZ_1); > + if (rom_rev) > + soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%08x", > + readl(rom_rev)); We should add the ROM to the device tree too. The memory map documented in the RM states that the ROM is accessable at 0x0000_0000-0x007fffff, that would be 8MiB. However, according to the RM, the on-chip ROM is only 96KiB. I quickly checked, U-Boot crashed when reading after 0x00018000, which is the 96KiB boundary, hence I would add a DT node with compatible fsl,vf610-ocrom or something which has a register range from 0x0-0x00017fff. > + > + soc_dev = soc_device_register(soc_dev_attr); > + if (IS_ERR(soc_dev)) { > + if (!rom_rev) > + kfree(soc_dev_attr->revision); > + kfree(soc_dev_attr->family); > + kfree(soc_dev_attr->soc_id); > + kfree(soc_dev_attr->machine); > + kfree(soc_dev_attr); > + goto out; > + } > + > + parent = soc_device_to_device(soc_dev); > + > +out: > + of_platform_populate(NULL, of_default_bus_match_table, NULL, parent); > vf610_pm_init(); > } ^ permalink raw reply [flat|nested] 10+ messages in thread
* [RFC 2/2] ARM: vf610: Add SoC bus support for Vybrid @ 2015-05-14 15:40 ` Stefan Agner 0 siblings, 0 replies; 10+ messages in thread From: Stefan Agner @ 2015-05-14 15:40 UTC (permalink / raw) To: linux-arm-kernel Hi Sanchayan, The implementation looks good from my perspective. While the output differs a bit from what i.MX6 provides, I think its closer to what is specified. Also I like that we have the ROM revision available, since this information is relevant to identify early versions of the chip which have had issues... Some minor things below. On 2015-05-11 07:11, Sanchayan Maity wrote: > Implements SoC bus support to export SoC specific information. Read > the unique SoC ID from the Vybrid On Chip One Time Programmable (OCOTP) > controller, SoC specific information from the Miscellaneous System > Control Module (MSCM), revision from the ROM revision register and > expose it via the SoC bus infrastructure. > > Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> > --- > arch/arm/mach-imx/mach-vf610.c | 76 +++++++++++++++++++++++++++++++++++++++++- > 1 file changed, 75 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/mach-imx/mach-vf610.c b/arch/arm/mach-imx/mach-vf610.c > index 1ba7738..74681f1 100644 > --- a/arch/arm/mach-imx/mach-vf610.c > +++ b/arch/arm/mach-imx/mach-vf610.c > @@ -9,13 +9,87 @@ > > #include <linux/of_platform.h> > #include <linux/irqchip.h> > +#include <linux/slab.h> > +#include <linux/sys_soc.h> > +#include <linux/mfd/syscon.h> > +#include <linux/regmap.h> > +#include <linux/random.h> > +#include <linux/io.h> > #include <asm/mach/arch.h> > #include <asm/hardware/cache-l2x0.h> > #include "common.h" > > +#define OCOTP_CFG0_OFFSET 0x00000410 > +#define OCOTP_CFG1_OFFSET 0x00000420 > +#define MSCM_CPxCOUNT_OFFSET 0x0000002C > +#define MSCM_CPxCFG1_OFFSET 0x00000014 > +#define ROM_REVISION_REGISTER 0x00000080 > + > static void __init vf610_init_machine(void) > { > - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); > + struct regmap *ocotp_regmap, *mscm_regmap; > + struct soc_device_attribute *soc_dev_attr; > + struct device *parent = NULL; > + struct soc_device *soc_dev; > + char soc_type[] = "xx0"; > + void __iomem *rom_rev; > + u32 cpxcount, cpxcfg1; > + u32 soc_id1, soc_id2; > + u64 soc_id; > + > + ocotp_regmap = syscon_regmap_lookup_by_compatible("fsl,vf610-ocotp"); > + if (IS_ERR(ocotp_regmap)) { > + pr_err("regmap lookup for octop failed\n"); > + goto out; > + } > + > + mscm_regmap = syscon_regmap_lookup_by_compatible("fsl,vf610-mscm-cpucfg"); > + if (IS_ERR(mscm_regmap)) { > + pr_err("regmap lookup for mscm failed"); > + goto out; > + } > + > + regmap_read(ocotp_regmap, OCOTP_CFG0_OFFSET, &soc_id1); > + regmap_read(ocotp_regmap, OCOTP_CFG1_OFFSET, &soc_id2); > + > + soc_id = (u64) soc_id1 << 32 | soc_id2; > + add_device_randomness(&soc_id, sizeof(soc_id)); > + > + regmap_read(mscm_regmap, MSCM_CPxCOUNT_OFFSET, &cpxcount); > + regmap_read(mscm_regmap, MSCM_CPxCFG1_OFFSET, &cpxcfg1); > + > + soc_type[0] = cpxcount ? '6' : '5'; /* Dual Core => VF6x0 */ > + soc_type[1] = cpxcfg1 ? '1' : '0'; /* L2 Cache => VFx10 */ > + > + soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); > + if (!soc_dev_attr) > + goto out; This out seems not to take care of the memory allocated just above. > + > + soc_dev_attr->machine = kasprintf(GFP_KERNEL, "Freescale Vybrid"); > + soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%llx", soc_id); I would prefer %016llx as format, that shows that we have 64 bit identifier even when the highest bit is 0. > + soc_dev_attr->family = kasprintf(GFP_KERNEL, "Freescale Vybrid VF%s", > + soc_type); > + > + rom_rev = ioremap(ROM_REVISION_REGISTER, SZ_1); > + if (rom_rev) > + soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%08x", > + readl(rom_rev)); We should add the ROM to the device tree too. The memory map documented in the RM states that the ROM is accessable at 0x0000_0000-0x007fffff, that would be 8MiB. However, according to the RM, the on-chip ROM is only 96KiB. I quickly checked, U-Boot crashed when reading after 0x00018000, which is the 96KiB boundary, hence I would add a DT node with compatible fsl,vf610-ocrom or something which has a register range from 0x0-0x00017fff. > + > + soc_dev = soc_device_register(soc_dev_attr); > + if (IS_ERR(soc_dev)) { > + if (!rom_rev) > + kfree(soc_dev_attr->revision); > + kfree(soc_dev_attr->family); > + kfree(soc_dev_attr->soc_id); > + kfree(soc_dev_attr->machine); > + kfree(soc_dev_attr); > + goto out; > + } > + > + parent = soc_device_to_device(soc_dev); > + > +out: > + of_platform_populate(NULL, of_default_bus_match_table, NULL, parent); > vf610_pm_init(); > } ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [RFC 0/2] Implement SoC bus support for Vybrid 2015-05-11 5:11 ` Sanchayan Maity @ 2015-05-13 18:02 ` maitysanchayan at gmail.com -1 siblings, 0 replies; 10+ messages in thread From: maitysanchayan @ 2015-05-13 18:02 UTC (permalink / raw) To: linux-arm-kernel, shawn.guo, kernel; +Cc: stefan, linux-kernel Hello, Ping? Any inputs? On 15-05-11 10:41:37, Sanchayan Maity wrote: > Hello, > > Currently this patchset is based of on our local branch but would like > some comments before I push this to mainline through Shawn's tree. > > This patchset implements the following > https://www.kernel.org/doc/Documentation/ABI/testing/sysfs-devices-soc > > Currently the required information is more or less read across the whole > SoC, but I guess we cannot change that since these are the locations > with the required information. > > There seem to be three options for the revision field: > - ROM revision (see https://community.freescale.com/docs/DOC-94802) > - ANADIG revision (ANADIG_DIGIPROC, as used for the i.MX SoC's) > - OCOTP revision > > Some numbers: > > Colibri VF61 1.1A (2N02G) > - 0x00000013 > - 0x00610000 > - 0x01000000 > - 0x410000c8 > > Colibri VF61 V1.0B (1N02G) > - 0x00000011 > - 0x00610000 > - 0x01000000 > - 0x410000c8 > > Colibri VF61 V1.0A (which is actually a VF600 SoC, no L2 cache, since > that was the only one we could buy back then, 1N02G printed on it) > - 0x00000011 > - 0x00610000 > - 0x01000000 > - none... > > Colibri VF50 V1.0A (1N02G) > - 0x00000011 > - 0x00610000 > - 0x01000000 > - none... > > Vybrid Tower Rev J (1N02G) > - 0x00000011 > - 0x00610000 > - 0x01000000 > - 0x410000c8 > > Read from u-boot > md.l 0x80 1 > md.l 0x40050260 1 > md.l 0x400A5090 1 > > > The ROM revision seems to differ most. So we would like to go with the > revision from the ROM register 0x80. > > Now coming to the primary question. This ROM revision register is not > really within any of the peripheral maps and I would like to access it > for the versioning information. Currently, I used ioremap like below > > ioremap(ROM_REVISION_REGISTER, SZ_1); > > which I guess probably is not the right way to do it. What would be the > correct or better way to do this? > > Also comments or feedback or any of the other parts of the patch are > also welcome. > > Some Sample outputs are below: > On Colibri VF61 V1.1A: > root@colibri-vf:/sys/devices/soc0# ls > backlight fxosc regulators sound uevent > bl_on gpio-keys revision subsystem > clk16m machine soc sxosc > family power soc_id syscon-reboot > root@colibri-vf:/sys/devices/soc0# cat revision > 00000013 > root@colibri-vf:/sys/devices/soc0# cat soc_id > dbc8435c211629d4 > root@colibri-vf:/sys/devices/soc0# cat family > Freescale Vybrid VF610 > > On Colibri VF50 V1.1A: > root@colibri-vf:/sys/devices/soc0# ls > backlight machine subsystem > bl_on power sxosc > clk16m regulators syscon-reboot > family revision toradex,vf50_touchctrl > fxosc soc uevent > gpio-keys soc_id > root@colibri-vf:/sys/devices/soc0# cat revision > 00000013 > root@colibri-vf:/sys/devices/soc0# cat soc_id > df63c12a2e2161d4 > root@colibri-vf:/sys/devices/soc0# cat family > Freescale Vybrid VF500 > root@colibri-vf:/sys/devices/soc0# cat machine > Freescale Vybrid > > Thanks & Regards, > Sanchayan Maity. > > Sanchayan Maity (2): > ARM: dts: vfxxx: Add OCOTP node > ARM: vf610: Add SoC bus support for Vybrid > > arch/arm/boot/dts/vfxxx.dtsi | 5 +++ > arch/arm/mach-imx/mach-vf610.c | 76 +++++++++++++++++++++++++++++++++++++++++- > 2 files changed, 80 insertions(+), 1 deletion(-) > > -- > 2.4.0 > ^ permalink raw reply [flat|nested] 10+ messages in thread
* [RFC 0/2] Implement SoC bus support for Vybrid @ 2015-05-13 18:02 ` maitysanchayan at gmail.com 0 siblings, 0 replies; 10+ messages in thread From: maitysanchayan at gmail.com @ 2015-05-13 18:02 UTC (permalink / raw) To: linux-arm-kernel Hello, Ping? Any inputs? On 15-05-11 10:41:37, Sanchayan Maity wrote: > Hello, > > Currently this patchset is based of on our local branch but would like > some comments before I push this to mainline through Shawn's tree. > > This patchset implements the following > https://www.kernel.org/doc/Documentation/ABI/testing/sysfs-devices-soc > > Currently the required information is more or less read across the whole > SoC, but I guess we cannot change that since these are the locations > with the required information. > > There seem to be three options for the revision field: > - ROM revision (see https://community.freescale.com/docs/DOC-94802) > - ANADIG revision (ANADIG_DIGIPROC, as used for the i.MX SoC's) > - OCOTP revision > > Some numbers: > > Colibri VF61 1.1A (2N02G) > - 0x00000013 > - 0x00610000 > - 0x01000000 > - 0x410000c8 > > Colibri VF61 V1.0B (1N02G) > - 0x00000011 > - 0x00610000 > - 0x01000000 > - 0x410000c8 > > Colibri VF61 V1.0A (which is actually a VF600 SoC, no L2 cache, since > that was the only one we could buy back then, 1N02G printed on it) > - 0x00000011 > - 0x00610000 > - 0x01000000 > - none... > > Colibri VF50 V1.0A (1N02G) > - 0x00000011 > - 0x00610000 > - 0x01000000 > - none... > > Vybrid Tower Rev J (1N02G) > - 0x00000011 > - 0x00610000 > - 0x01000000 > - 0x410000c8 > > Read from u-boot > md.l 0x80 1 > md.l 0x40050260 1 > md.l 0x400A5090 1 > > > The ROM revision seems to differ most. So we would like to go with the > revision from the ROM register 0x80. > > Now coming to the primary question. This ROM revision register is not > really within any of the peripheral maps and I would like to access it > for the versioning information. Currently, I used ioremap like below > > ioremap(ROM_REVISION_REGISTER, SZ_1); > > which I guess probably is not the right way to do it. What would be the > correct or better way to do this? > > Also comments or feedback or any of the other parts of the patch are > also welcome. > > Some Sample outputs are below: > On Colibri VF61 V1.1A: > root at colibri-vf:/sys/devices/soc0# ls > backlight fxosc regulators sound uevent > bl_on gpio-keys revision subsystem > clk16m machine soc sxosc > family power soc_id syscon-reboot > root at colibri-vf:/sys/devices/soc0# cat revision > 00000013 > root at colibri-vf:/sys/devices/soc0# cat soc_id > dbc8435c211629d4 > root at colibri-vf:/sys/devices/soc0# cat family > Freescale Vybrid VF610 > > On Colibri VF50 V1.1A: > root at colibri-vf:/sys/devices/soc0# ls > backlight machine subsystem > bl_on power sxosc > clk16m regulators syscon-reboot > family revision toradex,vf50_touchctrl > fxosc soc uevent > gpio-keys soc_id > root at colibri-vf:/sys/devices/soc0# cat revision > 00000013 > root at colibri-vf:/sys/devices/soc0# cat soc_id > df63c12a2e2161d4 > root at colibri-vf:/sys/devices/soc0# cat family > Freescale Vybrid VF500 > root at colibri-vf:/sys/devices/soc0# cat machine > Freescale Vybrid > > Thanks & Regards, > Sanchayan Maity. > > Sanchayan Maity (2): > ARM: dts: vfxxx: Add OCOTP node > ARM: vf610: Add SoC bus support for Vybrid > > arch/arm/boot/dts/vfxxx.dtsi | 5 +++ > arch/arm/mach-imx/mach-vf610.c | 76 +++++++++++++++++++++++++++++++++++++++++- > 2 files changed, 80 insertions(+), 1 deletion(-) > > -- > 2.4.0 > ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2015-05-14 15:41 UTC | newest] Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2015-05-11 5:11 [RFC 0/2] Implement SoC bus support for Vybrid Sanchayan Maity 2015-05-11 5:11 ` Sanchayan Maity 2015-05-11 5:11 ` [RFC 1/2] ARM: dts: vfxxx: Add OCOTP node Sanchayan Maity 2015-05-11 5:11 ` Sanchayan Maity 2015-05-11 5:11 ` [RFC 2/2] ARM: vf610: Add SoC bus support for Vybrid Sanchayan Maity 2015-05-11 5:11 ` Sanchayan Maity 2015-05-14 15:40 ` Stefan Agner 2015-05-14 15:40 ` Stefan Agner 2015-05-13 18:02 ` [RFC 0/2] Implement " maitysanchayan 2015-05-13 18:02 ` maitysanchayan at gmail.com
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.