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From: zhiyong.tao <zhiyong.tao@mediatek.com>
To: Chen-Yu Tsai <wenst@chromium.org>
Cc: Rob Herring <robh+dt@kernel.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	Mark Rutland <mark.rutland@arm.com>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	Sean Wang <sean.wang@kernel.org>,
	srv_heupstream <srv_heupstream@mediatek.com>,
	<hui.liu@mediatek.com>, "Eddie Huang" <eddie.huang@mediatek.com>,
	Light Hsieh <light.hsieh@mediatek.com>,
	Biao Huang <biao.huang@mediatek.com>,
	Hongzhou Yang <hongzhou.yang@mediatek.com>,
	Sean Wang <sean.wang@mediatek.com>,
	"Seiya Wang" <seiya.wang@mediatek.com>,
	Devicetree List <devicetree@vger.kernel.org>,
	LKML <linux-kernel@vger.kernel.org>,
	"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
	<linux-arm-kernel@lists.infradead.org>,
	"moderated list:ARM/Mediatek SoC support"
	<linux-mediatek@lists.infradead.org>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>
Subject: Re: [PATCH v11 1/4] dt-bindings: pinctrl: mt8195: add rsel define
Date: Thu, 2 Sep 2021 10:54:25 +0800	[thread overview]
Message-ID: <1630551265.2247.11.camel@mhfsdcap03> (raw)
In-Reply-To: <CAGXv+5HeNj2Ly-T1bWMvnYXv6nP-Q1kv+D9QEd+5u4xfNVibOg@mail.gmail.com>

On Wed, 2021-09-01 at 12:35 +0800, Chen-Yu Tsai wrote:
> On Mon, Aug 30, 2021 at 8:36 AM Zhiyong Tao <zhiyong.tao@mediatek.com> wrote:
> >
> > This patch adds rsel define for mt8195.
> >
> > Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
> > ---
> >  include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++
> >  1 file changed, 9 insertions(+)
> >
> > diff --git a/include/dt-bindings/pinctrl/mt65xx.h b/include/dt-bindings/pinctrl/mt65xx.h
> > index 7e16e58fe1f7..f5934abcd1bd 100644
> > --- a/include/dt-bindings/pinctrl/mt65xx.h
> > +++ b/include/dt-bindings/pinctrl/mt65xx.h
> > @@ -16,6 +16,15 @@
> >  #define MTK_PUPD_SET_R1R0_10 102
> >  #define MTK_PUPD_SET_R1R0_11 103
> >
> > +#define MTK_PULL_SET_RSEL_000  200
> > +#define MTK_PULL_SET_RSEL_001  201
> > +#define MTK_PULL_SET_RSEL_010  202
> > +#define MTK_PULL_SET_RSEL_011  203
> > +#define MTK_PULL_SET_RSEL_100  204
> > +#define MTK_PULL_SET_RSEL_101  205
> > +#define MTK_PULL_SET_RSEL_110  206
> > +#define MTK_PULL_SET_RSEL_111  207
> 
> Could you keep the spacing between constants tighter, or have no spacing
> at all? Like having MTK_PULL_SET_RSEL_000 defined as 104 and so on. This
> would reduce the chance of new macro values colliding with actual resistor
> values set in the datasheets, plus a contiguous space would be easy to
> rule as macros.
> 
> ChenYu

Hi chenyu,
By the current solution, it won't be mixed used by MTK_PULL_SET_RSEL_XXX
and real  resistor value.
If user use MTK_PULL_SET_RSEL_XXX, They don't care the define which
means how much resistor value.
We think that we don't contiguous macro space for different register. 
It may increase code complexity to make having MTK_PULL_SET_RSEL_000
defined as 104.

Thanks.

> 
> >  #define MTK_DRIVE_2mA  2
> >  #define MTK_DRIVE_4mA  4
> >  #define MTK_DRIVE_6mA  6
> > --
> > 2.18.0
> > _______________________________________________
> > Linux-mediatek mailing list
> > Linux-mediatek@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek

_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: zhiyong.tao <zhiyong.tao@mediatek.com>
To: Chen-Yu Tsai <wenst@chromium.org>
Cc: Rob Herring <robh+dt@kernel.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	Mark Rutland <mark.rutland@arm.com>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	Sean Wang <sean.wang@kernel.org>,
	srv_heupstream <srv_heupstream@mediatek.com>,
	<hui.liu@mediatek.com>, "Eddie Huang" <eddie.huang@mediatek.com>,
	Light Hsieh <light.hsieh@mediatek.com>,
	Biao Huang <biao.huang@mediatek.com>,
	Hongzhou Yang <hongzhou.yang@mediatek.com>,
	Sean Wang <sean.wang@mediatek.com>,
	"Seiya Wang" <seiya.wang@mediatek.com>,
	Devicetree List <devicetree@vger.kernel.org>,
	LKML <linux-kernel@vger.kernel.org>,
	"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
	<linux-arm-kernel@lists.infradead.org>,
	"moderated list:ARM/Mediatek SoC support"
	<linux-mediatek@lists.infradead.org>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>
Subject: Re: [PATCH v11 1/4] dt-bindings: pinctrl: mt8195: add rsel define
Date: Thu, 2 Sep 2021 10:54:25 +0800	[thread overview]
Message-ID: <1630551265.2247.11.camel@mhfsdcap03> (raw)
In-Reply-To: <CAGXv+5HeNj2Ly-T1bWMvnYXv6nP-Q1kv+D9QEd+5u4xfNVibOg@mail.gmail.com>

On Wed, 2021-09-01 at 12:35 +0800, Chen-Yu Tsai wrote:
> On Mon, Aug 30, 2021 at 8:36 AM Zhiyong Tao <zhiyong.tao@mediatek.com> wrote:
> >
> > This patch adds rsel define for mt8195.
> >
> > Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
> > ---
> >  include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++
> >  1 file changed, 9 insertions(+)
> >
> > diff --git a/include/dt-bindings/pinctrl/mt65xx.h b/include/dt-bindings/pinctrl/mt65xx.h
> > index 7e16e58fe1f7..f5934abcd1bd 100644
> > --- a/include/dt-bindings/pinctrl/mt65xx.h
> > +++ b/include/dt-bindings/pinctrl/mt65xx.h
> > @@ -16,6 +16,15 @@
> >  #define MTK_PUPD_SET_R1R0_10 102
> >  #define MTK_PUPD_SET_R1R0_11 103
> >
> > +#define MTK_PULL_SET_RSEL_000  200
> > +#define MTK_PULL_SET_RSEL_001  201
> > +#define MTK_PULL_SET_RSEL_010  202
> > +#define MTK_PULL_SET_RSEL_011  203
> > +#define MTK_PULL_SET_RSEL_100  204
> > +#define MTK_PULL_SET_RSEL_101  205
> > +#define MTK_PULL_SET_RSEL_110  206
> > +#define MTK_PULL_SET_RSEL_111  207
> 
> Could you keep the spacing between constants tighter, or have no spacing
> at all? Like having MTK_PULL_SET_RSEL_000 defined as 104 and so on. This
> would reduce the chance of new macro values colliding with actual resistor
> values set in the datasheets, plus a contiguous space would be easy to
> rule as macros.
> 
> ChenYu

Hi chenyu,
By the current solution, it won't be mixed used by MTK_PULL_SET_RSEL_XXX
and real  resistor value.
If user use MTK_PULL_SET_RSEL_XXX, They don't care the define which
means how much resistor value.
We think that we don't contiguous macro space for different register. 
It may increase code complexity to make having MTK_PULL_SET_RSEL_000
defined as 104.

Thanks.

> 
> >  #define MTK_DRIVE_2mA  2
> >  #define MTK_DRIVE_4mA  4
> >  #define MTK_DRIVE_6mA  6
> > --
> > 2.18.0
> > _______________________________________________
> > Linux-mediatek mailing list
> > Linux-mediatek@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-09-02  3:04 UTC|newest]

Thread overview: 78+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-30  0:35 [PATCH v11 0/4] Mediatek pinctrl patch on mt8195 Zhiyong Tao
2021-08-30  0:35 ` Zhiyong Tao
2021-08-30  0:35 ` Zhiyong Tao
2021-08-30  0:36 ` [PATCH v11 1/4] dt-bindings: pinctrl: mt8195: add rsel define Zhiyong Tao
2021-08-30  0:36   ` Zhiyong Tao
2021-08-30  0:36   ` Zhiyong Tao
2021-08-31 22:09   ` Rob Herring
2021-08-31 22:09     ` Rob Herring
2021-08-31 22:09     ` Rob Herring
2021-09-01  4:35   ` Chen-Yu Tsai
2021-09-01  4:35     ` Chen-Yu Tsai
2021-09-01  4:35     ` Chen-Yu Tsai
2021-09-02  2:54     ` zhiyong.tao [this message]
2021-09-02  2:54       ` zhiyong.tao
2021-09-02  3:35       ` Chen-Yu Tsai
2021-09-02  3:35         ` Chen-Yu Tsai
2021-09-02  3:35         ` Chen-Yu Tsai
2021-09-04  8:40         ` zhiyong.tao
2021-09-04  8:40           ` zhiyong.tao
2021-09-06  8:20           ` Chen-Yu Tsai
2021-09-06  8:20             ` Chen-Yu Tsai
2021-09-06  8:20             ` Chen-Yu Tsai
2021-09-09  6:46             ` zhiyong.tao
2021-09-09  6:46               ` zhiyong.tao
2021-09-14 12:27             ` zhiyong.tao
2021-09-14 12:27               ` zhiyong.tao
2021-09-15  3:25               ` Chen-Yu Tsai
2021-09-15  3:25                 ` Chen-Yu Tsai
2021-09-15  3:25                 ` Chen-Yu Tsai
2021-09-15  5:01                 ` Light Hsieh (謝明燈)
2021-08-30  0:36 ` [PATCH v11 2/4] dt-bindings: pinctrl: mt8195: change pull up/down description Zhiyong Tao
2021-08-30  0:36   ` Zhiyong Tao
2021-08-30  0:36   ` Zhiyong Tao
2021-08-31 22:13   ` Rob Herring
2021-08-31 22:13     ` Rob Herring
2021-08-31 22:13     ` Rob Herring
2021-09-01  2:00     ` zhiyong.tao
2021-09-01  2:00       ` zhiyong.tao
2021-09-01 10:21       ` Chen-Yu Tsai
2021-09-01 10:21         ` Chen-Yu Tsai
2021-09-01 10:21         ` Chen-Yu Tsai
2021-09-02  3:31         ` zhiyong.tao
2021-09-02  3:31           ` zhiyong.tao
2021-08-30  0:36 ` [PATCH v11 3/4] pinctrl: mediatek: mt8195: Add pm_ops Zhiyong Tao
2021-08-30  0:36   ` Zhiyong Tao
2021-08-30  0:36   ` Zhiyong Tao
2021-08-31  7:53   ` Chen-Yu Tsai
2021-08-31  7:53     ` Chen-Yu Tsai
2021-08-31  7:53     ` Chen-Yu Tsai
2021-08-31  9:11     ` zhiyong.tao
2021-08-31  9:11       ` zhiyong.tao
2021-08-30  0:36 ` [PATCH v11 4/4] pinctrl: mediatek: add rsel setting on MT8195 Zhiyong Tao
2021-08-30  0:36   ` Zhiyong Tao
2021-08-30  0:36   ` Zhiyong Tao
2021-08-30  3:33   ` kernel test robot
2021-08-30  3:33     ` kernel test robot
2021-09-01 10:10   ` Chen-Yu Tsai
2021-09-01 10:10     ` Chen-Yu Tsai
2021-09-01 10:10     ` Chen-Yu Tsai
2021-09-06  3:17     ` zhiyong.tao
2021-09-06  3:17       ` zhiyong.tao
2021-09-06 10:09       ` Chen-Yu Tsai
2021-09-06 10:09         ` Chen-Yu Tsai
2021-09-06 10:09         ` Chen-Yu Tsai
2021-09-09  7:46         ` zhiyong.tao
2021-09-09  7:46           ` zhiyong.tao
2021-09-16  9:31         ` zhiyong.tao
2021-09-16  9:31           ` zhiyong.tao
2021-09-16  9:40           ` Chen-Yu Tsai
2021-09-16  9:40             ` Chen-Yu Tsai
2021-09-16  9:40             ` Chen-Yu Tsai
2021-09-17  2:10             ` zhiyong.tao
2021-09-17  2:10               ` zhiyong.tao
2021-09-19 19:33           ` Linus Walleij
2021-09-19 19:33             ` Linus Walleij
2021-09-19 19:33             ` Linus Walleij
2021-09-22  1:47             ` zhiyong.tao
2021-09-22  1:47               ` zhiyong.tao

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