[Qemu-devel] acpi_piix4: expose no_hotplug attribute via i/o port

[Qemu-devel] acpi_piix4: expose no_hotplug attribute via i/o port

[Marcelo Tosatti]

On top of "add hotplug opt-out option for devices" patchset 
http://www.mail-archive.com/qemu-devel@nongnu.org/msg46953.html.

Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>

diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c
index 1990424..4d099e3 100644
--- a/hw/acpi_piix4.c
+++ b/hw/acpi_piix4.c
@@ -38,6 +38,7 @@
 #define PROC_BASE 0xaf00
 #define PCI_BASE 0xae00
 #define PCI_EJ_BASE 0xae08
+#define PCI_RMV_BASE 0xae0c
 
 #define PIIX4_CPU_HOTPLUG_STATUS 4
 #define PIIX4_PCI_HOTPLUG_STATUS 2
@@ -76,6 +77,7 @@ typedef struct PIIX4PMState {
     /* for pci hotplug */
     struct gpe_regs gpe;
     struct pci_status pci0_status;
+    uint32_t pci0_hotplug_enable;
 } PIIX4PMState;
 
 static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s);
@@ -326,6 +328,25 @@ static const VMStateDescription vmstate_acpi = {
     }
 };
 
+static void piix4_update_hotplug(PIIX4PMState *s)
+{
+    PCIDevice *dev = &s->dev;
+    BusState *bus = qdev_get_parent_bus(&dev->qdev);
+    DeviceState *qdev, *next;
+
+    s->pci0_hotplug_enable = 0;
+
+    QLIST_FOREACH_SAFE(qdev, &bus->children, sibling, next) {
+        PCIDeviceInfo *info = container_of(qdev->info, PCIDeviceInfo, qdev);
+        PCIDevice *pdev = DO_UPCAST(PCIDevice, qdev, qdev);
+        int slot = PCI_SLOT(pdev->devfn);
+
+        if (!info->no_hotplug) {
+            s->pci0_hotplug_enable |= (1 << slot);
+        }
+    }
+}
+
 static void piix4_reset(void *opaque)
 {
     PIIX4PMState *s = opaque;
@@ -340,6 +361,7 @@ static void piix4_reset(void *opaque)
         /* Mark SMM as already inited (until KVM supports SMM). */
         pci_conf[0x5B] = 0x02;
     }
+    piix4_update_hotplug(s);
 }
 
 static void piix4_powerdown(void *opaque, int irq, int power_failing)
@@ -594,6 +618,18 @@ static void pciej_write(void *opaque, uint32_t addr, uint32_t val)
     PIIX4_DPRINTF("pciej write %x <== %d\n", addr, val);
 }
 
+static uint32_t pcirmv_read(void *opaque, uint32_t addr)
+{
+    PIIX4PMState *s = opaque;
+
+    return s->pci0_hotplug_enable;
+}
+
+static void pcirmv_write(void *opaque, uint32_t addr, uint32_t val)
+{
+    return;
+}
+
 extern const char *global_cpu_model;
 
 static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev,
@@ -621,6 +657,9 @@ static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s)
     register_ioport_write(PCI_EJ_BASE, 4, 4, pciej_write, bus);
     register_ioport_read(PCI_EJ_BASE, 4, 4,  pciej_read, bus);
 
+    register_ioport_write(PCI_RMV_BASE, 4, 4, pcirmv_write, s);
+    register_ioport_read(PCI_RMV_BASE, 4, 4,  pcirmv_read, s);
+
     pci_bus_hotplug(bus, piix4_device_hotplug, &s->dev.qdev);
 }
 

[Qemu-devel] document QEMU<->ACPIBIOS PCI hotplug interface

[Marcelo Tosatti]

Document how QEMU communicates with ACPI BIOS
for PCI hotplug.

Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>

--- /dev/null	2010-12-14 09:23:48.414180082 -0200
+++ qemu/docs/specs/acpi_pci_hotplug.txt	2010-12-20 15:00:26.000000000 -0200
@@ -0,0 +1,39 @@
+QEMU<->ACPI BIOS PCI hotplug interface
+--------------------------------------
+
+QEMU supports PCI hotplug via ACPI, for PCI bus 0. This document
+describes the interface between QEMU and the ACPI BIOS.
+
+ACPI GPE block (IO ports 0xafe00-0xafe04):
+-----------------------------------------
+
+Generic ACPI GPE block. Bit 1 (GPE.1) used to notify PCI hotplug/eject
+event to ACPI BIOS, via SCI interrupt.
+
+PCI slot injection notification pending (IO port 0xae00-0xae03):
+---------------------------------------------------------------
+Slot injection notification pending. One bit per slot.
+
+Read by ACPI BIOS GPE.1 handler to notify OS of injection
+events.
+
+PCI slot removal notification (IO port 0xae04-0xae07):
+-----------------------------------------------------
+Slot removal notification pending. One bit per slot.
+
+Read by ACPI BIOS GPE.1 handler to notify OS of removal
+events.
+
+PCI device eject (IO port 0xae08-0xae0b):
+----------------------------------------
+
+Used by ACPI BIOS _EJ0 method to request device removal. One bit per slot.
+Reads return 0.
+
+PCI removability status (IO port 0xae0c-0xae0f):
+-----------------------------------------------
+
+Used by ACPI BIOS _RMV method to indicate removability status to OS. One 
+bit per slot.
+
+

Re: [Qemu-devel] document QEMU<->ACPIBIOS PCI hotplug interface

[Blue Swirl]

On Mon, Dec 20, 2010 at 5:09 PM, Marcelo Tosatti <mtosatti@redhat.com> wrote:
>
> Document how QEMU communicates with ACPI BIOS
> for PCI hotplug.
>
> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
>
> --- /dev/null   2010-12-14 09:23:48.414180082 -0200
> +++ qemu/docs/specs/acpi_pci_hotplug.txt        2010-12-20 15:00:26.000000000 -0200
> @@ -0,0 +1,39 @@
> +QEMU<->ACPI BIOS PCI hotplug interface
> +--------------------------------------
> +
> +QEMU supports PCI hotplug via ACPI, for PCI bus 0. This document
> +describes the interface between QEMU and the ACPI BIOS.
> +
> +ACPI GPE block (IO ports 0xafe00-0xafe04):

0xae00-0xae0f?

Re: [Qemu-devel] document QEMU<->ACPIBIOS PCI hotplug interface

[Marcelo Tosatti]

On Mon, Dec 20, 2010 at 08:11:36PM +0000, Blue Swirl wrote:
> On Mon, Dec 20, 2010 at 5:09 PM, Marcelo Tosatti <mtosatti@redhat.com> wrote:
> >
> > Document how QEMU communicates with ACPI BIOS
> > for PCI hotplug.
> >
> > Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
> >
> > --- /dev/null   2010-12-14 09:23:48.414180082 -0200
> > +++ qemu/docs/specs/acpi_pci_hotplug.txt        2010-12-20 15:00:26.000000000 -0200
> > @@ -0,0 +1,39 @@
> > +QEMU<->ACPI BIOS PCI hotplug interface
> > +--------------------------------------
> > +
> > +QEMU supports PCI hotplug via ACPI, for PCI bus 0. This document
> > +describes the interface between QEMU and the ACPI BIOS.
> > +
> > +ACPI GPE block (IO ports 0xafe00-0xafe04):
> 
> 0xae00-0xae0f?

0xaf0-0xaf3, thanks.

[Qemu-devel] PATCH: document QEMU<->ACPIBIOS PCI hotplug interface (v2)

[Marcelo Tosatti]

Document how QEMU communicates with ACPI BIOS
for PCI hotplug.

Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>

--- /dev/null	2010-12-14 09:23:48.414180082 -0200
+++ qemu/docs/specs/acpi_pci_hotplug.txt	2010-12-20 15:00:26.000000000 -0200
@@ -0,0 +1,39 @@
+QEMU<->ACPI BIOS PCI hotplug interface
+--------------------------------------
+
+QEMU supports PCI hotplug via ACPI, for PCI bus 0. This document
+describes the interface between QEMU and the ACPI BIOS.
+
+ACPI GPE block (IO ports 0xafe0-0xafe3):
+-----------------------------------------
+
+Generic ACPI GPE block. Bit 1 (GPE.1) used to notify PCI hotplug/eject
+event to ACPI BIOS, via SCI interrupt.
+
+PCI slot injection notification pending (IO port 0xae00-0xae03):
+---------------------------------------------------------------
+Slot injection notification pending. One bit per slot.
+
+Read by ACPI BIOS GPE.1 handler to notify OS of injection
+events.
+
+PCI slot removal notification (IO port 0xae04-0xae07):
+-----------------------------------------------------
+Slot removal notification pending. One bit per slot.
+
+Read by ACPI BIOS GPE.1 handler to notify OS of removal
+events.
+
+PCI device eject (IO port 0xae08-0xae0b):
+----------------------------------------
+
+Used by ACPI BIOS _EJ0 method to request device removal. One bit per slot.
+Reads return 0.
+
+PCI removability status (IO port 0xae0c-0xae0f):
+-----------------------------------------------
+
+Used by ACPI BIOS _RMV method to indicate removability status to OS. One 
+bit per slot.
+
+

[Qemu-devel] Re: PATCH: document QEMU<->ACPIBIOS PCI hotplug interface (v2)

[Avi Kivity]

On 12/21/2010 04:41 PM, Marcelo Tosatti wrote:
> Document how QEMU communicates with ACPI BIOS
> for PCI hotplug.
>
> Signed-off-by: Marcelo Tosatti<mtosatti@redhat.com>
>
> --- /dev/null	2010-12-14 09:23:48.414180082 -0200
> +++ qemu/docs/specs/acpi_pci_hotplug.txt	2010-12-20 15:00:26.000000000 -0200
> @@ -0,0 +1,39 @@
> +QEMU<->ACPI BIOS PCI hotplug interface
> +--------------------------------------
> +
> +QEMU supports PCI hotplug via ACPI, for PCI bus 0. This document
> +describes the interface between QEMU and the ACPI BIOS.
> +
> +ACPI GPE block (IO ports 0xafe0-0xafe3):
> +-----------------------------------------
> +
> +Generic ACPI GPE block. Bit 1 (GPE.1) used to notify PCI hotplug/eject
> +event to ACPI BIOS, via SCI interrupt.
> +
> +PCI slot injection notification pending (IO port 0xae00-0xae03):
> +---------------------------------------------------------------
> +Slot injection notification pending. One bit per slot.
> +
> +Read by ACPI BIOS GPE.1 handler to notify OS of injection
> +events.
> +
> +PCI slot removal notification (IO port 0xae04-0xae07):
> +-----------------------------------------------------
> +Slot removal notification pending. One bit per slot.
> +
> +Read by ACPI BIOS GPE.1 handler to notify OS of removal
> +events.
> +
> +PCI device eject (IO port 0xae08-0xae0b):
> +----------------------------------------
> +
> +Used by ACPI BIOS _EJ0 method to request device removal. One bit per slot.
> +Reads return 0.
> +
> +PCI removability status (IO port 0xae0c-0xae0f):
> +-----------------------------------------------
> +
> +Used by ACPI BIOS _RMV method to indicate removability status to OS. One
> +bit per slot.
> +
> +

Do we support byte and word access to those ports, or just dword access?

With this documentation, I'm fine with the _RMV DSDT patch.

-- 
error compiling committee.c: too many arguments to function

[Qemu-devel] Re: acpi_piix4: expose no_hotplug attribute via i/o port

[Michael S. Tsirkin]

On Wed, Dec 08, 2010 at 03:11:36PM -0200, Marcelo Tosatti wrote:
> 
> On top of "add hotplug opt-out option for devices" patchset 
> http://www.mail-archive.com/qemu-devel@nongnu.org/msg46953.html.
> 
> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>

I put this patchset on my tree - want me to queue this
one too or prefer to merge through your tree?
Not sure how to test this one though, but I can
test that piix still works :)

> diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c
> index 1990424..4d099e3 100644
> --- a/hw/acpi_piix4.c
> +++ b/hw/acpi_piix4.c
> @@ -38,6 +38,7 @@
>  #define PROC_BASE 0xaf00
>  #define PCI_BASE 0xae00
>  #define PCI_EJ_BASE 0xae08
> +#define PCI_RMV_BASE 0xae0c
>  
>  #define PIIX4_CPU_HOTPLUG_STATUS 4
>  #define PIIX4_PCI_HOTPLUG_STATUS 2
> @@ -76,6 +77,7 @@ typedef struct PIIX4PMState {
>      /* for pci hotplug */
>      struct gpe_regs gpe;
>      struct pci_status pci0_status;
> +    uint32_t pci0_hotplug_enable;
>  } PIIX4PMState;
>  
>  static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s);
> @@ -326,6 +328,25 @@ static const VMStateDescription vmstate_acpi = {
>      }
>  };
>  
> +static void piix4_update_hotplug(PIIX4PMState *s)
> +{
> +    PCIDevice *dev = &s->dev;
> +    BusState *bus = qdev_get_parent_bus(&dev->qdev);
> +    DeviceState *qdev, *next;
> +
> +    s->pci0_hotplug_enable = 0;
> +
> +    QLIST_FOREACH_SAFE(qdev, &bus->children, sibling, next) {
> +        PCIDeviceInfo *info = container_of(qdev->info, PCIDeviceInfo, qdev);
> +        PCIDevice *pdev = DO_UPCAST(PCIDevice, qdev, qdev);
> +        int slot = PCI_SLOT(pdev->devfn);
> +
> +        if (!info->no_hotplug) {
> +            s->pci0_hotplug_enable |= (1 << slot);
> +        }
> +    }
> +}
> +
>  static void piix4_reset(void *opaque)
>  {
>      PIIX4PMState *s = opaque;
> @@ -340,6 +361,7 @@ static void piix4_reset(void *opaque)
>          /* Mark SMM as already inited (until KVM supports SMM). */
>          pci_conf[0x5B] = 0x02;
>      }
> +    piix4_update_hotplug(s);
>  }
>  
>  static void piix4_powerdown(void *opaque, int irq, int power_failing)
> @@ -594,6 +618,18 @@ static void pciej_write(void *opaque, uint32_t addr, uint32_t val)
>      PIIX4_DPRINTF("pciej write %x <== %d\n", addr, val);
>  }
>  
> +static uint32_t pcirmv_read(void *opaque, uint32_t addr)
> +{
> +    PIIX4PMState *s = opaque;
> +
> +    return s->pci0_hotplug_enable;
> +}
> +
> +static void pcirmv_write(void *opaque, uint32_t addr, uint32_t val)
> +{
> +    return;
> +}
> +
>  extern const char *global_cpu_model;
>  
>  static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev,
> @@ -621,6 +657,9 @@ static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s)
>      register_ioport_write(PCI_EJ_BASE, 4, 4, pciej_write, bus);
>      register_ioport_read(PCI_EJ_BASE, 4, 4,  pciej_read, bus);
>  
> +    register_ioport_write(PCI_RMV_BASE, 4, 4, pcirmv_write, s);
> +    register_ioport_read(PCI_RMV_BASE, 4, 4,  pcirmv_read, s);
> +
>      pci_bus_hotplug(bus, piix4_device_hotplug, &s->dev.qdev);
>  }
>  

[Qemu-devel] Re: acpi_piix4: expose no_hotplug attribute via i/o port

[Michael S. Tsirkin]

On Wed, Jan 05, 2011 at 06:00:00PM +0200, Michael S. Tsirkin wrote:
> On Wed, Dec 08, 2010 at 03:11:36PM -0200, Marcelo Tosatti wrote:
> > 
> > On top of "add hotplug opt-out option for devices" patchset 
> > http://www.mail-archive.com/qemu-devel@nongnu.org/msg46953.html.
> > 
> > Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
> 
> I put this patchset on my tree - want me to queue this
> one too or prefer to merge through your tree?
> Not sure how to test this one though, but I can
> test that piix still works :)

Or if you prefer to tunnel them all through your tree
I can drop them from mine ... ah the agony of choice.

> > diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c
> > index 1990424..4d099e3 100644
> > --- a/hw/acpi_piix4.c
> > +++ b/hw/acpi_piix4.c
> > @@ -38,6 +38,7 @@
> >  #define PROC_BASE 0xaf00
> >  #define PCI_BASE 0xae00
> >  #define PCI_EJ_BASE 0xae08
> > +#define PCI_RMV_BASE 0xae0c
> >  
> >  #define PIIX4_CPU_HOTPLUG_STATUS 4
> >  #define PIIX4_PCI_HOTPLUG_STATUS 2
> > @@ -76,6 +77,7 @@ typedef struct PIIX4PMState {
> >      /* for pci hotplug */
> >      struct gpe_regs gpe;
> >      struct pci_status pci0_status;
> > +    uint32_t pci0_hotplug_enable;
> >  } PIIX4PMState;
> >  
> >  static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s);
> > @@ -326,6 +328,25 @@ static const VMStateDescription vmstate_acpi = {
> >      }
> >  };
> >  
> > +static void piix4_update_hotplug(PIIX4PMState *s)
> > +{
> > +    PCIDevice *dev = &s->dev;
> > +    BusState *bus = qdev_get_parent_bus(&dev->qdev);
> > +    DeviceState *qdev, *next;
> > +
> > +    s->pci0_hotplug_enable = 0;
> > +
> > +    QLIST_FOREACH_SAFE(qdev, &bus->children, sibling, next) {
> > +        PCIDeviceInfo *info = container_of(qdev->info, PCIDeviceInfo, qdev);
> > +        PCIDevice *pdev = DO_UPCAST(PCIDevice, qdev, qdev);
> > +        int slot = PCI_SLOT(pdev->devfn);
> > +
> > +        if (!info->no_hotplug) {
> > +            s->pci0_hotplug_enable |= (1 << slot);
> > +        }
> > +    }
> > +}
> > +
> >  static void piix4_reset(void *opaque)
> >  {
> >      PIIX4PMState *s = opaque;
> > @@ -340,6 +361,7 @@ static void piix4_reset(void *opaque)
> >          /* Mark SMM as already inited (until KVM supports SMM). */
> >          pci_conf[0x5B] = 0x02;
> >      }
> > +    piix4_update_hotplug(s);
> >  }
> >  
> >  static void piix4_powerdown(void *opaque, int irq, int power_failing)
> > @@ -594,6 +618,18 @@ static void pciej_write(void *opaque, uint32_t addr, uint32_t val)
> >      PIIX4_DPRINTF("pciej write %x <== %d\n", addr, val);
> >  }
> >  
> > +static uint32_t pcirmv_read(void *opaque, uint32_t addr)
> > +{
> > +    PIIX4PMState *s = opaque;
> > +
> > +    return s->pci0_hotplug_enable;
> > +}
> > +
> > +static void pcirmv_write(void *opaque, uint32_t addr, uint32_t val)
> > +{
> > +    return;
> > +}
> > +
> >  extern const char *global_cpu_model;
> >  
> >  static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev,
> > @@ -621,6 +657,9 @@ static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s)
> >      register_ioport_write(PCI_EJ_BASE, 4, 4, pciej_write, bus);
> >      register_ioport_read(PCI_EJ_BASE, 4, 4,  pciej_read, bus);
> >  
> > +    register_ioport_write(PCI_RMV_BASE, 4, 4, pcirmv_write, s);
> > +    register_ioport_read(PCI_RMV_BASE, 4, 4,  pcirmv_read, s);
> > +
> >      pci_bus_hotplug(bus, piix4_device_hotplug, &s->dev.qdev);
> >  }
> >  

[Qemu-devel] Re: acpi_piix4: expose no_hotplug attribute via i/o port

[Michael S. Tsirkin]

On Wed, Dec 08, 2010 at 03:11:36PM -0200, Marcelo Tosatti wrote:
> 
> On top of "add hotplug opt-out option for devices" patchset 
> http://www.mail-archive.com/qemu-devel@nongnu.org/msg46953.html.
> 
> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
> 
> diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c

Um, this does not seem to apply to master.
It's at 23979dc5411befabe9049e37075b2b6320debc4e for me.
What am I doing wrong?

> index 1990424..4d099e3 100644
> --- a/hw/acpi_piix4.c
> +++ b/hw/acpi_piix4.c
> @@ -38,6 +38,7 @@
>  #define PROC_BASE 0xaf00
>  #define PCI_BASE 0xae00
>  #define PCI_EJ_BASE 0xae08
> +#define PCI_RMV_BASE 0xae0c
>  
>  #define PIIX4_CPU_HOTPLUG_STATUS 4
>  #define PIIX4_PCI_HOTPLUG_STATUS 2
> @@ -76,6 +77,7 @@ typedef struct PIIX4PMState {
>      /* for pci hotplug */
>      struct gpe_regs gpe;
>      struct pci_status pci0_status;
> +    uint32_t pci0_hotplug_enable;
>  } PIIX4PMState;
>  
>  static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s);
> @@ -326,6 +328,25 @@ static const VMStateDescription vmstate_acpi = {
>      }
>  };
>  
> +static void piix4_update_hotplug(PIIX4PMState *s)
> +{
> +    PCIDevice *dev = &s->dev;
> +    BusState *bus = qdev_get_parent_bus(&dev->qdev);
> +    DeviceState *qdev, *next;
> +
> +    s->pci0_hotplug_enable = 0;
> +
> +    QLIST_FOREACH_SAFE(qdev, &bus->children, sibling, next) {
> +        PCIDeviceInfo *info = container_of(qdev->info, PCIDeviceInfo, qdev);
> +        PCIDevice *pdev = DO_UPCAST(PCIDevice, qdev, qdev);
> +        int slot = PCI_SLOT(pdev->devfn);
> +
> +        if (!info->no_hotplug) {
> +            s->pci0_hotplug_enable |= (1 << slot);
> +        }
> +    }
> +}
> +
>  static void piix4_reset(void *opaque)
>  {
>      PIIX4PMState *s = opaque;
> @@ -340,6 +361,7 @@ static void piix4_reset(void *opaque)
>          /* Mark SMM as already inited (until KVM supports SMM). */
>          pci_conf[0x5B] = 0x02;
>      }
> +    piix4_update_hotplug(s);
>  }
>  
>  static void piix4_powerdown(void *opaque, int irq, int power_failing)
> @@ -594,6 +618,18 @@ static void pciej_write(void *opaque, uint32_t addr, uint32_t val)
>      PIIX4_DPRINTF("pciej write %x <== %d\n", addr, val);
>  }
>  
> +static uint32_t pcirmv_read(void *opaque, uint32_t addr)
> +{
> +    PIIX4PMState *s = opaque;
> +
> +    return s->pci0_hotplug_enable;
> +}
> +
> +static void pcirmv_write(void *opaque, uint32_t addr, uint32_t val)
> +{
> +    return;
> +}
> +
>  extern const char *global_cpu_model;
>  
>  static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev,
> @@ -621,6 +657,9 @@ static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s)
>      register_ioport_write(PCI_EJ_BASE, 4, 4, pciej_write, bus);
>      register_ioport_read(PCI_EJ_BASE, 4, 4,  pciej_read, bus);
>  
> +    register_ioport_write(PCI_RMV_BASE, 4, 4, pcirmv_write, s);
> +    register_ioport_read(PCI_RMV_BASE, 4, 4,  pcirmv_read, s);
> +
>      pci_bus_hotplug(bus, piix4_device_hotplug, &s->dev.qdev);
>  }
>  

[Qemu-devel] Re: acpi_piix4: expose no_hotplug attribute via i/o port

[Marcelo Tosatti]

On Wed, Jan 05, 2011 at 09:32:39PM +0200, Michael S. Tsirkin wrote:
> On Wed, Dec 08, 2010 at 03:11:36PM -0200, Marcelo Tosatti wrote:
> > 
> > On top of "add hotplug opt-out option for devices" patchset 
> > http://www.mail-archive.com/qemu-devel@nongnu.org/msg46953.html.
> > 
> > Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
> > 
> > diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c
> 
> Um, this does not seem to apply to master.
> It's at 23979dc5411befabe9049e37075b2b6320debc4e for me.
> What am I doing wrong?

It applies on top of the PCI no_hotplug patches from Gerd. Once you have
those in the pci branch, i can regenerate this one and retest.

These should not go through the uq/master branch, that is a KVM support
code specific branch.

Thanks.