* [U-Boot] [PATCH v2] arm: socfpga: Fix emac1 doesn't work on socdk board
@ 2015-12-18 8:50 圣江 吴
2015-12-18 8:51 ` Chin Liang See
2015-12-18 12:49 ` Marek Vasut
0 siblings, 2 replies; 5+ messages in thread
From: 圣江 吴 @ 2015-12-18 8:50 UTC (permalink / raw)
To: u-boot
On Dec 18, 2015, at 12:46 AM, Chin Liang See <clsee@altera.com> wrote:
Hi Shengjiang,
On Fri, 2015-12-18 at 16:43 +0800, shengjiangwu wrote:
Updated pinmux group MIXED1IO[0-13] for RGMII1.
Updated EMAC1 clock.
Signed-off-by: shengjiangwu <shengjiangwu@icloud.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
---
Changes for v2:
- fixed wrong perpll for emac1
---
board/altera/cyclone5-socdk/qts/pll_config.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/altera/cyclone5-socdk/qts/pll_config.h
b/board/altera/cyclone5-socdk/qts/pll_config.h
index eccc705..5b754ac 100644
--- a/board/altera/cyclone5-socdk/qts/pll_config.h
+++ b/board/altera/cyclone5-socdk/qts/pll_config.h
@@ -65,7 +65,7 @@
#define CONFIG_HPS_CLK_PERVCO_HZ 1000000000
#define CONFIG_HPS_CLK_SDRVCO_HZ 666666666
#define CONFIG_HPS_CLK_EMAC0_HZ 250000000
-#define CONFIG_HPS_CLK_EMAC1_HZ 50000000
+#define CONFIG_HPS_CLK_EMAC1_HZ 250000000
This is good. But I believe you miss the pinmux change here. You just
need to take the previous patch and made the change.
Thanks
Chin Liang
Sorry for not?familiar?with re-patch?process.?
Best Regards
Shengjiangwu
#define CONFIG_HPS_CLK_USBCLK_HZ 200000000
#define CONFIG_HPS_CLK_NAND_HZ 50000000
#define CONFIG_HPS_CLK_SDMMC_HZ 200000000
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v2] arm: socfpga: Fix emac1 doesn't work on socdk board
2015-12-18 8:50 [U-Boot] [PATCH v2] arm: socfpga: Fix emac1 doesn't work on socdk board 圣江 吴
@ 2015-12-18 8:51 ` Chin Liang See
2015-12-18 12:49 ` Marek Vasut
1 sibling, 0 replies; 5+ messages in thread
From: Chin Liang See @ 2015-12-18 8:51 UTC (permalink / raw)
To: u-boot
On Fri, 2015-12-18 at 08:50 +0000, ?? ? wrote:
>
>
> On Dec 18, 2015, at 12:46 AM, Chin Liang See <clsee@altera.com>
> wrote:
>
> > Hi Shengjiang,
> >
> > On Fri, 2015-12-18 at 16:43 +0800, shengjiangwu wrote:
> > > Updated pinmux group MIXED1IO[0-13] for RGMII1.
> > > Updated EMAC1 clock.
> > > Signed-off-by: shengjiangwu <shengjiangwu@icloud.com>
> > > Cc: Chin Liang See <clsee@altera.com>
> > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > > Cc: Dinh Nguyen <dinh.linux@gmail.com>
> > > Cc: Pavel Machek <pavel@denx.de>
> > > Cc: Marek Vasut <marex@denx.de>
> > > Cc: Stefan Roese <sr@denx.de>
> > > ---
> > > Changes for v2:
> > > - fixed wrong perpll for emac1
> > > ---
> > > board/altera/cyclone5-socdk/qts/pll_config.h | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > diff --git a/board/altera/cyclone5-socdk/qts/pll_config.h
> > > b/board/altera/cyclone5-socdk/qts/pll_config.h
> > > index eccc705..5b754ac 100644
> > > --- a/board/altera/cyclone5-socdk/qts/pll_config.h
> > > +++ b/board/altera/cyclone5-socdk/qts/pll_config.h
> > > @@ -65,7 +65,7 @@
> > > #define CONFIG_HPS_CLK_PERVCO_HZ 1000000000
> > > #define CONFIG_HPS_CLK_SDRVCO_HZ 666666666
> > > #define CONFIG_HPS_CLK_EMAC0_HZ 250000000
> > > -#define CONFIG_HPS_CLK_EMAC1_HZ 50000000
> > > +#define CONFIG_HPS_CLK_EMAC1_HZ 250000000
> >
> > This is good. But I believe you miss the pinmux change here. You
> > just
> > need to take the previous patch and made the change.
> >
> > Thanks
> > Chin Liang
> Sorry for not familiar with re-patch process.
No worries as you are almost there.
Thanks
Chin Liang
> Best Regards
> Shengjiangwu
> >
> >
> > > #define CONFIG_HPS_CLK_USBCLK_HZ 200000000
> > > #define CONFIG_HPS_CLK_NAND_HZ 50000000
> > > #define CONFIG_HPS_CLK_SDMMC_HZ 200000000
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v2] arm: socfpga: Fix emac1 doesn't work on socdk board
2015-12-18 8:50 [U-Boot] [PATCH v2] arm: socfpga: Fix emac1 doesn't work on socdk board 圣江 吴
2015-12-18 8:51 ` Chin Liang See
@ 2015-12-18 12:49 ` Marek Vasut
1 sibling, 0 replies; 5+ messages in thread
From: Marek Vasut @ 2015-12-18 12:49 UTC (permalink / raw)
To: u-boot
On Friday, December 18, 2015 at 09:50:09 AM, ?? ? wrote:
> On Dec 18, 2015, at 12:46 AM, Chin Liang See <clsee@altera.com> wrote:
>
> Hi Shengjiang,
>
> On Fri, 2015-12-18 at 16:43 +0800, shengjiangwu wrote:
> Updated pinmux group MIXED1IO[0-13] for RGMII1.
> Updated EMAC1 clock.
>
> Signed-off-by: shengjiangwu <shengjiangwu@icloud.com>
> Cc: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Dinh Nguyen <dinh.linux@gmail.com>
> Cc: Pavel Machek <pavel@denx.de>
> Cc: Marek Vasut <marex@denx.de>
> Cc: Stefan Roese <sr@denx.de>
> ---
> Changes for v2:
> - fixed wrong perpll for emac1
> ---
> board/altera/cyclone5-socdk/qts/pll_config.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/board/altera/cyclone5-socdk/qts/pll_config.h
> b/board/altera/cyclone5-socdk/qts/pll_config.h
> index eccc705..5b754ac 100644
> --- a/board/altera/cyclone5-socdk/qts/pll_config.h
> +++ b/board/altera/cyclone5-socdk/qts/pll_config.h
> @@ -65,7 +65,7 @@
> #define CONFIG_HPS_CLK_PERVCO_HZ 1000000000
> #define CONFIG_HPS_CLK_SDRVCO_HZ 666666666
> #define CONFIG_HPS_CLK_EMAC0_HZ 250000000
> -#define CONFIG_HPS_CLK_EMAC1_HZ 50000000
> +#define CONFIG_HPS_CLK_EMAC1_HZ 250000000
>
>
> This is good. But I believe you miss the pinmux change here. You just
> need to take the previous patch and made the change.
>
> Thanks
> Chin Liang
>
> Sorry for not familiar with re-patch process.
Take a look at 'git rebase -i' and 'git commit --amend' and at the 'tig' command
and then probably 'patchman' in the U-Boot source tree. These might be helpful.
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v2] arm: socfpga: Fix emac1 doesn't work on socdk board
2015-12-18 8:43 shengjiangwu
@ 2015-12-18 8:45 ` Chin Liang See
0 siblings, 0 replies; 5+ messages in thread
From: Chin Liang See @ 2015-12-18 8:45 UTC (permalink / raw)
To: u-boot
Hi Shengjiang,
On Fri, 2015-12-18 at 16:43 +0800, shengjiangwu wrote:
> Updated pinmux group MIXED1IO[0-13] for RGMII1.
> Updated EMAC1 clock.
>
> Signed-off-by: shengjiangwu <shengjiangwu@icloud.com>
> Cc: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Dinh Nguyen <dinh.linux@gmail.com>
> Cc: Pavel Machek <pavel@denx.de>
> Cc: Marek Vasut <marex@denx.de>
> Cc: Stefan Roese <sr@denx.de>
> ---
> Changes for v2:
> - fixed wrong perpll for emac1
> ---
> board/altera/cyclone5-socdk/qts/pll_config.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/board/altera/cyclone5-socdk/qts/pll_config.h
> b/board/altera/cyclone5-socdk/qts/pll_config.h
> index eccc705..5b754ac 100644
> --- a/board/altera/cyclone5-socdk/qts/pll_config.h
> +++ b/board/altera/cyclone5-socdk/qts/pll_config.h
> @@ -65,7 +65,7 @@
> #define CONFIG_HPS_CLK_PERVCO_HZ 1000000000
> #define CONFIG_HPS_CLK_SDRVCO_HZ 666666666
> #define CONFIG_HPS_CLK_EMAC0_HZ 250000000
> -#define CONFIG_HPS_CLK_EMAC1_HZ 50000000
> +#define CONFIG_HPS_CLK_EMAC1_HZ 250000000
This is good. But I believe you miss the pinmux change here. You just
need to take the previous patch and made the change.
Thanks
Chin Liang
> #define CONFIG_HPS_CLK_USBCLK_HZ 200000000
> #define CONFIG_HPS_CLK_NAND_HZ 50000000
> #define CONFIG_HPS_CLK_SDMMC_HZ 200000000
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v2] arm: socfpga: Fix emac1 doesn't work on socdk board
@ 2015-12-18 8:43 shengjiangwu
2015-12-18 8:45 ` Chin Liang See
0 siblings, 1 reply; 5+ messages in thread
From: shengjiangwu @ 2015-12-18 8:43 UTC (permalink / raw)
To: u-boot
Updated pinmux group MIXED1IO[0-13] for RGMII1.
Updated EMAC1 clock.
Signed-off-by: shengjiangwu <shengjiangwu@icloud.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
---
Changes for v2:
- fixed wrong perpll for emac1
---
board/altera/cyclone5-socdk/qts/pll_config.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/altera/cyclone5-socdk/qts/pll_config.h b/board/altera/cyclone5-socdk/qts/pll_config.h
index eccc705..5b754ac 100644
--- a/board/altera/cyclone5-socdk/qts/pll_config.h
+++ b/board/altera/cyclone5-socdk/qts/pll_config.h
@@ -65,7 +65,7 @@
#define CONFIG_HPS_CLK_PERVCO_HZ 1000000000
#define CONFIG_HPS_CLK_SDRVCO_HZ 666666666
#define CONFIG_HPS_CLK_EMAC0_HZ 250000000
-#define CONFIG_HPS_CLK_EMAC1_HZ 50000000
+#define CONFIG_HPS_CLK_EMAC1_HZ 250000000
#define CONFIG_HPS_CLK_USBCLK_HZ 200000000
#define CONFIG_HPS_CLK_NAND_HZ 50000000
#define CONFIG_HPS_CLK_SDMMC_HZ 200000000
--
1.7.9.5
^ permalink raw reply related [flat|nested] 5+ messages in thread
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2015-12-18 8:50 [U-Boot] [PATCH v2] arm: socfpga: Fix emac1 doesn't work on socdk board 圣江 吴
2015-12-18 8:51 ` Chin Liang See
2015-12-18 12:49 ` Marek Vasut
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2015-12-18 8:43 shengjiangwu
2015-12-18 8:45 ` Chin Liang See
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