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From: Shawn Guo <shawnguo@kernel.org>
To: Dong Aisheng <aisheng.dong@nxp.com>
Cc: linux-clk@vger.kernel.org, anson.huang@nxp.com,
	mturquette@baylibre.com, sboyd@codeaurora.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 04/11] clk: imx: correct dram pll type
Date: Sun, 12 Jun 2016 19:33:10 +0800	[thread overview]
Message-ID: <20160612113310.GB20243@tiger> (raw)
In-Reply-To: <1465396420-27064-4-git-send-email-aisheng.dong@nxp.com>

On Wed, Jun 08, 2016 at 10:33:33PM +0800, Dong Aisheng wrote:
> From: Anson Huang <b20788@freescale.com>
> 
> DRAM PLL is a audio/video type PLL, need to correct
> it to get correct ops of PLL.
> 
> Signed-off-by: Anson Huang <b20788@freescale.com>
> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>

'clk: imx7d: ' for patch prefix would be more clear.  Updated it and
applied the patch.

Shawn

> ---
>  drivers/clk/imx/clk-imx7d.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c
> index 1cb866773fc0..dc8c3355a66d 100644
> --- a/drivers/clk/imx/clk-imx7d.c
> +++ b/drivers/clk/imx/clk-imx7d.c
> @@ -395,7 +395,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
>  	clks[IMX7D_PLL_VIDEO_MAIN_SRC] = imx_clk_mux("pll_video_main_src", base + 0x130, 14, 2, pll_bypass_src_sel, ARRAY_SIZE(pll_bypass_src_sel));
>  
>  	clks[IMX7D_PLL_ARM_MAIN]  = imx_clk_pllv3(IMX_PLLV3_SYS, "pll_arm_main", "pll_arm_main_src", base + 0x60, 0x7f);
> -	clks[IMX7D_PLL_DRAM_MAIN] = imx_clk_pllv3(IMX_PLLV3_SYS, "pll_dram_main", "pll_dram_main_src", base + 0x70, 0x7f);
> +	clks[IMX7D_PLL_DRAM_MAIN] = imx_clk_pllv3(IMX_PLLV3_AV, "pll_dram_main", "pll_dram_main_src", base + 0x70, 0x7f);
>  	clks[IMX7D_PLL_SYS_MAIN]  = imx_clk_pllv3(IMX_PLLV3_GENERIC, "pll_sys_main", "pll_sys_main_src", base + 0xb0, 0x1);
>  	clks[IMX7D_PLL_ENET_MAIN] = imx_clk_pllv3(IMX_PLLV3_ENET_IMX7, "pll_enet_main", "pll_enet_main_src", base + 0xe0, 0x0);
>  	clks[IMX7D_PLL_AUDIO_MAIN] = imx_clk_pllv3(IMX_PLLV3_AV, "pll_audio_main", "pll_audio_main_src", base + 0xf0, 0x7f);
> -- 
> 1.9.1
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: shawnguo@kernel.org (Shawn Guo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 04/11] clk: imx: correct dram pll type
Date: Sun, 12 Jun 2016 19:33:10 +0800	[thread overview]
Message-ID: <20160612113310.GB20243@tiger> (raw)
In-Reply-To: <1465396420-27064-4-git-send-email-aisheng.dong@nxp.com>

On Wed, Jun 08, 2016 at 10:33:33PM +0800, Dong Aisheng wrote:
> From: Anson Huang <b20788@freescale.com>
> 
> DRAM PLL is a audio/video type PLL, need to correct
> it to get correct ops of PLL.
> 
> Signed-off-by: Anson Huang <b20788@freescale.com>
> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>

'clk: imx7d: ' for patch prefix would be more clear.  Updated it and
applied the patch.

Shawn

> ---
>  drivers/clk/imx/clk-imx7d.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c
> index 1cb866773fc0..dc8c3355a66d 100644
> --- a/drivers/clk/imx/clk-imx7d.c
> +++ b/drivers/clk/imx/clk-imx7d.c
> @@ -395,7 +395,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
>  	clks[IMX7D_PLL_VIDEO_MAIN_SRC] = imx_clk_mux("pll_video_main_src", base + 0x130, 14, 2, pll_bypass_src_sel, ARRAY_SIZE(pll_bypass_src_sel));
>  
>  	clks[IMX7D_PLL_ARM_MAIN]  = imx_clk_pllv3(IMX_PLLV3_SYS, "pll_arm_main", "pll_arm_main_src", base + 0x60, 0x7f);
> -	clks[IMX7D_PLL_DRAM_MAIN] = imx_clk_pllv3(IMX_PLLV3_SYS, "pll_dram_main", "pll_dram_main_src", base + 0x70, 0x7f);
> +	clks[IMX7D_PLL_DRAM_MAIN] = imx_clk_pllv3(IMX_PLLV3_AV, "pll_dram_main", "pll_dram_main_src", base + 0x70, 0x7f);
>  	clks[IMX7D_PLL_SYS_MAIN]  = imx_clk_pllv3(IMX_PLLV3_GENERIC, "pll_sys_main", "pll_sys_main_src", base + 0xb0, 0x1);
>  	clks[IMX7D_PLL_ENET_MAIN] = imx_clk_pllv3(IMX_PLLV3_ENET_IMX7, "pll_enet_main", "pll_enet_main_src", base + 0xe0, 0x0);
>  	clks[IMX7D_PLL_AUDIO_MAIN] = imx_clk_pllv3(IMX_PLLV3_AV, "pll_audio_main", "pll_audio_main_src", base + 0xf0, 0x7f);
> -- 
> 1.9.1
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2016-06-12 11:33 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-08 14:33 [PATCH 01/11] clk: imx: clk-pllv3: fix incorrect handle of enet powerdown bit Dong Aisheng
2016-06-08 14:33 ` Dong Aisheng
2016-06-08 14:33 ` [PATCH 02/11] clk: imx: correct AV PLL rate formula Dong Aisheng
2016-06-08 14:33   ` Dong Aisheng
2016-06-12 11:30   ` Shawn Guo
2016-06-12 11:30     ` Shawn Guo
2016-06-08 14:33 ` [PATCH 03/11] clk: imx7d: correct dram root clk parent select Dong Aisheng
2016-06-08 14:33   ` Dong Aisheng
2016-06-12 11:31   ` Shawn Guo
2016-06-12 11:31     ` Shawn Guo
2016-06-08 14:33 ` [PATCH 04/11] clk: imx: correct dram pll type Dong Aisheng
2016-06-08 14:33   ` Dong Aisheng
2016-06-12 11:33   ` Shawn Guo [this message]
2016-06-12 11:33     ` Shawn Guo
2016-06-08 14:33 ` [PATCH 05/11] clk: imx: refine the powerup_set bit of clk-pllv3 Dong Aisheng
2016-06-08 14:33   ` Dong Aisheng
2016-06-09  7:43   ` Lothar Waßmann
2016-06-09  7:43     ` Lothar Waßmann
2016-06-09  7:43     ` Lothar Waßmann
2016-06-12 11:56     ` Dong Aisheng
2016-06-12 11:56       ` Dong Aisheng
2016-06-12 11:36   ` Shawn Guo
2016-06-12 11:36     ` Shawn Guo
2016-06-12 11:51     ` Dong Aisheng
2016-06-12 11:51       ` Dong Aisheng
2016-06-12 12:13     ` Dong Aisheng
2016-06-12 12:13       ` Dong Aisheng
2016-06-12 13:29       ` Shawn Guo
2016-06-12 13:29         ` Shawn Guo
2016-06-12 14:51         ` Dong Aisheng
2016-06-12 14:51           ` Dong Aisheng
2016-06-12 14:51           ` Dong Aisheng
2016-06-13  7:37           ` [PATCH V2 1/1] clk: imx: refine the powerdown " Dong Aisheng
2016-06-13  7:37             ` Dong Aisheng
2016-06-13 11:42             ` kbuild test robot
2016-06-13 11:42               ` kbuild test robot
2016-06-13 12:24             ` [PATCH V3 " Dong Aisheng
2016-06-13 12:24               ` Dong Aisheng
2016-06-16  1:05               ` Shawn Guo
2016-06-16  1:05                 ` Shawn Guo
2016-06-08 14:33 ` [PATCH 06/11] clk: imx6ul: fix gpt2 clock names Dong Aisheng
2016-06-08 14:33   ` Dong Aisheng
2016-06-12 11:41   ` Shawn Guo
2016-06-12 11:41     ` Shawn Guo
2016-06-12 11:52     ` Dong Aisheng
2016-06-12 11:52       ` Dong Aisheng
2016-06-13  7:38   ` [PATCH V2 1/1] " Dong Aisheng
2016-06-13  7:38     ` Dong Aisheng
2016-06-16  1:06     ` Shawn Guo
2016-06-16  1:06       ` Shawn Guo
2016-06-08 14:33 ` [PATCH 07/11] clk: imx6ul: fix pll clock parents Dong Aisheng
2016-06-08 14:33   ` Dong Aisheng
2016-06-12 11:43   ` Shawn Guo
2016-06-12 11:43     ` Shawn Guo
2016-06-12 11:52     ` Dong Aisheng
2016-06-12 11:52       ` Dong Aisheng
2016-06-12 12:19       ` Dong Aisheng
2016-06-12 12:19         ` Dong Aisheng
2016-06-12 13:22         ` Shawn Guo
2016-06-12 13:22           ` Shawn Guo
2016-06-08 14:33 ` [PATCH 08/11] clk: imx6q: " Dong Aisheng
2016-06-08 14:33   ` Dong Aisheng
2016-06-08 14:33 ` [PATCH 09/11] clk: imx6sx: " Dong Aisheng
2016-06-08 14:33   ` Dong Aisheng
2016-06-08 14:33 ` [PATCH 10/11] clk: imx6sl: " Dong Aisheng
2016-06-08 14:33   ` Dong Aisheng
2016-06-08 14:33 ` [PATCH 11/11] clk: imx7d: " Dong Aisheng
2016-06-08 14:33   ` Dong Aisheng
2016-06-12 14:56 ` [PATCH 01/11] clk: imx: clk-pllv3: fix incorrect handle of enet powerdown bit Dong Aisheng
2016-06-12 14:56   ` Dong Aisheng
2016-06-12 14:56   ` Dong Aisheng
2016-06-13  2:54   ` Shawn Guo
2016-06-13  2:54     ` Shawn Guo
2016-06-13  2:54     ` Shawn Guo

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