From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Icenowy Zheng <icenowy@aosc.io>
Cc: Chen-Yu Tsai <wens@csie.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com
Subject: Re: [PATCH 2/3] arm64: allwinner: a64: add USB0 OHCI/EHCI related devicetree parts
Date: Wed, 5 Apr 2017 09:26:31 +0200 [thread overview]
Message-ID: <20170405072631.ou4e5gafvagwpykq@lukather> (raw)
In-Reply-To: <7828ffa0-f570-9841-a9e6-fe175f8169ac@aosc.io>
[-- Attachment #1: Type: text/plain, Size: 1760 bytes --]
On Wed, Apr 05, 2017 at 03:17:19PM +0800, Icenowy Zheng wrote:
>
>
> 在 2017年04月05日 15:15, Maxime Ripard 写道:
> > On Wed, Apr 05, 2017 at 02:45:17AM +0800, Icenowy Zheng wrote:
> > > As we added USB0 route auto switching support for A64, add related
> > > device tree parts to the A64 DTSI file (EHCI0/OHCI0 controllers and the
> > > pmu0 memory area for PHY).
> > >
> > > Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> > > ---
> > > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 24 ++++++++++++++++++++++++
> > > 1 file changed, 24 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> > > index 1c64ea2d23f9..a8916df99048 100644
> > > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> > > @@ -179,8 +179,10 @@
> > > usbphy: phy@01c19400 {
> > > compatible = "allwinner,sun50i-a64-usb-phy";
> > > reg = <0x01c19400 0x14>,
> > > + <0x01c1a800 0x4>,
> > > <0x01c1b800 0x4>;
> > > reg-names = "phy_ctrl",
> > > + "pmu0",
> >
> > This breaks the older DTs, and that property isn't documented.
>
> It's already documented.
>
> In the H3 dual-route patchset I have already added this.
>
> (" * "pmu0" for H3, V3s and A64")
This is not in linux-next then, sorry.
> P.S. to be compatible with older DTs, I think I should adjust
> the phy driver, make it enable dual-route function only when
> pmu0 is present.
That, or if we're quick enough, we can still add it to 4.11. There's a
bit of time left.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
Cc: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Subject: Re: [PATCH 2/3] arm64: allwinner: a64: add USB0 OHCI/EHCI related devicetree parts
Date: Wed, 5 Apr 2017 09:26:31 +0200 [thread overview]
Message-ID: <20170405072631.ou4e5gafvagwpykq@lukather> (raw)
In-Reply-To: <7828ffa0-f570-9841-a9e6-fe175f8169ac-h8G6r0blFSE@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 1781 bytes --]
On Wed, Apr 05, 2017 at 03:17:19PM +0800, Icenowy Zheng wrote:
>
>
> 在 2017年04月05日 15:15, Maxime Ripard 写道:
> > On Wed, Apr 05, 2017 at 02:45:17AM +0800, Icenowy Zheng wrote:
> > > As we added USB0 route auto switching support for A64, add related
> > > device tree parts to the A64 DTSI file (EHCI0/OHCI0 controllers and the
> > > pmu0 memory area for PHY).
> > >
> > > Signed-off-by: Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
> > > ---
> > > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 24 ++++++++++++++++++++++++
> > > 1 file changed, 24 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> > > index 1c64ea2d23f9..a8916df99048 100644
> > > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> > > @@ -179,8 +179,10 @@
> > > usbphy: phy@01c19400 {
> > > compatible = "allwinner,sun50i-a64-usb-phy";
> > > reg = <0x01c19400 0x14>,
> > > + <0x01c1a800 0x4>,
> > > <0x01c1b800 0x4>;
> > > reg-names = "phy_ctrl",
> > > + "pmu0",
> >
> > This breaks the older DTs, and that property isn't documented.
>
> It's already documented.
>
> In the H3 dual-route patchset I have already added this.
>
> (" * "pmu0" for H3, V3s and A64")
This is not in linux-next then, sorry.
> P.S. to be compatible with older DTs, I think I should adjust
> the phy driver, make it enable dual-route function only when
> pmu0 is present.
That, or if we're quick enough, we can still add it to 4.11. There's a
bit of time left.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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WARNING: multiple messages have this Message-ID (diff)
From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] arm64: allwinner: a64: add USB0 OHCI/EHCI related devicetree parts
Date: Wed, 5 Apr 2017 09:26:31 +0200 [thread overview]
Message-ID: <20170405072631.ou4e5gafvagwpykq@lukather> (raw)
In-Reply-To: <7828ffa0-f570-9841-a9e6-fe175f8169ac@aosc.io>
On Wed, Apr 05, 2017 at 03:17:19PM +0800, Icenowy Zheng wrote:
>
>
> ? 2017?04?05? 15:15, Maxime Ripard ??:
> > On Wed, Apr 05, 2017 at 02:45:17AM +0800, Icenowy Zheng wrote:
> > > As we added USB0 route auto switching support for A64, add related
> > > device tree parts to the A64 DTSI file (EHCI0/OHCI0 controllers and the
> > > pmu0 memory area for PHY).
> > >
> > > Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> > > ---
> > > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 24 ++++++++++++++++++++++++
> > > 1 file changed, 24 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> > > index 1c64ea2d23f9..a8916df99048 100644
> > > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> > > @@ -179,8 +179,10 @@
> > > usbphy: phy at 01c19400 {
> > > compatible = "allwinner,sun50i-a64-usb-phy";
> > > reg = <0x01c19400 0x14>,
> > > + <0x01c1a800 0x4>,
> > > <0x01c1b800 0x4>;
> > > reg-names = "phy_ctrl",
> > > + "pmu0",
> >
> > This breaks the older DTs, and that property isn't documented.
>
> It's already documented.
>
> In the H3 dual-route patchset I have already added this.
>
> (" * "pmu0" for H3, V3s and A64")
This is not in linux-next then, sorry.
> P.S. to be compatible with older DTs, I think I should adjust
> the phy driver, make it enable dual-route function only when
> pmu0 is present.
That, or if we're quick enough, we can still add it to 4.11. There's a
bit of time left.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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next prev parent reply other threads:[~2017-04-05 7:26 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-04 18:45 [PATCH 1/3] phy: sun4i-usb: enable PHY0 dual route switching for A64 USB PHY Icenowy Zheng
2017-04-04 18:45 ` Icenowy Zheng
2017-04-04 18:45 ` Icenowy Zheng
2017-04-04 18:45 ` [PATCH 2/3] arm64: allwinner: a64: add USB0 OHCI/EHCI related devicetree parts Icenowy Zheng
2017-04-04 18:45 ` Icenowy Zheng
2017-04-04 18:45 ` Icenowy Zheng
2017-04-05 7:15 ` Maxime Ripard
2017-04-05 7:15 ` Maxime Ripard
2017-04-05 7:17 ` Icenowy Zheng
2017-04-05 7:17 ` Icenowy Zheng
2017-04-05 7:26 ` Maxime Ripard [this message]
2017-04-05 7:26 ` Maxime Ripard
2017-04-05 7:26 ` Maxime Ripard
2017-04-05 7:33 ` Icenowy Zheng
2017-04-05 7:33 ` Icenowy Zheng
2017-04-05 8:13 ` Maxime Ripard
2017-04-05 8:13 ` Maxime Ripard
2017-04-05 8:13 ` Maxime Ripard
2017-04-04 18:45 ` [PATCH 3/3] arm64: allwinner: a64: enable EHCI0/OHCI0 controller for Pine64 Icenowy Zheng
2017-04-04 18:45 ` Icenowy Zheng
2017-04-04 18:45 ` Icenowy Zheng
2017-04-05 7:03 ` [PATCH 1/3] phy: sun4i-usb: enable PHY0 dual route switching for A64 USB PHY Maxime Ripard
2017-04-05 7:03 ` Maxime Ripard
2017-04-05 7:03 ` Maxime Ripard
2017-04-05 9:59 ` Kishon Vijay Abraham I
2017-04-05 9:59 ` Kishon Vijay Abraham I
2017-04-05 9:59 ` Kishon Vijay Abraham I
2017-04-05 12:50 [PATCH 0/3] Allwinner A64 EHCI0/OHCI0 devicetree change Icenowy Zheng
2017-04-05 12:50 ` [PATCH 2/3] arm64: allwinner: a64: add USB0 OHCI/EHCI related devicetree parts Icenowy Zheng
2017-04-05 12:50 ` Icenowy Zheng
2017-04-05 12:50 ` Icenowy Zheng
2017-04-05 13:05 ` Maxime Ripard
2017-04-05 13:05 ` Maxime Ripard
2017-04-05 13:05 ` Maxime Ripard
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