[PATCH linux dev-4.10] aspeed-g5: add gpiolib irqchip support.

[PATCH linux dev-4.10] aspeed-g5: add gpiolib irqchip support.

[Mykola Kostenok]

To allow support gpio class infrastructure for Aspeed SOC.
To allow gpio_to_irq conversion.

Enable irqchip and libgpio_irqchip for aspeed-g5.

Signed-off-by: Mykola Kostenok <c_mykolak@mellanox.com>
---
 arch/arm/mach-aspeed/Kconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/mach-aspeed/Kconfig b/arch/arm/mach-aspeed/Kconfig
index f3f8c5c658db..e098b7a780ee 100644
--- a/arch/arm/mach-aspeed/Kconfig
+++ b/arch/arm/mach-aspeed/Kconfig
@@ -27,6 +27,9 @@ config MACH_ASPEED_G5
 	depends on ARCH_MULTI_V6
 	select CPU_V6
 	select PINCTRL_ASPEED_G5
+	select GENERIC_IRQ_CHIP
+	select GPIOLIB_IRQCHIP
+
 	help
 	 Say yes if you intend to run on an Aspeed ast2500 or similar
 	 fifth generation Aspeed BMCs.
-- 
2.11.0

Re: [PATCH linux dev-4.10] aspeed-g5: add gpiolib irqchip support.

[Andrew Jeffery]

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Hi Mykola,

On Thu, 2017-06-29 at 16:32 +0300, Mykola Kostenok wrote:
> To allow support gpio class infrastructure for Aspeed SOC.
> To allow gpio_to_irq conversion.
> 
> Enable irqchip and libgpio_irqchip for aspeed-g5.
> 
> > Signed-off-by: Mykola Kostenok <c_mykolak@mellanox.com>
> ---
>  arch/arm/mach-aspeed/Kconfig | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/arm/mach-aspeed/Kconfig b/arch/arm/mach-aspeed/Kconfig
> index f3f8c5c658db..e098b7a780ee 100644
> --- a/arch/arm/mach-aspeed/Kconfig
> +++ b/arch/arm/mach-aspeed/Kconfig
> @@ -27,6 +27,9 @@ config MACH_ASPEED_G5
> >  	depends on ARCH_MULTI_V6
> >  	select CPU_V6
> >  	select PINCTRL_ASPEED_G5
> > +	select GENERIC_IRQ_CHIP
> +	select GPIOLIB_IRQCHIP

Sorry, I don't understand the need for this; CONFIG_GPIOLIB_IRQCHIP is
already selected by CONFIG_GPIO_ASPEED, which is enabled by the
aspeed_g5_defconfig. I don't think we need to do this here.

Further, what problem are you trying to solve? From my testing GPIO
interrupts are functional.

Cheers,

Andrew

> +
> >  	help
> >  	 Say yes if you intend to run on an Aspeed ast2500 or similar
> >  	 fifth generation Aspeed BMCs.

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RE: [PATCH linux dev-4.10] aspeed-g5: add gpiolib irqchip support.

[Vadim Pasternak]

Hi Andrew,

> -----Original Message-----
> From: openbmc [mailto:openbmc-
> bounces+yanivab=mellanox.com@lists.ozlabs.org] On Behalf Of Andrew
> Jeffery
> Sent: Friday, June 30, 2017 4:39 AM
> To: Mykola Kostenok <c_mykolak@mellanox.com>; Joel Stanley
> <joel@jms.id.au>; openbmc@lists.ozlabs.org
> Subject: Re: [PATCH linux dev-4.10] aspeed-g5: add gpiolib irqchip support.
> 
> Hi Mykola,
> 
> On Thu, 2017-06-29 at 16:32 +0300, Mykola Kostenok wrote:
> > To allow support gpio class infrastructure for Aspeed SOC.
> > To allow gpio_to_irq conversion.
> >
> > Enable irqchip and libgpio_irqchip for aspeed-g5.
> >
> > > Signed-off-by: Mykola Kostenok <c_mykolak@mellanox.com>
> > ---
> >  arch/arm/mach-aspeed/Kconfig | 3 +++
> >  1 file changed, 3 insertions(+)
> >
> > diff --git a/arch/arm/mach-aspeed/Kconfig
> > b/arch/arm/mach-aspeed/Kconfig index f3f8c5c658db..e098b7a780ee
> 100644
> > --- a/arch/arm/mach-aspeed/Kconfig
> > +++ b/arch/arm/mach-aspeed/Kconfig
> > @@ -27,6 +27,9 @@ config MACH_ASPEED_G5
> > >  	depends on ARCH_MULTI_V6
> > >  	select CPU_V6
> > >  	select PINCTRL_ASPEED_G5
> > > +	select GENERIC_IRQ_CHIP
> > +	select GPIOLIB_IRQCHIP
> 
> Sorry, I don't understand the need for this; CONFIG_GPIOLIB_IRQCHIP is
> already selected by CONFIG_GPIO_ASPEED, which is enabled by the
> aspeed_g5_defconfig. I don't think we need to do this here.
> 
> Further, what problem are you trying to solve? From my testing GPIO
> interrupts are functional.
> 

We have the number of CPLDs with the internal interrupt control logic. Interrupts on top routed through the particular GPIO to SoC.
The motivation was to specify top aggregation interrupt for CPLD driver in DTS with GPIO pin number and convert it in driver with gpio_to_irq and connect irq to CPLD interrupt handler.

Cheers,
Vadim.

> Cheers,
> 
> Andrew
> 
> > +
> > >  	help
> > >  	 Say yes if you intend to run on an Aspeed ast2500 or similar
> > >  	 fifth generation Aspeed BMCs.

Re: [PATCH linux dev-4.10] aspeed-g5: add gpiolib irqchip support.

[Andrew Jeffery]

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On Fri, 2017-06-30 at 04:44 +0000, Vadim Pasternak wrote:
> > Sorry, I don't understand the need for this; CONFIG_GPIOLIB_IRQCHIP is
> > already selected by CONFIG_GPIO_ASPEED, which is enabled by the
> > aspeed_g5_defconfig. I don't think we need to do this here.
> > 
> > Further, what problem are you trying to solve? From my testing GPIO
> > interrupts are functional.
> > 
> 
> We have the number of CPLDs with the internal interrupt control
> logic. Interrupts on top routed through the particular GPIO to SoC.
> The motivation was to specify top aggregation interrupt for CPLD
> driver in DTS with GPIO pin number and convert it in driver with
> gpio_to_irq and connect irq to CPLD interrupt handler.

Okay; you'll likely want to use gpio*d*_to_irq(), as gpio_to_irq() is
part of the legacy GPIO infrastructure. It doesn't look like you need
GENERIC_IRQ_CHIP to access gpiod_to_irq(), the existing GPIOLIB
dependency should be enough.

If we did need configuration changes, my preference would be to put
them in a defconfig rather than in the arch Kconfig.

Cheers,

Andrew

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