From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [PATCH 09/13] drm/i915/cnl: Invert dvfs default level.
Date: Tue, 3 Oct 2017 00:06:10 -0700 [thread overview]
Message-ID: <20171003070614.18396-10-rodrigo.vivi@intel.com> (raw)
In-Reply-To: <20171003070614.18396-1-rodrigo.vivi@intel.com>
According to spec "If voltage is set too low,
it will break functionality. If voltage is set too high,
it will waste power."
So, let's prefer the waste of power instead of breaking
functionality.
But also the logic of deciding the level on spec
tells "Else, use level 2."
So, default is actually "2", not "0".
v2: Rebase moving it up to avoid some temporary code
duplication.
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/intel_cdclk.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
index af8411c2a6b9..7e9c4444c844 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -1562,15 +1562,15 @@ static void cnl_set_cdclk(struct drm_i915_private *dev_priv,
}
switch (cdclk) {
- case 528000:
- pcu_ack = 2;
+ case 168000:
+ pcu_ack = 0;
break;
case 336000:
pcu_ack = 1;
break;
- case 168000:
+ case 528000:
default:
- pcu_ack = 0;
+ pcu_ack = 2;
break;
}
--
2.13.5
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2017-10-03 7:06 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-03 7:06 [PATCH 00/13] DVFS v2 Rodrigo Vivi
2017-10-03 7:06 ` [PATCH 01/13] drm/i915: Let's use more enum intel_dpll_id pll_id Rodrigo Vivi
2017-10-03 9:33 ` Mika Kahola
2017-10-03 7:06 ` [PATCH 02/13] drm/i915/cnl: Extract cnl_calc_pll_link following bxt style Rodrigo Vivi
2017-10-03 10:00 ` Mika Kahola
2017-10-03 7:06 ` [PATCH 03/13] drm/i915/skl: Extract skl_calc_pll_link following bxt, cnl style Rodrigo Vivi
2017-10-03 13:18 ` Mika Kahola
2017-10-03 7:06 ` [PATCH 04/13] drm/i915: Unify and export gen9+ port_clock calculation Rodrigo Vivi
2017-10-04 6:39 ` Mika Kahola
2017-10-04 19:38 ` Rodrigo Vivi
2017-10-04 21:26 ` Rodrigo Vivi
2017-10-05 10:49 ` Mika Kahola
2017-10-03 7:06 ` [PATCH 05/13] drm/i915/cnl: extract cnl_dvfs_{pre, post}_change Rodrigo Vivi
2017-10-04 21:58 ` Ausmus, James
2017-10-04 22:05 ` Manasi Navare
2017-10-03 7:06 ` [PATCH 06/13] drm/i915/cnl: Expose DVFS change functions Rodrigo Vivi
2017-10-04 22:07 ` Manasi Navare
2017-10-03 7:06 ` [PATCH 07/13] drm/i915/cnl: DVFS for PLL enabling Rodrigo Vivi
2017-10-04 22:22 ` Manasi Navare
2017-10-17 15:44 ` Ville Syrjälä
2017-10-17 16:47 ` Rodrigo Vivi
2017-10-17 17:23 ` Ville Syrjälä
2017-10-17 17:45 ` Rodrigo Vivi
2017-10-17 18:02 ` Ville Syrjälä
2017-10-17 20:36 ` Ville Syrjälä
2017-10-17 23:23 ` Rodrigo Vivi
2017-10-18 13:23 ` Ville Syrjälä
2017-10-03 7:06 ` [PATCH 08/13] drm/i915/cnl: DVFS for PLL disabling Rodrigo Vivi
2017-10-04 22:23 ` Manasi Navare
2017-10-03 7:06 ` Rodrigo Vivi [this message]
2017-10-04 9:46 ` [PATCH 09/13] drm/i915/cnl: Invert dvfs default level Mika Kahola
2017-10-04 19:36 ` Rodrigo Vivi
2017-10-04 22:40 ` Manasi Navare
2017-10-04 23:03 ` Manasi Navare
2017-10-03 7:06 ` [PATCH 10/13] drm/i915/cnl: Unify dvfs level selection Rodrigo Vivi
2017-10-04 13:20 ` Mika Kahola
2017-10-05 14:59 ` Rodrigo Vivi
2017-10-18 18:22 ` Paulo Zanoni
2017-10-03 7:06 ` [PATCH 11/13] drm/i915/cnl: Only request voltage frequency switching when needed Rodrigo Vivi
2017-10-05 12:07 ` Mika Kahola
2017-10-05 15:00 ` Rodrigo Vivi
2017-10-03 7:06 ` [PATCH 12/13] drm/i915/cnl: When disabling pll put dvfs back to cdclk requirement Rodrigo Vivi
2017-10-03 7:06 ` [PATCH 13/13] drm/i915: Make DVFS more generic and document them Rodrigo Vivi
2017-10-03 7:42 ` ✓ Fi.CI.BAT: success for DVFS v2 Patchwork
2017-10-03 9:07 ` ✗ Fi.CI.IGT: warning " Patchwork
2017-10-03 19:51 ` ✓ Fi.CI.BAT: success " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20171003070614.18396-10-rodrigo.vivi@intel.com \
--to=rodrigo.vivi@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=paulo.r.zanoni@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.