From: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>,
Brian Norris
<computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Boris Brezillon
<boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Marek Vasut <marek.vasut-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Richard Weinberger <richard-/L3Ra7n9ekc@public.gmane.org>,
Cyrille Pitchen
<cyrille.pitchen-yU5RGvR974pGWvitb5QawA@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>,
Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>,
Gregory Clement
<gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Sebastian Hesselbarth
<sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Russell King <linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org>,
Daniel Mack <daniel-cYrQPVfZoowdnm+yROfE0A@public.gmane.org>,
Haojian Zhuang
<haojian.zhuang-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Robert Jarzmik <robert.jarzmik-GANU6spQydw@public.gmane.org>,
Eric Miao <eric.y.miao-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>
Cc: linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Thomas Petazzoni
<thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Antoine Tenart
<antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Nadav Haklai <nadavh-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
Miquel Raynal
<miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Ofer Heifetz <oferh-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
Hanna Hawa <hannah-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
Neta Zur Hershkovits
<neta-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
Willy Tarreau <w@1wt.eu>,
Sean Nyekjaer
<sean.nyekjaer-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
Subject: [PATCH v3 1/7] dt-bindings: mtd: document new nand-rb property
Date: Tue, 9 Jan 2018 11:36:31 +0100 [thread overview]
Message-ID: <20180109103637.23798-2-miquel.raynal@free-electrons.com> (raw)
In-Reply-To: <20180109103637.23798-1-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
There are already an atmel,rb and an allwinner,rb properties, let's not
make other ones and instead use a generic term: nand-rb to define NAND
chips Ready/Busy lines.
Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
Documentation/devicetree/bindings/mtd/nand.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mtd/nand.txt b/Documentation/devicetree/bindings/mtd/nand.txt
index 133f3813719c..8bb11d809429 100644
--- a/Documentation/devicetree/bindings/mtd/nand.txt
+++ b/Documentation/devicetree/bindings/mtd/nand.txt
@@ -43,6 +43,7 @@ Optional NAND chip properties:
This is particularly useful when only the in-band area is
used by the upper layers, and you want to make your NAND
as reliable as possible.
+- nand-rb: shall contain the native Ready/Busy ids.
The ECC strength and ECC step size properties define the correction capability
of a controller. Together, they say a controller can correct "{strength} bit
--
2.11.0
--
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WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@free-electrons.com>
To: David Woodhouse <dwmw2@infradead.org>,
Brian Norris <computersforpeace@gmail.com>,
Boris Brezillon <boris.brezillon@free-electrons.com>,
Marek Vasut <marek.vasut@gmail.com>,
Richard Weinberger <richard@nod.at>,
Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
Gregory Clement <gregory.clement@free-electrons.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
Russell King <linux@armlinux.org.uk>,
Daniel Mack <daniel@zonque.org>,
Haojian Zhuang <haojian.zhuang@gmail.com>,
Robert Jarzmik <robert.jarzmik@free.fr>,
Eric Miao <eric.y.miao@gmail.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Cc: linux-mtd@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
Antoine Tenart <antoine.tenart@free-electrons.com>,
Nadav Haklai <nadavh@marvell.com>,
Miquel Raynal <miquel.raynal@free-electrons.com>,
Ofer Heifetz <oferh@marvell.com>, Hanna Hawa <hannah@marvell.com>,
Neta Zur Hershkovits <neta@marvell.com>, Willy Tarreau <w@1wt.eu>,
Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Subject: [PATCH v3 1/7] dt-bindings: mtd: document new nand-rb property
Date: Tue, 9 Jan 2018 11:36:31 +0100 [thread overview]
Message-ID: <20180109103637.23798-2-miquel.raynal@free-electrons.com> (raw)
In-Reply-To: <20180109103637.23798-1-miquel.raynal@free-electrons.com>
There are already an atmel,rb and an allwinner,rb properties, let's not
make other ones and instead use a generic term: nand-rb to define NAND
chips Ready/Busy lines.
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
---
Documentation/devicetree/bindings/mtd/nand.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mtd/nand.txt b/Documentation/devicetree/bindings/mtd/nand.txt
index 133f3813719c..8bb11d809429 100644
--- a/Documentation/devicetree/bindings/mtd/nand.txt
+++ b/Documentation/devicetree/bindings/mtd/nand.txt
@@ -43,6 +43,7 @@ Optional NAND chip properties:
This is particularly useful when only the in-band area is
used by the upper layers, and you want to make your NAND
as reliable as possible.
+- nand-rb: shall contain the native Ready/Busy ids.
The ECC strength and ECC step size properties define the correction capability
of a controller. Together, they say a controller can correct "{strength} bit
--
2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: miquel.raynal@free-electrons.com (Miquel Raynal)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 1/7] dt-bindings: mtd: document new nand-rb property
Date: Tue, 9 Jan 2018 11:36:31 +0100 [thread overview]
Message-ID: <20180109103637.23798-2-miquel.raynal@free-electrons.com> (raw)
In-Reply-To: <20180109103637.23798-1-miquel.raynal@free-electrons.com>
There are already an atmel,rb and an allwinner,rb properties, let's not
make other ones and instead use a generic term: nand-rb to define NAND
chips Ready/Busy lines.
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
---
Documentation/devicetree/bindings/mtd/nand.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mtd/nand.txt b/Documentation/devicetree/bindings/mtd/nand.txt
index 133f3813719c..8bb11d809429 100644
--- a/Documentation/devicetree/bindings/mtd/nand.txt
+++ b/Documentation/devicetree/bindings/mtd/nand.txt
@@ -43,6 +43,7 @@ Optional NAND chip properties:
This is particularly useful when only the in-band area is
used by the upper layers, and you want to make your NAND
as reliable as possible.
+- nand-rb: shall contain the native Ready/Busy ids.
The ECC strength and ECC step size properties define the correction capability
of a controller. Together, they say a controller can correct "{strength} bit
--
2.11.0
next prev parent reply other threads:[~2018-01-09 10:36 UTC|newest]
Thread overview: 73+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-09 10:36 [PATCH v3 0/7] Marvell NAND controller rework with ->exec_op() Miquel Raynal
2018-01-09 10:36 ` Miquel Raynal
2018-01-09 10:36 ` Miquel Raynal
2018-01-11 22:28 ` Willy Tarreau
2018-01-11 22:28 ` Willy Tarreau
2018-01-11 22:28 ` Willy Tarreau
[not found] ` <20180111222833.GA15584-K+wRfnb2/UA@public.gmane.org>
2018-01-12 18:21 ` Miquel Raynal
2018-01-12 18:21 ` Miquel Raynal
2018-01-12 18:21 ` Miquel Raynal
[not found] ` <20180109103637.23798-1-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2018-01-09 10:36 ` Miquel Raynal [this message]
2018-01-09 10:36 ` [PATCH v3 1/7] dt-bindings: mtd: document new nand-rb property Miquel Raynal
2018-01-09 10:36 ` Miquel Raynal
[not found] ` <20180109103637.23798-2-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2018-01-11 22:23 ` Rob Herring
2018-01-11 22:23 ` Rob Herring
2018-01-11 22:23 ` Rob Herring
2018-01-09 10:36 ` [PATCH v3 2/7] dt-bindings: mtd: add Marvell NAND controller documentation Miquel Raynal
2018-01-09 10:36 ` Miquel Raynal
2018-01-09 10:36 ` Miquel Raynal
[not found] ` <20180109103637.23798-3-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2018-01-11 22:25 ` Rob Herring
2018-01-11 22:25 ` Rob Herring
2018-01-11 22:25 ` Rob Herring
2018-01-09 10:36 ` [PATCH v3 3/7] mtd: nand: add reworked Marvell NAND controller driver Miquel Raynal
2018-01-09 10:36 ` Miquel Raynal
2018-01-09 10:36 ` Miquel Raynal
2018-01-09 10:36 ` [PATCH v3 4/7] mtd: nand: use reworked NAND controller driver with Marvell EBU SoCs Miquel Raynal
2018-01-09 10:36 ` Miquel Raynal
2018-01-09 10:36 ` Miquel Raynal
2018-01-11 10:16 ` Gregory CLEMENT
2018-01-09 10:36 ` [PATCH v3 5/7] mtd: nand: use Marvell reworked NAND controller driver with all platforms Miquel Raynal
2018-01-09 10:36 ` Miquel Raynal
2018-01-09 10:36 ` Miquel Raynal
[not found] ` <20180109103637.23798-6-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2018-02-12 10:20 ` Boris Brezillon
2018-02-12 10:20 ` Boris Brezillon
2018-02-12 10:20 ` Boris Brezillon
2018-01-09 10:36 ` [PATCH v3 6/7] dt-bindings: mtd: remove pxa3xx NAND controller documentation Miquel Raynal
2018-01-09 10:36 ` Miquel Raynal
2018-01-09 10:36 ` Miquel Raynal
2018-01-09 10:36 ` [PATCH v3 7/7] mtd: nand: remove useless fields from pxa3xx NAND platform data Miquel Raynal
2018-01-09 10:36 ` Miquel Raynal
2018-01-09 10:36 ` Miquel Raynal
2018-02-12 10:17 ` Miquel Raynal
2018-02-17 9:43 ` Robert Jarzmik
2018-01-11 11:27 ` [PATCH v3 0/7] Marvell NAND controller rework with ->exec_op() Boris Brezillon
2018-01-11 11:27 ` Boris Brezillon
2018-01-11 11:27 ` Boris Brezillon
2018-01-11 17:42 ` Robert Jarzmik
2018-01-11 17:42 ` Robert Jarzmik
2018-01-11 17:42 ` Robert Jarzmik
[not found] ` <87efmwb8bj.fsf-4ty26DBLk+jEm7gnYqmdkQ@public.gmane.org>
2018-01-11 22:24 ` Miquel RAYNAL
2018-01-11 22:24 ` Miquel RAYNAL
2018-01-11 22:24 ` Miquel RAYNAL
2018-01-12 8:09 ` Robert Jarzmik
2018-01-12 8:09 ` Robert Jarzmik
2018-01-12 8:09 ` Robert Jarzmik
2018-01-12 8:45 ` Boris Brezillon
2018-01-12 9:01 ` Miquel Raynal
2018-01-12 9:34 ` Robert Jarzmik
2018-01-12 9:52 ` Boris Brezillon
2018-01-12 20:44 ` Robert Jarzmik
2018-01-13 8:38 ` Boris Brezillon
2018-01-13 11:05 ` Miquel Raynal
2018-01-14 10:35 ` Robert Jarzmik
2018-01-22 8:51 ` Boris Brezillon
2018-01-27 10:33 ` Robert Jarzmik
2018-01-29 10:36 ` Boris Brezillon
2018-01-12 10:21 ` Boris Brezillon
2018-01-12 16:43 ` Robert Jarzmik
2018-01-13 8:38 ` Boris Brezillon
2018-01-14 10:20 ` Robert Jarzmik
2018-01-22 8:54 ` Boris Brezillon
2018-01-12 15:55 ` Boris Brezillon
2018-01-12 15:55 ` Boris Brezillon
2018-01-12 15:55 ` Boris Brezillon
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