* [PATCH i-g-t] tests/perf_pmu: Verify engine busyness accuracy
@ 2018-02-15 11:53 ` Tvrtko Ursulin
0 siblings, 0 replies; 25+ messages in thread
From: Tvrtko Ursulin @ 2018-02-15 11:53 UTC (permalink / raw)
To: igt-dev; +Cc: Intel-gfx
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
A subtest to verify that the engine busyness is reported with expected
accuracy on platforms where the feature is available.
We test three patterns: 2%, 50% and 98% load per engine.
v2:
* Use spin batch instead of nop calibration.
* Various tweaks.
v3:
* Change loops to be time based.
* Use __igt_spin_batch_new inside timing sensitive loops.
* Fixed PWM sleep handling.
v4:
* Use restarting spin batch.
* Calibrate more carefully by looking at the real PWM loop.
v5:
* Made standalone.
* Better info messages.
* Tweak sleep compensation.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
tests/perf_pmu.c | 192 +++++++++++++++++++++++++++++++++++++++++++++++++------
1 file changed, 174 insertions(+), 18 deletions(-)
diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index a7501ca5f7a4..fa9b54793a52 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -35,6 +35,7 @@
#include <dirent.h>
#include <time.h>
#include <poll.h>
+#include <sched.h>
#include "igt.h"
#include "igt_core.h"
@@ -385,6 +386,22 @@ busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
gem_quiescent_gpu(gem_fd);
}
+static void
+__submit_spin_batch(int gem_fd, igt_spin_t *spin,
+ const struct intel_execution_engine2 *e)
+{
+ struct drm_i915_gem_exec_object2 obj = {
+ .handle = spin->handle
+ };
+ struct drm_i915_gem_execbuffer2 eb = {
+ .buffer_count = 1,
+ .buffers_ptr = to_user_pointer(&obj),
+ .flags = e2ring(gem_fd, e),
+ };
+
+ gem_execbuf(gem_fd, &eb);
+}
+
static void
most_busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
const unsigned int num_engines, unsigned int flags)
@@ -405,15 +422,7 @@ most_busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
if (e == e_) {
idle_idx = i;
} else if (spin) {
- struct drm_i915_gem_exec_object2 obj = {
- .handle = spin->handle
- };
- struct drm_i915_gem_execbuffer2 eb = {
- .buffer_count = 1,
- .buffers_ptr = to_user_pointer(&obj),
- .flags = e2ring(gem_fd, e_),
- };
- gem_execbuf(gem_fd, &eb);
+ __submit_spin_batch(gem_fd, spin, e_);
} else {
spin = igt_spin_batch_new(gem_fd, 0,
e2ring(gem_fd, e_), 0);
@@ -469,15 +478,7 @@ all_busy_check_all(int gem_fd, const unsigned int num_engines,
continue;
if (spin) {
- struct drm_i915_gem_exec_object2 obj = {
- .handle = spin->handle
- };
- struct drm_i915_gem_execbuffer2 eb = {
- .buffer_count = 1,
- .buffers_ptr = to_user_pointer(&obj),
- .flags = e2ring(gem_fd, e),
- };
- gem_execbuf(gem_fd, &eb);
+ __submit_spin_batch(gem_fd, spin, e);
} else {
spin = igt_spin_batch_new(gem_fd, 0,
e2ring(gem_fd, e), 0);
@@ -1390,6 +1391,150 @@ test_enable_race(int gem_fd, const struct intel_execution_engine2 *e)
gem_quiescent_gpu(gem_fd);
}
+static double __error(double val, double ref)
+{
+ igt_assert(ref != 0.0);
+ return (100.0 * val / ref) - 100.0;
+}
+
+static void __rearm_spin_batch(igt_spin_t *spin)
+{
+ const uint32_t mi_arb_chk = 0x5 << 23;
+
+ *spin->batch = mi_arb_chk;
+ __sync_synchronize();
+}
+
+#define div_round_up(a, b) (((a) + (b) - 1) / (b))
+
+static void
+accuracy(int gem_fd, const struct intel_execution_engine2 *e,
+ unsigned long target_busy_pct)
+{
+ const unsigned int min_test_loops = 7;
+ const unsigned long min_test_us = 1e6;
+ unsigned long busy_us = 2500;
+ unsigned long idle_us = 100 * (busy_us - target_busy_pct *
+ busy_us / 100) / target_busy_pct;
+ unsigned long pwm_calibration_us;
+ unsigned long test_us;
+ double busy_r;
+ uint64_t val[2];
+ uint64_t ts[2];
+ int fd;
+
+ /* Sampling platforms cannot reach the high accuracy criteria. */
+ igt_require(intel_gen(intel_get_drm_devid(gem_fd)) >= 8);
+
+ while (idle_us < 2500) {
+ busy_us *= 2;
+ idle_us *= 2;
+ }
+
+ pwm_calibration_us = min_test_loops * (busy_us + idle_us);
+ while (pwm_calibration_us < min_test_us)
+ pwm_calibration_us += busy_us + idle_us;
+ test_us = min_test_loops * (idle_us + busy_us);
+ while (test_us < min_test_us)
+ test_us += busy_us + idle_us;
+
+ igt_info("calibration=%luus, test=%luus; busy=%luus, idle=%luus\n",
+ pwm_calibration_us, test_us, busy_us, idle_us);
+
+ assert_within_epsilon((double)busy_us / (busy_us + idle_us),
+ (double)target_busy_pct / 100.0, tolerance);
+
+ /* Emit PWM pattern on the engine from a child. */
+ igt_fork(child, 1) {
+ struct sched_param rt = { .sched_priority = 99 };
+ const unsigned long timeout[] = { pwm_calibration_us * 1000,
+ test_us * 2 * 1000 };
+ unsigned long sleep_busy = busy_us;
+ unsigned long sleep_idle = idle_us;
+ igt_spin_t *spin;
+
+ /* We need the best sleep accuracy we can get. */
+ igt_require(sched_setscheduler(0,
+ SCHED_FIFO | SCHED_RESET_ON_FORK,
+ &rt) == 0);
+
+ /* Allocate our spin batch and idle it. */
+ spin = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0);
+ igt_spin_batch_end(spin);
+ gem_sync(gem_fd, spin->handle);
+
+ /* 1st pass is calibration, second pass is the test. */
+ for (int pass = 0; pass < ARRAY_SIZE(timeout); pass++) {
+ unsigned long busy_ns = 0, idle_ns = 0;
+ struct timespec test_start = { };
+ unsigned long loops = 0;
+ double err_busy, err_idle;
+
+ igt_nsec_elapsed(&test_start);
+ do {
+ struct timespec t_busy = { };
+
+ igt_nsec_elapsed(&t_busy);
+
+ /* Restart the spinbatch. */
+ __rearm_spin_batch(spin);
+ __submit_spin_batch(gem_fd, spin, e);
+ measured_usleep(sleep_busy);
+ igt_spin_batch_end(spin);
+ gem_sync(gem_fd, spin->handle);
+
+ busy_ns += igt_nsec_elapsed(&t_busy);
+
+ idle_ns += measured_usleep(sleep_idle);
+
+ loops++;
+ } while (igt_nsec_elapsed(&test_start) < timeout[pass]);
+
+ busy_ns = div_round_up(busy_ns, loops);
+ idle_ns = div_round_up(idle_ns, loops);
+
+ err_busy = __error(busy_ns / 1000, busy_us);
+ err_idle = __error(idle_ns / 1000, idle_us);
+
+ igt_info("%u: busy %lu/%lu %.2f%%, idle %lu/%lu %.2f%%\n",
+ pass,
+ busy_ns / 1000, busy_us, err_busy,
+ idle_ns / 1000, idle_us, err_idle);
+
+ if (pass == 0) {
+ sleep_busy = (double)busy_us -
+ (double)busy_us * err_busy / 100.0;
+ sleep_idle = (double)idle_us -
+ (double)idle_us * err_idle / 100.0;
+ igt_info("calibrated sleeps: busy=%lu, idle=%lu\n",
+ sleep_busy, sleep_idle);
+ }
+ }
+
+ igt_spin_batch_free(gem_fd, spin);
+ }
+
+ /* Let the child run. */
+ usleep(pwm_calibration_us * 2);
+
+ /* Collect engine busyness for an interesting part of child runtime. */
+ fd = open_pmu(I915_PMU_ENGINE_BUSY(e->class, e->instance));
+ val[0] = __pmu_read_single(fd, &ts[0]);
+ usleep(test_us / 2);
+ val[1] = __pmu_read_single(fd, &ts[1]);
+ close(fd);
+
+ igt_waitchildren();
+
+ busy_r = (double)(val[1] - val[0]) / (ts[1] - ts[0]);
+
+ igt_info("error=%.2f%% (%.2f%% vs %lu%%)\n",
+ __error(busy_r, target_busy_pct / 100.0),
+ busy_r * 100.0, target_busy_pct);
+
+ assert_within_epsilon(busy_r, (double)target_busy_pct / 100.0, 0.15);
+}
+
igt_main
{
const unsigned int num_other_metrics =
@@ -1418,6 +1563,8 @@ igt_main
invalid_init();
for_each_engine_class_instance(fd, e) {
+ const unsigned int pct[] = { 2, 50, 98 };
+
/**
* Test that a single engine metric can be initialized or it
* is correctly rejected.
@@ -1524,6 +1671,15 @@ igt_main
*/
igt_subtest_f("enable-race-%s", e->name)
test_enable_race(fd, e);
+
+ /**
+ * Check engine busyness accuracy is as expected.
+ */
+ for (i = 0; i < ARRAY_SIZE(pct); i++) {
+ igt_subtest_f("busy-accuracy-%u-%s",
+ pct[i], e->name)
+ accuracy(fd, e, pct[i]);
+ }
}
/**
--
2.14.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [igt-dev] [PATCH i-g-t] tests/perf_pmu: Verify engine busyness accuracy
@ 2018-02-15 11:53 ` Tvrtko Ursulin
0 siblings, 0 replies; 25+ messages in thread
From: Tvrtko Ursulin @ 2018-02-15 11:53 UTC (permalink / raw)
To: igt-dev; +Cc: Intel-gfx, Tvrtko Ursulin
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
A subtest to verify that the engine busyness is reported with expected
accuracy on platforms where the feature is available.
We test three patterns: 2%, 50% and 98% load per engine.
v2:
* Use spin batch instead of nop calibration.
* Various tweaks.
v3:
* Change loops to be time based.
* Use __igt_spin_batch_new inside timing sensitive loops.
* Fixed PWM sleep handling.
v4:
* Use restarting spin batch.
* Calibrate more carefully by looking at the real PWM loop.
v5:
* Made standalone.
* Better info messages.
* Tweak sleep compensation.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
tests/perf_pmu.c | 192 +++++++++++++++++++++++++++++++++++++++++++++++++------
1 file changed, 174 insertions(+), 18 deletions(-)
diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index a7501ca5f7a4..fa9b54793a52 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -35,6 +35,7 @@
#include <dirent.h>
#include <time.h>
#include <poll.h>
+#include <sched.h>
#include "igt.h"
#include "igt_core.h"
@@ -385,6 +386,22 @@ busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
gem_quiescent_gpu(gem_fd);
}
+static void
+__submit_spin_batch(int gem_fd, igt_spin_t *spin,
+ const struct intel_execution_engine2 *e)
+{
+ struct drm_i915_gem_exec_object2 obj = {
+ .handle = spin->handle
+ };
+ struct drm_i915_gem_execbuffer2 eb = {
+ .buffer_count = 1,
+ .buffers_ptr = to_user_pointer(&obj),
+ .flags = e2ring(gem_fd, e),
+ };
+
+ gem_execbuf(gem_fd, &eb);
+}
+
static void
most_busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
const unsigned int num_engines, unsigned int flags)
@@ -405,15 +422,7 @@ most_busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
if (e == e_) {
idle_idx = i;
} else if (spin) {
- struct drm_i915_gem_exec_object2 obj = {
- .handle = spin->handle
- };
- struct drm_i915_gem_execbuffer2 eb = {
- .buffer_count = 1,
- .buffers_ptr = to_user_pointer(&obj),
- .flags = e2ring(gem_fd, e_),
- };
- gem_execbuf(gem_fd, &eb);
+ __submit_spin_batch(gem_fd, spin, e_);
} else {
spin = igt_spin_batch_new(gem_fd, 0,
e2ring(gem_fd, e_), 0);
@@ -469,15 +478,7 @@ all_busy_check_all(int gem_fd, const unsigned int num_engines,
continue;
if (spin) {
- struct drm_i915_gem_exec_object2 obj = {
- .handle = spin->handle
- };
- struct drm_i915_gem_execbuffer2 eb = {
- .buffer_count = 1,
- .buffers_ptr = to_user_pointer(&obj),
- .flags = e2ring(gem_fd, e),
- };
- gem_execbuf(gem_fd, &eb);
+ __submit_spin_batch(gem_fd, spin, e);
} else {
spin = igt_spin_batch_new(gem_fd, 0,
e2ring(gem_fd, e), 0);
@@ -1390,6 +1391,150 @@ test_enable_race(int gem_fd, const struct intel_execution_engine2 *e)
gem_quiescent_gpu(gem_fd);
}
+static double __error(double val, double ref)
+{
+ igt_assert(ref != 0.0);
+ return (100.0 * val / ref) - 100.0;
+}
+
+static void __rearm_spin_batch(igt_spin_t *spin)
+{
+ const uint32_t mi_arb_chk = 0x5 << 23;
+
+ *spin->batch = mi_arb_chk;
+ __sync_synchronize();
+}
+
+#define div_round_up(a, b) (((a) + (b) - 1) / (b))
+
+static void
+accuracy(int gem_fd, const struct intel_execution_engine2 *e,
+ unsigned long target_busy_pct)
+{
+ const unsigned int min_test_loops = 7;
+ const unsigned long min_test_us = 1e6;
+ unsigned long busy_us = 2500;
+ unsigned long idle_us = 100 * (busy_us - target_busy_pct *
+ busy_us / 100) / target_busy_pct;
+ unsigned long pwm_calibration_us;
+ unsigned long test_us;
+ double busy_r;
+ uint64_t val[2];
+ uint64_t ts[2];
+ int fd;
+
+ /* Sampling platforms cannot reach the high accuracy criteria. */
+ igt_require(intel_gen(intel_get_drm_devid(gem_fd)) >= 8);
+
+ while (idle_us < 2500) {
+ busy_us *= 2;
+ idle_us *= 2;
+ }
+
+ pwm_calibration_us = min_test_loops * (busy_us + idle_us);
+ while (pwm_calibration_us < min_test_us)
+ pwm_calibration_us += busy_us + idle_us;
+ test_us = min_test_loops * (idle_us + busy_us);
+ while (test_us < min_test_us)
+ test_us += busy_us + idle_us;
+
+ igt_info("calibration=%luus, test=%luus; busy=%luus, idle=%luus\n",
+ pwm_calibration_us, test_us, busy_us, idle_us);
+
+ assert_within_epsilon((double)busy_us / (busy_us + idle_us),
+ (double)target_busy_pct / 100.0, tolerance);
+
+ /* Emit PWM pattern on the engine from a child. */
+ igt_fork(child, 1) {
+ struct sched_param rt = { .sched_priority = 99 };
+ const unsigned long timeout[] = { pwm_calibration_us * 1000,
+ test_us * 2 * 1000 };
+ unsigned long sleep_busy = busy_us;
+ unsigned long sleep_idle = idle_us;
+ igt_spin_t *spin;
+
+ /* We need the best sleep accuracy we can get. */
+ igt_require(sched_setscheduler(0,
+ SCHED_FIFO | SCHED_RESET_ON_FORK,
+ &rt) == 0);
+
+ /* Allocate our spin batch and idle it. */
+ spin = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0);
+ igt_spin_batch_end(spin);
+ gem_sync(gem_fd, spin->handle);
+
+ /* 1st pass is calibration, second pass is the test. */
+ for (int pass = 0; pass < ARRAY_SIZE(timeout); pass++) {
+ unsigned long busy_ns = 0, idle_ns = 0;
+ struct timespec test_start = { };
+ unsigned long loops = 0;
+ double err_busy, err_idle;
+
+ igt_nsec_elapsed(&test_start);
+ do {
+ struct timespec t_busy = { };
+
+ igt_nsec_elapsed(&t_busy);
+
+ /* Restart the spinbatch. */
+ __rearm_spin_batch(spin);
+ __submit_spin_batch(gem_fd, spin, e);
+ measured_usleep(sleep_busy);
+ igt_spin_batch_end(spin);
+ gem_sync(gem_fd, spin->handle);
+
+ busy_ns += igt_nsec_elapsed(&t_busy);
+
+ idle_ns += measured_usleep(sleep_idle);
+
+ loops++;
+ } while (igt_nsec_elapsed(&test_start) < timeout[pass]);
+
+ busy_ns = div_round_up(busy_ns, loops);
+ idle_ns = div_round_up(idle_ns, loops);
+
+ err_busy = __error(busy_ns / 1000, busy_us);
+ err_idle = __error(idle_ns / 1000, idle_us);
+
+ igt_info("%u: busy %lu/%lu %.2f%%, idle %lu/%lu %.2f%%\n",
+ pass,
+ busy_ns / 1000, busy_us, err_busy,
+ idle_ns / 1000, idle_us, err_idle);
+
+ if (pass == 0) {
+ sleep_busy = (double)busy_us -
+ (double)busy_us * err_busy / 100.0;
+ sleep_idle = (double)idle_us -
+ (double)idle_us * err_idle / 100.0;
+ igt_info("calibrated sleeps: busy=%lu, idle=%lu\n",
+ sleep_busy, sleep_idle);
+ }
+ }
+
+ igt_spin_batch_free(gem_fd, spin);
+ }
+
+ /* Let the child run. */
+ usleep(pwm_calibration_us * 2);
+
+ /* Collect engine busyness for an interesting part of child runtime. */
+ fd = open_pmu(I915_PMU_ENGINE_BUSY(e->class, e->instance));
+ val[0] = __pmu_read_single(fd, &ts[0]);
+ usleep(test_us / 2);
+ val[1] = __pmu_read_single(fd, &ts[1]);
+ close(fd);
+
+ igt_waitchildren();
+
+ busy_r = (double)(val[1] - val[0]) / (ts[1] - ts[0]);
+
+ igt_info("error=%.2f%% (%.2f%% vs %lu%%)\n",
+ __error(busy_r, target_busy_pct / 100.0),
+ busy_r * 100.0, target_busy_pct);
+
+ assert_within_epsilon(busy_r, (double)target_busy_pct / 100.0, 0.15);
+}
+
igt_main
{
const unsigned int num_other_metrics =
@@ -1418,6 +1563,8 @@ igt_main
invalid_init();
for_each_engine_class_instance(fd, e) {
+ const unsigned int pct[] = { 2, 50, 98 };
+
/**
* Test that a single engine metric can be initialized or it
* is correctly rejected.
@@ -1524,6 +1671,15 @@ igt_main
*/
igt_subtest_f("enable-race-%s", e->name)
test_enable_race(fd, e);
+
+ /**
+ * Check engine busyness accuracy is as expected.
+ */
+ for (i = 0; i < ARRAY_SIZE(pct); i++) {
+ igt_subtest_f("busy-accuracy-%u-%s",
+ pct[i], e->name)
+ accuracy(fd, e, pct[i]);
+ }
}
/**
--
2.14.1
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 25+ messages in thread
* Re: [PATCH i-g-t] tests/perf_pmu: Verify engine busyness accuracy
2018-02-15 11:53 ` [igt-dev] " Tvrtko Ursulin
@ 2018-02-15 12:43 ` Chris Wilson
-1 siblings, 0 replies; 25+ messages in thread
From: Chris Wilson @ 2018-02-15 12:43 UTC (permalink / raw)
To: Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
Quoting Tvrtko Ursulin (2018-02-15 11:53:44)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> A subtest to verify that the engine busyness is reported with expected
> accuracy on platforms where the feature is available.
>
> We test three patterns: 2%, 50% and 98% load per engine.
>
> v2:
> * Use spin batch instead of nop calibration.
> * Various tweaks.
>
> v3:
> * Change loops to be time based.
> * Use __igt_spin_batch_new inside timing sensitive loops.
> * Fixed PWM sleep handling.
>
> v4:
> * Use restarting spin batch.
> * Calibrate more carefully by looking at the real PWM loop.
>
> v5:
> * Made standalone.
> * Better info messages.
> * Tweak sleep compensation.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> tests/perf_pmu.c | 192 +++++++++++++++++++++++++++++++++++++++++++++++++------
> 1 file changed, 174 insertions(+), 18 deletions(-)
>
> diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
> index a7501ca5f7a4..fa9b54793a52 100644
> --- a/tests/perf_pmu.c
> +++ b/tests/perf_pmu.c
> @@ -35,6 +35,7 @@
> #include <dirent.h>
> #include <time.h>
> #include <poll.h>
> +#include <sched.h>
>
> #include "igt.h"
> #include "igt_core.h"
> @@ -385,6 +386,22 @@ busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
> gem_quiescent_gpu(gem_fd);
> }
>
> +static void
> +__submit_spin_batch(int gem_fd, igt_spin_t *spin,
> + const struct intel_execution_engine2 *e)
> +{
> + struct drm_i915_gem_exec_object2 obj = {
> + .handle = spin->handle
> + };
> + struct drm_i915_gem_execbuffer2 eb = {
> + .buffer_count = 1,
> + .buffers_ptr = to_user_pointer(&obj),
> + .flags = e2ring(gem_fd, e),
> + };
> +
> + gem_execbuf(gem_fd, &eb);
> +}
> +
> static void
> most_busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
> const unsigned int num_engines, unsigned int flags)
> @@ -405,15 +422,7 @@ most_busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
> if (e == e_) {
> idle_idx = i;
> } else if (spin) {
> - struct drm_i915_gem_exec_object2 obj = {
> - .handle = spin->handle
> - };
> - struct drm_i915_gem_execbuffer2 eb = {
> - .buffer_count = 1,
> - .buffers_ptr = to_user_pointer(&obj),
> - .flags = e2ring(gem_fd, e_),
> - };
> - gem_execbuf(gem_fd, &eb);
> + __submit_spin_batch(gem_fd, spin, e_);
> } else {
> spin = igt_spin_batch_new(gem_fd, 0,
> e2ring(gem_fd, e_), 0);
> @@ -469,15 +478,7 @@ all_busy_check_all(int gem_fd, const unsigned int num_engines,
> continue;
>
> if (spin) {
> - struct drm_i915_gem_exec_object2 obj = {
> - .handle = spin->handle
> - };
> - struct drm_i915_gem_execbuffer2 eb = {
> - .buffer_count = 1,
> - .buffers_ptr = to_user_pointer(&obj),
> - .flags = e2ring(gem_fd, e),
> - };
> - gem_execbuf(gem_fd, &eb);
> + __submit_spin_batch(gem_fd, spin, e);
> } else {
> spin = igt_spin_batch_new(gem_fd, 0,
> e2ring(gem_fd, e), 0);
> @@ -1390,6 +1391,150 @@ test_enable_race(int gem_fd, const struct intel_execution_engine2 *e)
> gem_quiescent_gpu(gem_fd);
> }
>
> +static double __error(double val, double ref)
> +{
> + igt_assert(ref != 0.0);
igt_assert(ref > 1e-5 /* smallval */) ?
Pretty sure a negative ref is also cause for confusion :)
> + return (100.0 * val / ref) - 100.0;
> +}
> +
> +static void __rearm_spin_batch(igt_spin_t *spin)
> +{
> + const uint32_t mi_arb_chk = 0x5 << 23;
> +
> + *spin->batch = mi_arb_chk;
> + __sync_synchronize();
> +}
> +
> +#define div_round_up(a, b) (((a) + (b) - 1) / (b))
> +
> +static void
> +accuracy(int gem_fd, const struct intel_execution_engine2 *e,
> + unsigned long target_busy_pct)
> +{
> + const unsigned int min_test_loops = 7;
> + const unsigned long min_test_us = 1e6;
> + unsigned long busy_us = 2500;
> + unsigned long idle_us = 100 * (busy_us - target_busy_pct *
> + busy_us / 100) / target_busy_pct;
> + unsigned long pwm_calibration_us;
> + unsigned long test_us;
> + double busy_r;
> + uint64_t val[2];
> + uint64_t ts[2];
> + int fd;
> +
> + /* Sampling platforms cannot reach the high accuracy criteria. */
> + igt_require(intel_gen(intel_get_drm_devid(gem_fd)) >= 8);
igt_require(gem_has_execlists(gem_fd));
> +
> + while (idle_us < 2500) {
> + busy_us *= 2;
> + idle_us *= 2;
> + }
> +
> + pwm_calibration_us = min_test_loops * (busy_us + idle_us);
> + while (pwm_calibration_us < min_test_us)
> + pwm_calibration_us += busy_us + idle_us;
> + test_us = min_test_loops * (idle_us + busy_us);
> + while (test_us < min_test_us)
> + test_us += busy_us + idle_us;
> +
> + igt_info("calibration=%luus, test=%luus; busy=%luus, idle=%luus\n",
> + pwm_calibration_us, test_us, busy_us, idle_us);
Would also be nice to show the adjusted %%.
> + assert_within_epsilon((double)busy_us / (busy_us + idle_us),
> + (double)target_busy_pct / 100.0, tolerance);
> +
> + /* Emit PWM pattern on the engine from a child. */
> + igt_fork(child, 1) {
> + struct sched_param rt = { .sched_priority = 99 };
> + const unsigned long timeout[] = { pwm_calibration_us * 1000,
> + test_us * 2 * 1000 };
> + unsigned long sleep_busy = busy_us;
> + unsigned long sleep_idle = idle_us;
> + igt_spin_t *spin;
> +
> + /* We need the best sleep accuracy we can get. */
> + igt_require(sched_setscheduler(0,
> + SCHED_FIFO | SCHED_RESET_ON_FORK,
> + &rt) == 0);
Can't use igt_require() or igt_assert() from children. So just igt_warn
if not applied.
Just SCHED_FIFO is enough as the child doesn't/shouldn't fork.
> +
> + /* Allocate our spin batch and idle it. */
> + spin = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0);
> + igt_spin_batch_end(spin);
> + gem_sync(gem_fd, spin->handle);
> +
> + /* 1st pass is calibration, second pass is the test. */
> + for (int pass = 0; pass < ARRAY_SIZE(timeout); pass++) {
> + unsigned long busy_ns = 0, idle_ns = 0;
> + struct timespec test_start = { };
> + unsigned long loops = 0;
> + double err_busy, err_idle;
> +
> + igt_nsec_elapsed(&test_start);
> + do {
> + struct timespec t_busy = { };
> +
> + igt_nsec_elapsed(&t_busy);
> +
> + /* Restart the spinbatch. */
> + __rearm_spin_batch(spin);
> + __submit_spin_batch(gem_fd, spin, e);
> + measured_usleep(sleep_busy);
> + igt_spin_batch_end(spin);
> + gem_sync(gem_fd, spin->handle);
> +
> + busy_ns += igt_nsec_elapsed(&t_busy);
> +
> + idle_ns += measured_usleep(sleep_idle);
> +
> + loops++;
> + } while (igt_nsec_elapsed(&test_start) < timeout[pass]);
> +
> + busy_ns = div_round_up(busy_ns, loops);
> + idle_ns = div_round_up(idle_ns, loops);
> +
> + err_busy = __error(busy_ns / 1000, busy_us);
> + err_idle = __error(idle_ns / 1000, idle_us);
> +
> + igt_info("%u: busy %lu/%lu %.2f%%, idle %lu/%lu %.2f%%\n",
> + pass,
> + busy_ns / 1000, busy_us, err_busy,
> + idle_ns / 1000, idle_us, err_idle);
Ok, makes sense.
> +
> + if (pass == 0) {
> + sleep_busy = (double)busy_us -
> + (double)busy_us * err_busy / 100.0;
> + sleep_idle = (double)idle_us -
> + (double)idle_us * err_idle / 100.0;
> + igt_info("calibrated sleeps: busy=%lu, idle=%lu\n",
> + sleep_busy, sleep_idle);
> + }
> + }
> +
> + igt_spin_batch_free(gem_fd, spin);
> + }
> +
> + /* Let the child run. */
> + usleep(pwm_calibration_us * 2);
> +
> + /* Collect engine busyness for an interesting part of child runtime. */
> + fd = open_pmu(I915_PMU_ENGINE_BUSY(e->class, e->instance));
> + val[0] = __pmu_read_single(fd, &ts[0]);
> + usleep(test_us / 2);
> + val[1] = __pmu_read_single(fd, &ts[1]);
> + close(fd);
> +
> + igt_waitchildren();
> +
> + busy_r = (double)(val[1] - val[0]) / (ts[1] - ts[0]);
> +
> + igt_info("error=%.2f%% (%.2f%% vs %lu%%)\n",
> + __error(busy_r, target_busy_pct / 100.0),
> + busy_r * 100.0, target_busy_pct);
> +
> + assert_within_epsilon(busy_r, (double)target_busy_pct / 100.0, 0.15);
> +}
A fine compromise! :)
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [Intel-gfx] [PATCH i-g-t] tests/perf_pmu: Verify engine busyness accuracy
@ 2018-02-15 12:43 ` Chris Wilson
0 siblings, 0 replies; 25+ messages in thread
From: Chris Wilson @ 2018-02-15 12:43 UTC (permalink / raw)
To: Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
Quoting Tvrtko Ursulin (2018-02-15 11:53:44)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> A subtest to verify that the engine busyness is reported with expected
> accuracy on platforms where the feature is available.
>
> We test three patterns: 2%, 50% and 98% load per engine.
>
> v2:
> * Use spin batch instead of nop calibration.
> * Various tweaks.
>
> v3:
> * Change loops to be time based.
> * Use __igt_spin_batch_new inside timing sensitive loops.
> * Fixed PWM sleep handling.
>
> v4:
> * Use restarting spin batch.
> * Calibrate more carefully by looking at the real PWM loop.
>
> v5:
> * Made standalone.
> * Better info messages.
> * Tweak sleep compensation.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> tests/perf_pmu.c | 192 +++++++++++++++++++++++++++++++++++++++++++++++++------
> 1 file changed, 174 insertions(+), 18 deletions(-)
>
> diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
> index a7501ca5f7a4..fa9b54793a52 100644
> --- a/tests/perf_pmu.c
> +++ b/tests/perf_pmu.c
> @@ -35,6 +35,7 @@
> #include <dirent.h>
> #include <time.h>
> #include <poll.h>
> +#include <sched.h>
>
> #include "igt.h"
> #include "igt_core.h"
> @@ -385,6 +386,22 @@ busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
> gem_quiescent_gpu(gem_fd);
> }
>
> +static void
> +__submit_spin_batch(int gem_fd, igt_spin_t *spin,
> + const struct intel_execution_engine2 *e)
> +{
> + struct drm_i915_gem_exec_object2 obj = {
> + .handle = spin->handle
> + };
> + struct drm_i915_gem_execbuffer2 eb = {
> + .buffer_count = 1,
> + .buffers_ptr = to_user_pointer(&obj),
> + .flags = e2ring(gem_fd, e),
> + };
> +
> + gem_execbuf(gem_fd, &eb);
> +}
> +
> static void
> most_busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
> const unsigned int num_engines, unsigned int flags)
> @@ -405,15 +422,7 @@ most_busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
> if (e == e_) {
> idle_idx = i;
> } else if (spin) {
> - struct drm_i915_gem_exec_object2 obj = {
> - .handle = spin->handle
> - };
> - struct drm_i915_gem_execbuffer2 eb = {
> - .buffer_count = 1,
> - .buffers_ptr = to_user_pointer(&obj),
> - .flags = e2ring(gem_fd, e_),
> - };
> - gem_execbuf(gem_fd, &eb);
> + __submit_spin_batch(gem_fd, spin, e_);
> } else {
> spin = igt_spin_batch_new(gem_fd, 0,
> e2ring(gem_fd, e_), 0);
> @@ -469,15 +478,7 @@ all_busy_check_all(int gem_fd, const unsigned int num_engines,
> continue;
>
> if (spin) {
> - struct drm_i915_gem_exec_object2 obj = {
> - .handle = spin->handle
> - };
> - struct drm_i915_gem_execbuffer2 eb = {
> - .buffer_count = 1,
> - .buffers_ptr = to_user_pointer(&obj),
> - .flags = e2ring(gem_fd, e),
> - };
> - gem_execbuf(gem_fd, &eb);
> + __submit_spin_batch(gem_fd, spin, e);
> } else {
> spin = igt_spin_batch_new(gem_fd, 0,
> e2ring(gem_fd, e), 0);
> @@ -1390,6 +1391,150 @@ test_enable_race(int gem_fd, const struct intel_execution_engine2 *e)
> gem_quiescent_gpu(gem_fd);
> }
>
> +static double __error(double val, double ref)
> +{
> + igt_assert(ref != 0.0);
igt_assert(ref > 1e-5 /* smallval */) ?
Pretty sure a negative ref is also cause for confusion :)
> + return (100.0 * val / ref) - 100.0;
> +}
> +
> +static void __rearm_spin_batch(igt_spin_t *spin)
> +{
> + const uint32_t mi_arb_chk = 0x5 << 23;
> +
> + *spin->batch = mi_arb_chk;
> + __sync_synchronize();
> +}
> +
> +#define div_round_up(a, b) (((a) + (b) - 1) / (b))
> +
> +static void
> +accuracy(int gem_fd, const struct intel_execution_engine2 *e,
> + unsigned long target_busy_pct)
> +{
> + const unsigned int min_test_loops = 7;
> + const unsigned long min_test_us = 1e6;
> + unsigned long busy_us = 2500;
> + unsigned long idle_us = 100 * (busy_us - target_busy_pct *
> + busy_us / 100) / target_busy_pct;
> + unsigned long pwm_calibration_us;
> + unsigned long test_us;
> + double busy_r;
> + uint64_t val[2];
> + uint64_t ts[2];
> + int fd;
> +
> + /* Sampling platforms cannot reach the high accuracy criteria. */
> + igt_require(intel_gen(intel_get_drm_devid(gem_fd)) >= 8);
igt_require(gem_has_execlists(gem_fd));
> +
> + while (idle_us < 2500) {
> + busy_us *= 2;
> + idle_us *= 2;
> + }
> +
> + pwm_calibration_us = min_test_loops * (busy_us + idle_us);
> + while (pwm_calibration_us < min_test_us)
> + pwm_calibration_us += busy_us + idle_us;
> + test_us = min_test_loops * (idle_us + busy_us);
> + while (test_us < min_test_us)
> + test_us += busy_us + idle_us;
> +
> + igt_info("calibration=%luus, test=%luus; busy=%luus, idle=%luus\n",
> + pwm_calibration_us, test_us, busy_us, idle_us);
Would also be nice to show the adjusted %%.
> + assert_within_epsilon((double)busy_us / (busy_us + idle_us),
> + (double)target_busy_pct / 100.0, tolerance);
> +
> + /* Emit PWM pattern on the engine from a child. */
> + igt_fork(child, 1) {
> + struct sched_param rt = { .sched_priority = 99 };
> + const unsigned long timeout[] = { pwm_calibration_us * 1000,
> + test_us * 2 * 1000 };
> + unsigned long sleep_busy = busy_us;
> + unsigned long sleep_idle = idle_us;
> + igt_spin_t *spin;
> +
> + /* We need the best sleep accuracy we can get. */
> + igt_require(sched_setscheduler(0,
> + SCHED_FIFO | SCHED_RESET_ON_FORK,
> + &rt) == 0);
Can't use igt_require() or igt_assert() from children. So just igt_warn
if not applied.
Just SCHED_FIFO is enough as the child doesn't/shouldn't fork.
> +
> + /* Allocate our spin batch and idle it. */
> + spin = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0);
> + igt_spin_batch_end(spin);
> + gem_sync(gem_fd, spin->handle);
> +
> + /* 1st pass is calibration, second pass is the test. */
> + for (int pass = 0; pass < ARRAY_SIZE(timeout); pass++) {
> + unsigned long busy_ns = 0, idle_ns = 0;
> + struct timespec test_start = { };
> + unsigned long loops = 0;
> + double err_busy, err_idle;
> +
> + igt_nsec_elapsed(&test_start);
> + do {
> + struct timespec t_busy = { };
> +
> + igt_nsec_elapsed(&t_busy);
> +
> + /* Restart the spinbatch. */
> + __rearm_spin_batch(spin);
> + __submit_spin_batch(gem_fd, spin, e);
> + measured_usleep(sleep_busy);
> + igt_spin_batch_end(spin);
> + gem_sync(gem_fd, spin->handle);
> +
> + busy_ns += igt_nsec_elapsed(&t_busy);
> +
> + idle_ns += measured_usleep(sleep_idle);
> +
> + loops++;
> + } while (igt_nsec_elapsed(&test_start) < timeout[pass]);
> +
> + busy_ns = div_round_up(busy_ns, loops);
> + idle_ns = div_round_up(idle_ns, loops);
> +
> + err_busy = __error(busy_ns / 1000, busy_us);
> + err_idle = __error(idle_ns / 1000, idle_us);
> +
> + igt_info("%u: busy %lu/%lu %.2f%%, idle %lu/%lu %.2f%%\n",
> + pass,
> + busy_ns / 1000, busy_us, err_busy,
> + idle_ns / 1000, idle_us, err_idle);
Ok, makes sense.
> +
> + if (pass == 0) {
> + sleep_busy = (double)busy_us -
> + (double)busy_us * err_busy / 100.0;
> + sleep_idle = (double)idle_us -
> + (double)idle_us * err_idle / 100.0;
> + igt_info("calibrated sleeps: busy=%lu, idle=%lu\n",
> + sleep_busy, sleep_idle);
> + }
> + }
> +
> + igt_spin_batch_free(gem_fd, spin);
> + }
> +
> + /* Let the child run. */
> + usleep(pwm_calibration_us * 2);
> +
> + /* Collect engine busyness for an interesting part of child runtime. */
> + fd = open_pmu(I915_PMU_ENGINE_BUSY(e->class, e->instance));
> + val[0] = __pmu_read_single(fd, &ts[0]);
> + usleep(test_us / 2);
> + val[1] = __pmu_read_single(fd, &ts[1]);
> + close(fd);
> +
> + igt_waitchildren();
> +
> + busy_r = (double)(val[1] - val[0]) / (ts[1] - ts[0]);
> +
> + igt_info("error=%.2f%% (%.2f%% vs %lu%%)\n",
> + __error(busy_r, target_busy_pct / 100.0),
> + busy_r * 100.0, target_busy_pct);
> +
> + assert_within_epsilon(busy_r, (double)target_busy_pct / 100.0, 0.15);
> +}
A fine compromise! :)
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* [igt-dev] ✗ Fi.CI.BAT: failure for tests/perf_pmu: Verify engine busyness accuracy (rev2)
2018-02-15 11:53 ` [igt-dev] " Tvrtko Ursulin
(?)
(?)
@ 2018-02-15 15:07 ` Patchwork
-1 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2018-02-15 15:07 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: igt-dev
== Series Details ==
Series: tests/perf_pmu: Verify engine busyness accuracy (rev2)
URL : https://patchwork.freedesktop.org/series/37359/
State : failure
== Summary ==
IGT patchset tested on top of latest successful build
f2ac5601be25c683e89f7b6ee704c1b1b9eb1b30 tests/perf_pmu: Log perf timestamp in semaphore wait tests
with latest DRM-Tip kernel build CI_DRM_3778
47dbb4971216 drm-tip: 2018y-02m-15d-13h-53m-14s UTC integration manifest
Testlist changes:
+igt@perf_pmu@busy-accuracy-2-bcs0
+igt@perf_pmu@busy-accuracy-2-rcs0
+igt@perf_pmu@busy-accuracy-2-vcs0
+igt@perf_pmu@busy-accuracy-2-vcs1
+igt@perf_pmu@busy-accuracy-2-vecs0
+igt@perf_pmu@busy-accuracy-50-bcs0
+igt@perf_pmu@busy-accuracy-50-rcs0
+igt@perf_pmu@busy-accuracy-50-vcs0
+igt@perf_pmu@busy-accuracy-50-vcs1
+igt@perf_pmu@busy-accuracy-50-vecs0
+igt@perf_pmu@busy-accuracy-98-bcs0
+igt@perf_pmu@busy-accuracy-98-rcs0
+igt@perf_pmu@busy-accuracy-98-vcs0
+igt@perf_pmu@busy-accuracy-98-vcs1
+igt@perf_pmu@busy-accuracy-98-vecs0
Test gem_mmap_gtt:
Subgroup basic-small-bo-tiledx:
pass -> FAIL (fi-gdg-551) fdo#102575
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
incomplete -> PASS (fi-hsw-4770) fdo#103375
Subgroup suspend-read-crc-pipe-c:
pass -> INCOMPLETE (fi-bxt-dsi)
fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375
fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:426s
fi-bdw-gvtdvm total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:427s
fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:375s
fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:492s
fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:290s
fi-bxt-dsi total:246 pass:219 dwarn:0 dfail:0 fail:0 skip:26
fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:487s
fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:474s
fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:459s
fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:571s
fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:417s
fi-gdg-551 total:288 pass:179 dwarn:0 dfail:0 fail:1 skip:108 time:286s
fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:511s
fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:392s
fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:414s
fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:464s
fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:457s
fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:496s
fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:458s
fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:507s
fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:586s
fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:430s
fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:510s
fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:526s
fi-skl-6700k2 total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:496s
fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:478s
fi-skl-guc total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:415s
fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:432s
fi-snb-2520m total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:528s
fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:399s
Blacklisted hosts:
fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:469s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_925/issues.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH i-g-t v6] tests/perf_pmu: Verify engine busyness accuracy
2018-02-15 12:43 ` [Intel-gfx] " Chris Wilson
@ 2018-02-15 15:34 ` Tvrtko Ursulin
-1 siblings, 0 replies; 25+ messages in thread
From: Tvrtko Ursulin @ 2018-02-15 15:34 UTC (permalink / raw)
To: igt-dev; +Cc: Intel-gfx
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
A subtest to verify that the engine busyness is reported with expected
accuracy on platforms where the feature is available.
We test three patterns: 2%, 50% and 98% load per engine.
v2:
* Use spin batch instead of nop calibration.
* Various tweaks.
v3:
* Change loops to be time based.
* Use __igt_spin_batch_new inside timing sensitive loops.
* Fixed PWM sleep handling.
v4:
* Use restarting spin batch.
* Calibrate more carefully by looking at the real PWM loop.
v5:
* Made standalone.
* Better info messages.
* Tweak sleep compensation.
v6:
* Some final tweaks. (Chris Wilson)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
tests/perf_pmu.c | 199 ++++++++++++++++++++++++++++++++++++++++++++++++++-----
1 file changed, 181 insertions(+), 18 deletions(-)
diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index 7d9c42d16a08..82053416cbea 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -35,6 +35,7 @@
#include <dirent.h>
#include <time.h>
#include <poll.h>
+#include <sched.h>
#include "igt.h"
#include "igt_core.h"
@@ -385,6 +386,22 @@ busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
gem_quiescent_gpu(gem_fd);
}
+static void
+__submit_spin_batch(int gem_fd, igt_spin_t *spin,
+ const struct intel_execution_engine2 *e)
+{
+ struct drm_i915_gem_exec_object2 obj = {
+ .handle = spin->handle
+ };
+ struct drm_i915_gem_execbuffer2 eb = {
+ .buffer_count = 1,
+ .buffers_ptr = to_user_pointer(&obj),
+ .flags = e2ring(gem_fd, e),
+ };
+
+ gem_execbuf(gem_fd, &eb);
+}
+
static void
most_busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
const unsigned int num_engines, unsigned int flags)
@@ -405,15 +422,7 @@ most_busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
if (e == e_) {
idle_idx = i;
} else if (spin) {
- struct drm_i915_gem_exec_object2 obj = {
- .handle = spin->handle
- };
- struct drm_i915_gem_execbuffer2 eb = {
- .buffer_count = 1,
- .buffers_ptr = to_user_pointer(&obj),
- .flags = e2ring(gem_fd, e_),
- };
- gem_execbuf(gem_fd, &eb);
+ __submit_spin_batch(gem_fd, spin, e_);
} else {
spin = igt_spin_batch_new(gem_fd, 0,
e2ring(gem_fd, e_), 0);
@@ -469,15 +478,7 @@ all_busy_check_all(int gem_fd, const unsigned int num_engines,
continue;
if (spin) {
- struct drm_i915_gem_exec_object2 obj = {
- .handle = spin->handle
- };
- struct drm_i915_gem_execbuffer2 eb = {
- .buffer_count = 1,
- .buffers_ptr = to_user_pointer(&obj),
- .flags = e2ring(gem_fd, e),
- };
- gem_execbuf(gem_fd, &eb);
+ __submit_spin_batch(gem_fd, spin, e);
} else {
spin = igt_spin_batch_new(gem_fd, 0,
e2ring(gem_fd, e), 0);
@@ -1392,6 +1393,157 @@ test_enable_race(int gem_fd, const struct intel_execution_engine2 *e)
gem_quiescent_gpu(gem_fd);
}
+static double __error(double val, double ref)
+{
+ igt_assert(ref > 1e-5 /* smallval */);
+ return (100.0 * val / ref) - 100.0;
+}
+
+static void __rearm_spin_batch(igt_spin_t *spin)
+{
+ const uint32_t mi_arb_chk = 0x5 << 23;
+
+ *spin->batch = mi_arb_chk;
+ __sync_synchronize();
+}
+
+#define div_round_up(a, b) (((a) + (b) - 1) / (b))
+
+static void
+accuracy(int gem_fd, const struct intel_execution_engine2 *e,
+ unsigned long target_busy_pct)
+{
+ const unsigned int min_test_loops = 7;
+ const unsigned long min_test_us = 1e6;
+ unsigned long busy_us = 2500;
+ unsigned long idle_us = 100 * (busy_us - target_busy_pct *
+ busy_us / 100) / target_busy_pct;
+ unsigned long pwm_calibration_us;
+ unsigned long test_us;
+ double busy_r;
+ uint64_t val[2];
+ uint64_t ts[2];
+ int fd;
+
+ /* Sampling platforms cannot reach the high accuracy criteria. */
+ igt_require(gem_has_execlists(gem_fd));
+
+ while (idle_us < 2500) {
+ busy_us *= 2;
+ idle_us *= 2;
+ }
+
+ pwm_calibration_us = min_test_loops * (busy_us + idle_us);
+ while (pwm_calibration_us < min_test_us)
+ pwm_calibration_us += busy_us + idle_us;
+ test_us = min_test_loops * (idle_us + busy_us);
+ while (test_us < min_test_us)
+ test_us += busy_us + idle_us;
+
+ igt_info("calibration=%luus, test=%luus; ratio=%.2f%% (%luus/%luus)\n",
+ pwm_calibration_us, test_us,
+ (double)busy_us / (busy_us + idle_us) * 100.0,
+ busy_us, idle_us);
+
+ assert_within_epsilon((double)busy_us / (busy_us + idle_us),
+ (double)target_busy_pct / 100.0, tolerance);
+
+ /* Emit PWM pattern on the engine from a child. */
+ igt_fork(child, 1) {
+ struct sched_param rt = { .sched_priority = 99 };
+ const unsigned long timeout[] = { pwm_calibration_us * 1000,
+ test_us * 2 * 1000 };
+ unsigned long sleep_busy = busy_us;
+ unsigned long sleep_idle = idle_us;
+ igt_spin_t *spin;
+ int ret;
+
+ /* We need the best sleep accuracy we can get. */
+ ret = sched_setscheduler(0,
+ SCHED_FIFO | SCHED_RESET_ON_FORK,
+ &rt);
+ if (ret)
+ igt_warn("Failed to set scheduling policy!\n");
+
+ /* Allocate our spin batch and idle it. */
+ spin = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0);
+ igt_spin_batch_end(spin);
+ gem_sync(gem_fd, spin->handle);
+
+ /* 1st pass is calibration, second pass is the test. */
+ for (int pass = 0; pass < ARRAY_SIZE(timeout); pass++) {
+ unsigned long busy_ns = 0, idle_ns = 0;
+ struct timespec test_start = { };
+ unsigned long loops = 0;
+ double err_busy, err_idle;
+
+ igt_nsec_elapsed(&test_start);
+ do {
+ struct timespec t_busy = { };
+
+ igt_nsec_elapsed(&t_busy);
+
+ /* Restart the spinbatch. */
+ __rearm_spin_batch(spin);
+ __submit_spin_batch(gem_fd, spin, e);
+ measured_usleep(sleep_busy);
+ igt_spin_batch_end(spin);
+ gem_sync(gem_fd, spin->handle);
+
+ busy_ns += igt_nsec_elapsed(&t_busy);
+
+ idle_ns += measured_usleep(sleep_idle);
+
+ loops++;
+ } while (igt_nsec_elapsed(&test_start) < timeout[pass]);
+
+ busy_ns = div_round_up(busy_ns, loops);
+ idle_ns = div_round_up(idle_ns, loops);
+
+ err_busy = __error(busy_ns / 1000, busy_us);
+ err_idle = __error(idle_ns / 1000, idle_us);
+
+ igt_info("%u: busy %lu/%lu %.2f%%, idle %lu/%lu %.2f%%\n",
+ pass,
+ busy_ns / 1000, busy_us, err_busy,
+ idle_ns / 1000, idle_us, err_idle);
+
+ if (pass == 0) {
+ sleep_busy = (double)busy_us -
+ (double)busy_us * err_busy / 100.0;
+ sleep_idle = (double)idle_us -
+ (double)idle_us * err_idle / 100.0;
+ igt_info("calibrated sleeps ratio %.2f%% (%lu/%lu)\n",
+ (double)sleep_busy /
+ (sleep_busy + sleep_idle) * 100.0,
+ sleep_busy, sleep_idle);
+ }
+ }
+
+ igt_spin_batch_free(gem_fd, spin);
+ }
+
+ /* Let the child run. */
+ usleep(pwm_calibration_us * 2);
+
+ /* Collect engine busyness for an interesting part of child runtime. */
+ fd = open_pmu(I915_PMU_ENGINE_BUSY(e->class, e->instance));
+ val[0] = __pmu_read_single(fd, &ts[0]);
+ usleep(test_us / 2);
+ val[1] = __pmu_read_single(fd, &ts[1]);
+ close(fd);
+
+ igt_waitchildren();
+
+ busy_r = (double)(val[1] - val[0]) / (ts[1] - ts[0]);
+
+ igt_info("error=%.2f%% (%.2f%% vs %lu%%)\n",
+ __error(busy_r, target_busy_pct / 100.0),
+ busy_r * 100.0, target_busy_pct);
+
+ assert_within_epsilon(busy_r, (double)target_busy_pct / 100.0, 0.15);
+}
+
igt_main
{
const unsigned int num_other_metrics =
@@ -1420,6 +1572,8 @@ igt_main
invalid_init();
for_each_engine_class_instance(fd, e) {
+ const unsigned int pct[] = { 2, 50, 98 };
+
/**
* Test that a single engine metric can be initialized or it
* is correctly rejected.
@@ -1526,6 +1680,15 @@ igt_main
*/
igt_subtest_f("enable-race-%s", e->name)
test_enable_race(fd, e);
+
+ /**
+ * Check engine busyness accuracy is as expected.
+ */
+ for (i = 0; i < ARRAY_SIZE(pct); i++) {
+ igt_subtest_f("busy-accuracy-%u-%s",
+ pct[i], e->name)
+ accuracy(fd, e, pct[i]);
+ }
}
/**
--
2.14.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [igt-dev] [PATCH i-g-t v6] tests/perf_pmu: Verify engine busyness accuracy
@ 2018-02-15 15:34 ` Tvrtko Ursulin
0 siblings, 0 replies; 25+ messages in thread
From: Tvrtko Ursulin @ 2018-02-15 15:34 UTC (permalink / raw)
To: igt-dev; +Cc: Intel-gfx, Tvrtko Ursulin
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
A subtest to verify that the engine busyness is reported with expected
accuracy on platforms where the feature is available.
We test three patterns: 2%, 50% and 98% load per engine.
v2:
* Use spin batch instead of nop calibration.
* Various tweaks.
v3:
* Change loops to be time based.
* Use __igt_spin_batch_new inside timing sensitive loops.
* Fixed PWM sleep handling.
v4:
* Use restarting spin batch.
* Calibrate more carefully by looking at the real PWM loop.
v5:
* Made standalone.
* Better info messages.
* Tweak sleep compensation.
v6:
* Some final tweaks. (Chris Wilson)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
tests/perf_pmu.c | 199 ++++++++++++++++++++++++++++++++++++++++++++++++++-----
1 file changed, 181 insertions(+), 18 deletions(-)
diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index 7d9c42d16a08..82053416cbea 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -35,6 +35,7 @@
#include <dirent.h>
#include <time.h>
#include <poll.h>
+#include <sched.h>
#include "igt.h"
#include "igt_core.h"
@@ -385,6 +386,22 @@ busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
gem_quiescent_gpu(gem_fd);
}
+static void
+__submit_spin_batch(int gem_fd, igt_spin_t *spin,
+ const struct intel_execution_engine2 *e)
+{
+ struct drm_i915_gem_exec_object2 obj = {
+ .handle = spin->handle
+ };
+ struct drm_i915_gem_execbuffer2 eb = {
+ .buffer_count = 1,
+ .buffers_ptr = to_user_pointer(&obj),
+ .flags = e2ring(gem_fd, e),
+ };
+
+ gem_execbuf(gem_fd, &eb);
+}
+
static void
most_busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
const unsigned int num_engines, unsigned int flags)
@@ -405,15 +422,7 @@ most_busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
if (e == e_) {
idle_idx = i;
} else if (spin) {
- struct drm_i915_gem_exec_object2 obj = {
- .handle = spin->handle
- };
- struct drm_i915_gem_execbuffer2 eb = {
- .buffer_count = 1,
- .buffers_ptr = to_user_pointer(&obj),
- .flags = e2ring(gem_fd, e_),
- };
- gem_execbuf(gem_fd, &eb);
+ __submit_spin_batch(gem_fd, spin, e_);
} else {
spin = igt_spin_batch_new(gem_fd, 0,
e2ring(gem_fd, e_), 0);
@@ -469,15 +478,7 @@ all_busy_check_all(int gem_fd, const unsigned int num_engines,
continue;
if (spin) {
- struct drm_i915_gem_exec_object2 obj = {
- .handle = spin->handle
- };
- struct drm_i915_gem_execbuffer2 eb = {
- .buffer_count = 1,
- .buffers_ptr = to_user_pointer(&obj),
- .flags = e2ring(gem_fd, e),
- };
- gem_execbuf(gem_fd, &eb);
+ __submit_spin_batch(gem_fd, spin, e);
} else {
spin = igt_spin_batch_new(gem_fd, 0,
e2ring(gem_fd, e), 0);
@@ -1392,6 +1393,157 @@ test_enable_race(int gem_fd, const struct intel_execution_engine2 *e)
gem_quiescent_gpu(gem_fd);
}
+static double __error(double val, double ref)
+{
+ igt_assert(ref > 1e-5 /* smallval */);
+ return (100.0 * val / ref) - 100.0;
+}
+
+static void __rearm_spin_batch(igt_spin_t *spin)
+{
+ const uint32_t mi_arb_chk = 0x5 << 23;
+
+ *spin->batch = mi_arb_chk;
+ __sync_synchronize();
+}
+
+#define div_round_up(a, b) (((a) + (b) - 1) / (b))
+
+static void
+accuracy(int gem_fd, const struct intel_execution_engine2 *e,
+ unsigned long target_busy_pct)
+{
+ const unsigned int min_test_loops = 7;
+ const unsigned long min_test_us = 1e6;
+ unsigned long busy_us = 2500;
+ unsigned long idle_us = 100 * (busy_us - target_busy_pct *
+ busy_us / 100) / target_busy_pct;
+ unsigned long pwm_calibration_us;
+ unsigned long test_us;
+ double busy_r;
+ uint64_t val[2];
+ uint64_t ts[2];
+ int fd;
+
+ /* Sampling platforms cannot reach the high accuracy criteria. */
+ igt_require(gem_has_execlists(gem_fd));
+
+ while (idle_us < 2500) {
+ busy_us *= 2;
+ idle_us *= 2;
+ }
+
+ pwm_calibration_us = min_test_loops * (busy_us + idle_us);
+ while (pwm_calibration_us < min_test_us)
+ pwm_calibration_us += busy_us + idle_us;
+ test_us = min_test_loops * (idle_us + busy_us);
+ while (test_us < min_test_us)
+ test_us += busy_us + idle_us;
+
+ igt_info("calibration=%luus, test=%luus; ratio=%.2f%% (%luus/%luus)\n",
+ pwm_calibration_us, test_us,
+ (double)busy_us / (busy_us + idle_us) * 100.0,
+ busy_us, idle_us);
+
+ assert_within_epsilon((double)busy_us / (busy_us + idle_us),
+ (double)target_busy_pct / 100.0, tolerance);
+
+ /* Emit PWM pattern on the engine from a child. */
+ igt_fork(child, 1) {
+ struct sched_param rt = { .sched_priority = 99 };
+ const unsigned long timeout[] = { pwm_calibration_us * 1000,
+ test_us * 2 * 1000 };
+ unsigned long sleep_busy = busy_us;
+ unsigned long sleep_idle = idle_us;
+ igt_spin_t *spin;
+ int ret;
+
+ /* We need the best sleep accuracy we can get. */
+ ret = sched_setscheduler(0,
+ SCHED_FIFO | SCHED_RESET_ON_FORK,
+ &rt);
+ if (ret)
+ igt_warn("Failed to set scheduling policy!\n");
+
+ /* Allocate our spin batch and idle it. */
+ spin = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0);
+ igt_spin_batch_end(spin);
+ gem_sync(gem_fd, spin->handle);
+
+ /* 1st pass is calibration, second pass is the test. */
+ for (int pass = 0; pass < ARRAY_SIZE(timeout); pass++) {
+ unsigned long busy_ns = 0, idle_ns = 0;
+ struct timespec test_start = { };
+ unsigned long loops = 0;
+ double err_busy, err_idle;
+
+ igt_nsec_elapsed(&test_start);
+ do {
+ struct timespec t_busy = { };
+
+ igt_nsec_elapsed(&t_busy);
+
+ /* Restart the spinbatch. */
+ __rearm_spin_batch(spin);
+ __submit_spin_batch(gem_fd, spin, e);
+ measured_usleep(sleep_busy);
+ igt_spin_batch_end(spin);
+ gem_sync(gem_fd, spin->handle);
+
+ busy_ns += igt_nsec_elapsed(&t_busy);
+
+ idle_ns += measured_usleep(sleep_idle);
+
+ loops++;
+ } while (igt_nsec_elapsed(&test_start) < timeout[pass]);
+
+ busy_ns = div_round_up(busy_ns, loops);
+ idle_ns = div_round_up(idle_ns, loops);
+
+ err_busy = __error(busy_ns / 1000, busy_us);
+ err_idle = __error(idle_ns / 1000, idle_us);
+
+ igt_info("%u: busy %lu/%lu %.2f%%, idle %lu/%lu %.2f%%\n",
+ pass,
+ busy_ns / 1000, busy_us, err_busy,
+ idle_ns / 1000, idle_us, err_idle);
+
+ if (pass == 0) {
+ sleep_busy = (double)busy_us -
+ (double)busy_us * err_busy / 100.0;
+ sleep_idle = (double)idle_us -
+ (double)idle_us * err_idle / 100.0;
+ igt_info("calibrated sleeps ratio %.2f%% (%lu/%lu)\n",
+ (double)sleep_busy /
+ (sleep_busy + sleep_idle) * 100.0,
+ sleep_busy, sleep_idle);
+ }
+ }
+
+ igt_spin_batch_free(gem_fd, spin);
+ }
+
+ /* Let the child run. */
+ usleep(pwm_calibration_us * 2);
+
+ /* Collect engine busyness for an interesting part of child runtime. */
+ fd = open_pmu(I915_PMU_ENGINE_BUSY(e->class, e->instance));
+ val[0] = __pmu_read_single(fd, &ts[0]);
+ usleep(test_us / 2);
+ val[1] = __pmu_read_single(fd, &ts[1]);
+ close(fd);
+
+ igt_waitchildren();
+
+ busy_r = (double)(val[1] - val[0]) / (ts[1] - ts[0]);
+
+ igt_info("error=%.2f%% (%.2f%% vs %lu%%)\n",
+ __error(busy_r, target_busy_pct / 100.0),
+ busy_r * 100.0, target_busy_pct);
+
+ assert_within_epsilon(busy_r, (double)target_busy_pct / 100.0, 0.15);
+}
+
igt_main
{
const unsigned int num_other_metrics =
@@ -1420,6 +1572,8 @@ igt_main
invalid_init();
for_each_engine_class_instance(fd, e) {
+ const unsigned int pct[] = { 2, 50, 98 };
+
/**
* Test that a single engine metric can be initialized or it
* is correctly rejected.
@@ -1526,6 +1680,15 @@ igt_main
*/
igt_subtest_f("enable-race-%s", e->name)
test_enable_race(fd, e);
+
+ /**
+ * Check engine busyness accuracy is as expected.
+ */
+ for (i = 0; i < ARRAY_SIZE(pct); i++) {
+ igt_subtest_f("busy-accuracy-%u-%s",
+ pct[i], e->name)
+ accuracy(fd, e, pct[i]);
+ }
}
/**
--
2.14.1
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [igt-dev] ✗ Fi.CI.BAT: warning for tests/perf_pmu: Verify engine busyness accuracy (rev3)
2018-02-15 11:53 ` [igt-dev] " Tvrtko Ursulin
` (2 preceding siblings ...)
(?)
@ 2018-02-15 17:20 ` Patchwork
-1 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2018-02-15 17:20 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: igt-dev
== Series Details ==
Series: tests/perf_pmu: Verify engine busyness accuracy (rev3)
URL : https://patchwork.freedesktop.org/series/37359/
State : warning
== Summary ==
IGT patchset tested on top of latest successful build
f2ac5601be25c683e89f7b6ee704c1b1b9eb1b30 tests/perf_pmu: Log perf timestamp in semaphore wait tests
with latest DRM-Tip kernel build CI_DRM_3779
6b3cedfad753 drm-tip: 2018y-02m-15d-15h-04m-33s UTC integration manifest
Testlist changes:
+igt@perf_pmu@busy-accuracy-2-bcs0
+igt@perf_pmu@busy-accuracy-2-rcs0
+igt@perf_pmu@busy-accuracy-2-vcs0
+igt@perf_pmu@busy-accuracy-2-vcs1
+igt@perf_pmu@busy-accuracy-2-vecs0
+igt@perf_pmu@busy-accuracy-50-bcs0
+igt@perf_pmu@busy-accuracy-50-rcs0
+igt@perf_pmu@busy-accuracy-50-vcs0
+igt@perf_pmu@busy-accuracy-50-vcs1
+igt@perf_pmu@busy-accuracy-50-vecs0
+igt@perf_pmu@busy-accuracy-98-bcs0
+igt@perf_pmu@busy-accuracy-98-rcs0
+igt@perf_pmu@busy-accuracy-98-vcs0
+igt@perf_pmu@busy-accuracy-98-vcs1
+igt@perf_pmu@busy-accuracy-98-vecs0
Test debugfs_test:
Subgroup read_all_entries:
pass -> INCOMPLETE (fi-snb-2520m) fdo#103713
Test gem_wait:
Subgroup basic-wait-all:
pass -> DMESG-WARN (fi-skl-6770hq)
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:421s
fi-bdw-gvtdvm total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:432s
fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:377s
fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:488s
fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:288s
fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:485s
fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:485s
fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:474s
fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:460s
fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:571s
fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:418s
fi-gdg-551 total:288 pass:179 dwarn:0 dfail:0 fail:1 skip:108 time:285s
fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:514s
fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:393s
fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:422s
fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:465s
fi-ivb-3770 total:288 pass:255 dwarn:0 dfail:0 fail:0 skip:33 time:414s
fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:457s
fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:500s
fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:455s
fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:503s
fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:591s
fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:434s
fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:510s
fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:531s
fi-skl-6700k2 total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:496s
fi-skl-6770hq total:288 pass:267 dwarn:1 dfail:0 fail:0 skip:20 time:480s
fi-skl-guc total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:416s
fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:430s
fi-snb-2520m total:3 pass:2 dwarn:0 dfail:0 fail:0 skip:0
fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:401s
Blacklisted hosts:
fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:473s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_930/issues.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 25+ messages in thread
* [igt-dev] ✗ Fi.CI.BAT: failure for tests/perf_pmu: Verify engine busyness accuracy (rev3)
2018-02-15 11:53 ` [igt-dev] " Tvrtko Ursulin
` (3 preceding siblings ...)
(?)
@ 2018-02-16 12:50 ` Patchwork
-1 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2018-02-16 12:50 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: igt-dev
== Series Details ==
Series: tests/perf_pmu: Verify engine busyness accuracy (rev3)
URL : https://patchwork.freedesktop.org/series/37359/
State : failure
== Summary ==
IGT patchset tested on top of latest successful build
2b64cac7d858d0c63b87e7a889a21a36bfcc4138 lib/i915_pciids.h: Add Cannonlake PCI IDs for another SKU.
with latest DRM-Tip kernel build CI_DRM_3783
8a1ed2480c14 drm-tip: 2018y-02m-16d-08h-56m-34s UTC integration manifest
Testlist changes:
+igt@perf_pmu@busy-accuracy-2-bcs0
+igt@perf_pmu@busy-accuracy-2-rcs0
+igt@perf_pmu@busy-accuracy-2-vcs0
+igt@perf_pmu@busy-accuracy-2-vcs1
+igt@perf_pmu@busy-accuracy-2-vecs0
+igt@perf_pmu@busy-accuracy-50-bcs0
+igt@perf_pmu@busy-accuracy-50-rcs0
+igt@perf_pmu@busy-accuracy-50-vcs0
+igt@perf_pmu@busy-accuracy-50-vcs1
+igt@perf_pmu@busy-accuracy-50-vecs0
+igt@perf_pmu@busy-accuracy-98-bcs0
+igt@perf_pmu@busy-accuracy-98-rcs0
+igt@perf_pmu@busy-accuracy-98-vcs0
+igt@perf_pmu@busy-accuracy-98-vcs1
+igt@perf_pmu@busy-accuracy-98-vecs0
Test gem_mmap_gtt:
Subgroup basic-small-bo-tiledx:
fail -> PASS (fi-gdg-551) fdo#102575
Test kms_pipe_crc_basic:
Subgroup read-crc-pipe-a:
pass -> FAIL (fi-skl-6700k2)
Subgroup suspend-read-crc-pipe-c:
pass -> INCOMPLETE (fi-bxt-dsi)
fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:434s
fi-bdw-gvtdvm total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:429s
fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:376s
fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:493s
fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:289s
fi-bxt-dsi total:246 pass:219 dwarn:0 dfail:0 fail:0 skip:26
fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:489s
fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:473s
fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:463s
fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:566s
fi-cnl-y3 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:584s
fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:419s
fi-gdg-551 total:288 pass:180 dwarn:0 dfail:0 fail:0 skip:108 time:285s
fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:518s
fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:392s
fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:420s
fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:456s
fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:463s
fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:494s
fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:457s
fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:508s
fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:592s
fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:432s
fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:514s
fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:527s
fi-skl-6700k2 total:288 pass:263 dwarn:0 dfail:0 fail:1 skip:24 time:489s
fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:482s
fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:434s
fi-snb-2520m total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:535s
fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:398s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_936/issues.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 25+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for tests/perf_pmu: Verify engine busyness accuracy (rev3)
2018-02-15 11:53 ` [igt-dev] " Tvrtko Ursulin
` (4 preceding siblings ...)
(?)
@ 2018-02-16 13:27 ` Patchwork
-1 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2018-02-16 13:27 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: igt-dev
== Series Details ==
Series: tests/perf_pmu: Verify engine busyness accuracy (rev3)
URL : https://patchwork.freedesktop.org/series/37359/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
2b64cac7d858d0c63b87e7a889a21a36bfcc4138 lib/i915_pciids.h: Add Cannonlake PCI IDs for another SKU.
with latest DRM-Tip kernel build CI_DRM_3783
8a1ed2480c14 drm-tip: 2018y-02m-16d-08h-56m-34s UTC integration manifest
Testlist changes:
+igt@perf_pmu@busy-accuracy-2-bcs0
+igt@perf_pmu@busy-accuracy-2-rcs0
+igt@perf_pmu@busy-accuracy-2-vcs0
+igt@perf_pmu@busy-accuracy-2-vcs1
+igt@perf_pmu@busy-accuracy-2-vecs0
+igt@perf_pmu@busy-accuracy-50-bcs0
+igt@perf_pmu@busy-accuracy-50-rcs0
+igt@perf_pmu@busy-accuracy-50-vcs0
+igt@perf_pmu@busy-accuracy-50-vcs1
+igt@perf_pmu@busy-accuracy-50-vecs0
+igt@perf_pmu@busy-accuracy-98-bcs0
+igt@perf_pmu@busy-accuracy-98-rcs0
+igt@perf_pmu@busy-accuracy-98-vcs0
+igt@perf_pmu@busy-accuracy-98-vcs1
+igt@perf_pmu@busy-accuracy-98-vecs0
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
pass -> INCOMPLETE (fi-snb-2520m) fdo#103713
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:426s
fi-bdw-gvtdvm total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:429s
fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:377s
fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:501s
fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:288s
fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:483s
fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:488s
fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:475s
fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:470s
fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:570s
fi-cnl-y3 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:581s
fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:413s
fi-gdg-551 total:288 pass:179 dwarn:0 dfail:0 fail:1 skip:108 time:285s
fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:512s
fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:404s
fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:414s
fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:463s
fi-ivb-3770 total:288 pass:255 dwarn:0 dfail:0 fail:0 skip:33 time:414s
fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:459s
fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:496s
fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:454s
fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:501s
fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:594s
fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:434s
fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:512s
fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:532s
fi-skl-6700k2 total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:493s
fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:474s
fi-skl-guc total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:414s
fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:431s
fi-snb-2520m total:245 pass:211 dwarn:0 dfail:0 fail:0 skip:33
fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:399s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_937/issues.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 25+ messages in thread
* [igt-dev] ✓ Fi.CI.IGT: success for tests/perf_pmu: Verify engine busyness accuracy (rev3)
2018-02-15 11:53 ` [igt-dev] " Tvrtko Ursulin
` (5 preceding siblings ...)
(?)
@ 2018-02-16 15:37 ` Patchwork
-1 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2018-02-16 15:37 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: igt-dev
== Series Details ==
Series: tests/perf_pmu: Verify engine busyness accuracy (rev3)
URL : https://patchwork.freedesktop.org/series/37359/
State : success
== Summary ==
Test kms_frontbuffer_tracking:
Subgroup fbc-rgb565-draw-mmap-cpu:
fail -> PASS (shard-apl) fdo#101623
Subgroup fbc-modesetfrombusy:
pass -> SKIP (shard-snb) fdo#103167 +1
Subgroup fbc-1p-primscrn-cur-indfb-draw-mmap-cpu:
dmesg-warn -> PASS (shard-apl) fdo#105128
Test perf:
Subgroup polling:
pass -> FAIL (shard-hsw) fdo#102252
Subgroup buffer-fill:
fail -> PASS (shard-apl) fdo#103755
Subgroup enable-disable:
pass -> FAIL (shard-apl) fdo#103715
Test kms_flip:
Subgroup dpms-vs-vblank-race-interruptible:
fail -> PASS (shard-snb) fdo#103060 +2
Subgroup 2x-plain-flip-ts-check-interruptible:
fail -> PASS (shard-hsw) fdo#100368 +1
Test gem_eio:
Subgroup in-flight:
pass -> INCOMPLETE (shard-snb) fdo#104058
Test kms_plane:
Subgroup plane-panning-bottom-right-suspend-pipe-c-planes:
pass -> INCOMPLETE (shard-hsw) fdo#103375
Test kms_vblank:
Subgroup pipe-a-ts-continuation-suspend:
pass -> INCOMPLETE (shard-hsw) fdo#103540
Test kms_plane_multiple:
Subgroup legacy-pipe-a-tiling-none:
fail -> PASS (shard-apl) fdo#103166
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#105128 https://bugs.freedesktop.org/show_bug.cgi?id=105128
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#103755 https://bugs.freedesktop.org/show_bug.cgi?id=103755
fdo#103715 https://bugs.freedesktop.org/show_bug.cgi?id=103715
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#104058 https://bugs.freedesktop.org/show_bug.cgi?id=104058
fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375
fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
shard-apl total:3345 pass:1740 dwarn:1 dfail:0 fail:21 skip:1582 time:12418s
shard-hsw total:3368 pass:1718 dwarn:1 dfail:0 fail:10 skip:1636 time:11085s
shard-snb total:3420 pass:1338 dwarn:1 dfail:0 fail:12 skip:2068 time:6543s
Blacklisted hosts:
shard-kbl total:3434 pass:1915 dwarn:1 dfail:0 fail:21 skip:1496 time:9303s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_937/shards.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v6] tests/perf_pmu: Verify engine busyness accuracy
2018-02-15 15:34 ` [igt-dev] " Tvrtko Ursulin
@ 2018-02-17 11:36 ` Chris Wilson
-1 siblings, 0 replies; 25+ messages in thread
From: Chris Wilson @ 2018-02-17 11:36 UTC (permalink / raw)
To: Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
Quoting Tvrtko Ursulin (2018-02-15 15:34:53)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> A subtest to verify that the engine busyness is reported with expected
> accuracy on platforms where the feature is available.
>
> We test three patterns: 2%, 50% and 98% load per engine.
>
> v2:
> * Use spin batch instead of nop calibration.
> * Various tweaks.
>
> v3:
> * Change loops to be time based.
> * Use __igt_spin_batch_new inside timing sensitive loops.
> * Fixed PWM sleep handling.
>
> v4:
> * Use restarting spin batch.
> * Calibrate more carefully by looking at the real PWM loop.
>
> v5:
> * Made standalone.
> * Better info messages.
> * Tweak sleep compensation.
>
> v6:
> * Some final tweaks. (Chris Wilson)
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> +
> + /* Sampling platforms cannot reach the high accuracy criteria. */
> + igt_require(gem_has_execlists(gem_fd));
But we don't handle guc, right?
igt_skip_on(gem_has_guc_submission(gem_fd)) ?
https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-skl-guc/igt@perf_pmu@busy-accuracy-2-vecs0.html
Or at least it doesn't work to sufficient accuracy. And bsw hung.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v6] tests/perf_pmu: Verify engine busyness accuracy
@ 2018-02-17 11:36 ` Chris Wilson
0 siblings, 0 replies; 25+ messages in thread
From: Chris Wilson @ 2018-02-17 11:36 UTC (permalink / raw)
To: Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx, Tvrtko Ursulin
Quoting Tvrtko Ursulin (2018-02-15 15:34:53)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> A subtest to verify that the engine busyness is reported with expected
> accuracy on platforms where the feature is available.
>
> We test three patterns: 2%, 50% and 98% load per engine.
>
> v2:
> * Use spin batch instead of nop calibration.
> * Various tweaks.
>
> v3:
> * Change loops to be time based.
> * Use __igt_spin_batch_new inside timing sensitive loops.
> * Fixed PWM sleep handling.
>
> v4:
> * Use restarting spin batch.
> * Calibrate more carefully by looking at the real PWM loop.
>
> v5:
> * Made standalone.
> * Better info messages.
> * Tweak sleep compensation.
>
> v6:
> * Some final tweaks. (Chris Wilson)
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> +
> + /* Sampling platforms cannot reach the high accuracy criteria. */
> + igt_require(gem_has_execlists(gem_fd));
But we don't handle guc, right?
igt_skip_on(gem_has_guc_submission(gem_fd)) ?
https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-skl-guc/igt@perf_pmu@busy-accuracy-2-vecs0.html
Or at least it doesn't work to sufficient accuracy. And bsw hung.
-Chris
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v6] tests/perf_pmu: Verify engine busyness accuracy
2018-02-17 11:36 ` Chris Wilson
@ 2018-02-19 9:19 ` Tvrtko Ursulin
-1 siblings, 0 replies; 25+ messages in thread
From: Tvrtko Ursulin @ 2018-02-19 9:19 UTC (permalink / raw)
To: Chris Wilson, Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
On 17/02/2018 11:36, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2018-02-15 15:34:53)
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> A subtest to verify that the engine busyness is reported with expected
>> accuracy on platforms where the feature is available.
>>
>> We test three patterns: 2%, 50% and 98% load per engine.
>>
>> v2:
>> * Use spin batch instead of nop calibration.
>> * Various tweaks.
>>
>> v3:
>> * Change loops to be time based.
>> * Use __igt_spin_batch_new inside timing sensitive loops.
>> * Fixed PWM sleep handling.
>>
>> v4:
>> * Use restarting spin batch.
>> * Calibrate more carefully by looking at the real PWM loop.
>>
>> v5:
>> * Made standalone.
>> * Better info messages.
>> * Tweak sleep compensation.
>>
>> v6:
>> * Some final tweaks. (Chris Wilson)
>>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
>> ---
>> +
>> + /* Sampling platforms cannot reach the high accuracy criteria. */
>> + igt_require(gem_has_execlists(gem_fd));
>
> But we don't handle guc, right?
Correct.
> igt_skip_on(gem_has_guc_submission(gem_fd)) ?
I'll dig up and rebase my old patch which implements busy stats in GuC
mode.
> https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-skl-guc/igt@perf_pmu@busy-accuracy-2-vecs0.html
>
> Or at least it doesn't work to sufficient accuracy. And bsw hung.
There are some occasional excursions over 15% tolerance even with
execlists on small core. Bummer. Don't want to be playing up the
tolerance game. I'll analyse in more detail and think what to do.
Do you have a link to BSW hang? Is that obviously related to PMU?
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [igt-dev] [Intel-gfx] [PATCH i-g-t v6] tests/perf_pmu: Verify engine busyness accuracy
@ 2018-02-19 9:19 ` Tvrtko Ursulin
0 siblings, 0 replies; 25+ messages in thread
From: Tvrtko Ursulin @ 2018-02-19 9:19 UTC (permalink / raw)
To: Chris Wilson, Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
On 17/02/2018 11:36, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2018-02-15 15:34:53)
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> A subtest to verify that the engine busyness is reported with expected
>> accuracy on platforms where the feature is available.
>>
>> We test three patterns: 2%, 50% and 98% load per engine.
>>
>> v2:
>> * Use spin batch instead of nop calibration.
>> * Various tweaks.
>>
>> v3:
>> * Change loops to be time based.
>> * Use __igt_spin_batch_new inside timing sensitive loops.
>> * Fixed PWM sleep handling.
>>
>> v4:
>> * Use restarting spin batch.
>> * Calibrate more carefully by looking at the real PWM loop.
>>
>> v5:
>> * Made standalone.
>> * Better info messages.
>> * Tweak sleep compensation.
>>
>> v6:
>> * Some final tweaks. (Chris Wilson)
>>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
>> ---
>> +
>> + /* Sampling platforms cannot reach the high accuracy criteria. */
>> + igt_require(gem_has_execlists(gem_fd));
>
> But we don't handle guc, right?
Correct.
> igt_skip_on(gem_has_guc_submission(gem_fd)) ?
I'll dig up and rebase my old patch which implements busy stats in GuC
mode.
> https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-skl-guc/igt@perf_pmu@busy-accuracy-2-vecs0.html
>
> Or at least it doesn't work to sufficient accuracy. And bsw hung.
There are some occasional excursions over 15% tolerance even with
execlists on small core. Bummer. Don't want to be playing up the
tolerance game. I'll analyse in more detail and think what to do.
Do you have a link to BSW hang? Is that obviously related to PMU?
Regards,
Tvrtko
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v6] tests/perf_pmu: Verify engine busyness accuracy
2018-02-19 9:19 ` [igt-dev] [Intel-gfx] " Tvrtko Ursulin
@ 2018-02-19 9:27 ` Chris Wilson
-1 siblings, 0 replies; 25+ messages in thread
From: Chris Wilson @ 2018-02-19 9:27 UTC (permalink / raw)
To: Tvrtko Ursulin, Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
Quoting Tvrtko Ursulin (2018-02-19 09:19:47)
>
> Do you have a link to BSW hang? Is that obviously related to PMU?
It's only occurring in this test, just looks like an issue with the
spinner:
[bsw] https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-bsw-n3050/igt@perf_pmu@busy-accuracy-2-bcs0.html
[kbl] https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-kbl-7560u/igt@perf_pmu@busy-accuracy-2-bcs0.html
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [igt-dev] [Intel-gfx] [PATCH i-g-t v6] tests/perf_pmu: Verify engine busyness accuracy
@ 2018-02-19 9:27 ` Chris Wilson
0 siblings, 0 replies; 25+ messages in thread
From: Chris Wilson @ 2018-02-19 9:27 UTC (permalink / raw)
To: Tvrtko Ursulin, Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
Quoting Tvrtko Ursulin (2018-02-19 09:19:47)
>
> Do you have a link to BSW hang? Is that obviously related to PMU?
It's only occurring in this test, just looks like an issue with the
spinner:
[bsw] https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-bsw-n3050/igt@perf_pmu@busy-accuracy-2-bcs0.html
[kbl] https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-kbl-7560u/igt@perf_pmu@busy-accuracy-2-bcs0.html
-Chris
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v6] tests/perf_pmu: Verify engine busyness accuracy
2018-02-19 9:27 ` [igt-dev] [Intel-gfx] " Chris Wilson
@ 2018-02-19 9:57 ` Tvrtko Ursulin
-1 siblings, 0 replies; 25+ messages in thread
From: Tvrtko Ursulin @ 2018-02-19 9:57 UTC (permalink / raw)
To: Chris Wilson, Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
On 19/02/2018 09:27, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2018-02-19 09:19:47)
>>
>> Do you have a link to BSW hang? Is that obviously related to PMU?
>
> It's only occurring in this test, just looks like an issue with the
> spinner:
>
> [bsw] https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-bsw-n3050/igt@perf_pmu@busy-accuracy-2-bcs0.html
...
<0>[ 681.022677] perf_pmu-1516 1..s1 282520414us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
<0>[ 681.022838] perf_pmu-1516 1..s1 282520580us : execlists_submission_tasklet: bcs0 cs-irq head=5 [5?], tail=0 [0?]
<0>[ 681.023001] perf_pmu-1516 1..s1 282520594us : execlists_submission_tasklet: bcs0 csb[0]: status=0x00000001:0x00000000, active=0x1
<0>[ 681.023168] kworker/-338 1.... 298087910us : reset_common_ring: bcs0 seqno=a
<0>[ 681.023321] ksoftirq-17 1..s. 298088483us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
<0>[ 681.023482] ksoftirq-17 1..s. 298088575us : execlists_submission_tasklet: bcs0 cs-irq head=0 [0], tail=1 [1]
<0>[ 681.023644] ksoftirq-17 1..s. 298088579us : execlists_submission_tasklet: bcs0 csb[1]: status=0x00000018:0x00000003, active=0x1
<0>[ 681.023811] ksoftirq-17 1..s. 298088581us : execlists_submission_tasklet: bcs0 out[0]: ctx=3.1, seqno=a
Everything stops.
> [kbl] https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-kbl-7560u/igt@perf_pmu@busy-accuracy-2-bcs0.html
...
<0>[ 506.745332] perf_pmu-1544 3..s1 107905835us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
<0>[ 506.745397] <idle>-0 2..s1 107905980us : execlists_submission_tasklet: bcs0 cs-irq head=2 [1?], tail=3 [3?]
<0>[ 506.745440] <idle>-0 2..s1 107905983us : execlists_submission_tasklet: bcs0 csb[3]: status=0x00000001:0x00000000, active=0x1
<0>[ 506.745498] kworker/-30 3.... 120840583us : reset_common_ring: bcs0 seqno=a
<0>[ 506.745547] ksoftirq-29 3..s. 120840688us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
<0>[ 506.745598] in:imklo-499 2..s1 120840710us : execlists_submission_tasklet: bcs0 cs-irq head=0 [0], tail=1 [1]
<0>[ 506.745637] in:imklo-499 2..s1 120840712us : execlists_submission_tasklet: bcs0 csb[1]: status=0x00000018:0x00000003, active=0x1
<0>[ 506.745676] in:imklo-499 2..s1 120840713us : execlists_submission_tasklet: bcs0 out[0]: ctx=3.1, seqno=a
Everything stops here.
I have not idea what's happening here. In both cases I would expect the test
to have exited after the GPU hang (or at least attempt to exit!), since it
would detect it overran the timeout.
Could it be stuck in gem_sync after the reset? Or somewhere else?
Could we add "echo t > /proc/sysrq-trigger" equivalent when owatch triggers?
Or it would overflow some buffer? Should work in cases like this one, when
it is not a machine hang.
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [igt-dev] [Intel-gfx] [PATCH i-g-t v6] tests/perf_pmu: Verify engine busyness accuracy
@ 2018-02-19 9:57 ` Tvrtko Ursulin
0 siblings, 0 replies; 25+ messages in thread
From: Tvrtko Ursulin @ 2018-02-19 9:57 UTC (permalink / raw)
To: Chris Wilson, Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
On 19/02/2018 09:27, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2018-02-19 09:19:47)
>>
>> Do you have a link to BSW hang? Is that obviously related to PMU?
>
> It's only occurring in this test, just looks like an issue with the
> spinner:
>
> [bsw] https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-bsw-n3050/igt@perf_pmu@busy-accuracy-2-bcs0.html
...
<0>[ 681.022677] perf_pmu-1516 1..s1 282520414us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
<0>[ 681.022838] perf_pmu-1516 1..s1 282520580us : execlists_submission_tasklet: bcs0 cs-irq head=5 [5?], tail=0 [0?]
<0>[ 681.023001] perf_pmu-1516 1..s1 282520594us : execlists_submission_tasklet: bcs0 csb[0]: status=0x00000001:0x00000000, active=0x1
<0>[ 681.023168] kworker/-338 1.... 298087910us : reset_common_ring: bcs0 seqno=a
<0>[ 681.023321] ksoftirq-17 1..s. 298088483us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
<0>[ 681.023482] ksoftirq-17 1..s. 298088575us : execlists_submission_tasklet: bcs0 cs-irq head=0 [0], tail=1 [1]
<0>[ 681.023644] ksoftirq-17 1..s. 298088579us : execlists_submission_tasklet: bcs0 csb[1]: status=0x00000018:0x00000003, active=0x1
<0>[ 681.023811] ksoftirq-17 1..s. 298088581us : execlists_submission_tasklet: bcs0 out[0]: ctx=3.1, seqno=a
Everything stops.
> [kbl] https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-kbl-7560u/igt@perf_pmu@busy-accuracy-2-bcs0.html
...
<0>[ 506.745332] perf_pmu-1544 3..s1 107905835us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
<0>[ 506.745397] <idle>-0 2..s1 107905980us : execlists_submission_tasklet: bcs0 cs-irq head=2 [1?], tail=3 [3?]
<0>[ 506.745440] <idle>-0 2..s1 107905983us : execlists_submission_tasklet: bcs0 csb[3]: status=0x00000001:0x00000000, active=0x1
<0>[ 506.745498] kworker/-30 3.... 120840583us : reset_common_ring: bcs0 seqno=a
<0>[ 506.745547] ksoftirq-29 3..s. 120840688us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
<0>[ 506.745598] in:imklo-499 2..s1 120840710us : execlists_submission_tasklet: bcs0 cs-irq head=0 [0], tail=1 [1]
<0>[ 506.745637] in:imklo-499 2..s1 120840712us : execlists_submission_tasklet: bcs0 csb[1]: status=0x00000018:0x00000003, active=0x1
<0>[ 506.745676] in:imklo-499 2..s1 120840713us : execlists_submission_tasklet: bcs0 out[0]: ctx=3.1, seqno=a
Everything stops here.
I have not idea what's happening here. In both cases I would expect the test
to have exited after the GPU hang (or at least attempt to exit!), since it
would detect it overran the timeout.
Could it be stuck in gem_sync after the reset? Or somewhere else?
Could we add "echo t > /proc/sysrq-trigger" equivalent when owatch triggers?
Or it would overflow some buffer? Should work in cases like this one, when
it is not a machine hang.
Regards,
Tvrtko
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v6] tests/perf_pmu: Verify engine busyness accuracy
2018-02-19 9:57 ` [igt-dev] [Intel-gfx] " Tvrtko Ursulin
@ 2018-02-19 10:26 ` Chris Wilson
-1 siblings, 0 replies; 25+ messages in thread
From: Chris Wilson @ 2018-02-19 10:26 UTC (permalink / raw)
To: Tvrtko Ursulin, Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
Quoting Tvrtko Ursulin (2018-02-19 09:57:20)
>
> On 19/02/2018 09:27, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2018-02-19 09:19:47)
> >>
> >> Do you have a link to BSW hang? Is that obviously related to PMU?
> >
> > It's only occurring in this test, just looks like an issue with the
> > spinner:
> >
> > [bsw] https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-bsw-n3050/igt@perf_pmu@busy-accuracy-2-bcs0.html
>
> ...
> <0>[ 681.022677] perf_pmu-1516 1..s1 282520414us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
> <0>[ 681.022838] perf_pmu-1516 1..s1 282520580us : execlists_submission_tasklet: bcs0 cs-irq head=5 [5?], tail=0 [0?]
> <0>[ 681.023001] perf_pmu-1516 1..s1 282520594us : execlists_submission_tasklet: bcs0 csb[0]: status=0x00000001:0x00000000, active=0x1
> <0>[ 681.023168] kworker/-338 1.... 298087910us : reset_common_ring: bcs0 seqno=a
> <0>[ 681.023321] ksoftirq-17 1..s. 298088483us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
> <0>[ 681.023482] ksoftirq-17 1..s. 298088575us : execlists_submission_tasklet: bcs0 cs-irq head=0 [0], tail=1 [1]
> <0>[ 681.023644] ksoftirq-17 1..s. 298088579us : execlists_submission_tasklet: bcs0 csb[1]: status=0x00000018:0x00000003, active=0x1
> <0>[ 681.023811] ksoftirq-17 1..s. 298088581us : execlists_submission_tasklet: bcs0 out[0]: ctx=3.1, seqno=a
>
> Everything stops.
>
> > [kbl] https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-kbl-7560u/igt@perf_pmu@busy-accuracy-2-bcs0.html
>
> ...
> <0>[ 506.745332] perf_pmu-1544 3..s1 107905835us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
> <0>[ 506.745397] <idle>-0 2..s1 107905980us : execlists_submission_tasklet: bcs0 cs-irq head=2 [1?], tail=3 [3?]
> <0>[ 506.745440] <idle>-0 2..s1 107905983us : execlists_submission_tasklet: bcs0 csb[3]: status=0x00000001:0x00000000, active=0x1
> <0>[ 506.745498] kworker/-30 3.... 120840583us : reset_common_ring: bcs0 seqno=a
> <0>[ 506.745547] ksoftirq-29 3..s. 120840688us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
> <0>[ 506.745598] in:imklo-499 2..s1 120840710us : execlists_submission_tasklet: bcs0 cs-irq head=0 [0], tail=1 [1]
> <0>[ 506.745637] in:imklo-499 2..s1 120840712us : execlists_submission_tasklet: bcs0 csb[1]: status=0x00000018:0x00000003, active=0x1
> <0>[ 506.745676] in:imklo-499 2..s1 120840713us : execlists_submission_tasklet: bcs0 out[0]: ctx=3.1, seqno=a
>
> Everything stops here.
>
> I have not idea what's happening here. In both cases I would expect the test
> to have exited after the GPU hang (or at least attempt to exit!), since it
> would detect it overran the timeout.
>
> Could it be stuck in gem_sync after the reset? Or somewhere else?
I think it's that we will be throwing the calibration off if it hangs.
If busy_ns = 10s, won't that generate a target idle time of 500s?
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [igt-dev] [Intel-gfx] [PATCH i-g-t v6] tests/perf_pmu: Verify engine busyness accuracy
@ 2018-02-19 10:26 ` Chris Wilson
0 siblings, 0 replies; 25+ messages in thread
From: Chris Wilson @ 2018-02-19 10:26 UTC (permalink / raw)
To: Tvrtko Ursulin, Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
Quoting Tvrtko Ursulin (2018-02-19 09:57:20)
>
> On 19/02/2018 09:27, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2018-02-19 09:19:47)
> >>
> >> Do you have a link to BSW hang? Is that obviously related to PMU?
> >
> > It's only occurring in this test, just looks like an issue with the
> > spinner:
> >
> > [bsw] https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-bsw-n3050/igt@perf_pmu@busy-accuracy-2-bcs0.html
>
> ...
> <0>[ 681.022677] perf_pmu-1516 1..s1 282520414us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
> <0>[ 681.022838] perf_pmu-1516 1..s1 282520580us : execlists_submission_tasklet: bcs0 cs-irq head=5 [5?], tail=0 [0?]
> <0>[ 681.023001] perf_pmu-1516 1..s1 282520594us : execlists_submission_tasklet: bcs0 csb[0]: status=0x00000001:0x00000000, active=0x1
> <0>[ 681.023168] kworker/-338 1.... 298087910us : reset_common_ring: bcs0 seqno=a
> <0>[ 681.023321] ksoftirq-17 1..s. 298088483us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
> <0>[ 681.023482] ksoftirq-17 1..s. 298088575us : execlists_submission_tasklet: bcs0 cs-irq head=0 [0], tail=1 [1]
> <0>[ 681.023644] ksoftirq-17 1..s. 298088579us : execlists_submission_tasklet: bcs0 csb[1]: status=0x00000018:0x00000003, active=0x1
> <0>[ 681.023811] ksoftirq-17 1..s. 298088581us : execlists_submission_tasklet: bcs0 out[0]: ctx=3.1, seqno=a
>
> Everything stops.
>
> > [kbl] https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-kbl-7560u/igt@perf_pmu@busy-accuracy-2-bcs0.html
>
> ...
> <0>[ 506.745332] perf_pmu-1544 3..s1 107905835us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
> <0>[ 506.745397] <idle>-0 2..s1 107905980us : execlists_submission_tasklet: bcs0 cs-irq head=2 [1?], tail=3 [3?]
> <0>[ 506.745440] <idle>-0 2..s1 107905983us : execlists_submission_tasklet: bcs0 csb[3]: status=0x00000001:0x00000000, active=0x1
> <0>[ 506.745498] kworker/-30 3.... 120840583us : reset_common_ring: bcs0 seqno=a
> <0>[ 506.745547] ksoftirq-29 3..s. 120840688us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
> <0>[ 506.745598] in:imklo-499 2..s1 120840710us : execlists_submission_tasklet: bcs0 cs-irq head=0 [0], tail=1 [1]
> <0>[ 506.745637] in:imklo-499 2..s1 120840712us : execlists_submission_tasklet: bcs0 csb[1]: status=0x00000018:0x00000003, active=0x1
> <0>[ 506.745676] in:imklo-499 2..s1 120840713us : execlists_submission_tasklet: bcs0 out[0]: ctx=3.1, seqno=a
>
> Everything stops here.
>
> I have not idea what's happening here. In both cases I would expect the test
> to have exited after the GPU hang (or at least attempt to exit!), since it
> would detect it overran the timeout.
>
> Could it be stuck in gem_sync after the reset? Or somewhere else?
I think it's that we will be throwing the calibration off if it hangs.
If busy_ns = 10s, won't that generate a target idle time of 500s?
-Chris
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v6] tests/perf_pmu: Verify engine busyness accuracy
2018-02-19 10:26 ` [igt-dev] [Intel-gfx] " Chris Wilson
@ 2018-02-19 10:58 ` Tvrtko Ursulin
-1 siblings, 0 replies; 25+ messages in thread
From: Tvrtko Ursulin @ 2018-02-19 10:58 UTC (permalink / raw)
To: Chris Wilson, Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
On 19/02/2018 10:26, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2018-02-19 09:57:20)
>>
>> On 19/02/2018 09:27, Chris Wilson wrote:
>>> Quoting Tvrtko Ursulin (2018-02-19 09:19:47)
>>>>
>>>> Do you have a link to BSW hang? Is that obviously related to PMU?
>>>
>>> It's only occurring in this test, just looks like an issue with the
>>> spinner:
>>>
>>> [bsw] https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-bsw-n3050/igt@perf_pmu@busy-accuracy-2-bcs0.html
>>
>> ...
>> <0>[ 681.022677] perf_pmu-1516 1..s1 282520414us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
>> <0>[ 681.022838] perf_pmu-1516 1..s1 282520580us : execlists_submission_tasklet: bcs0 cs-irq head=5 [5?], tail=0 [0?]
>> <0>[ 681.023001] perf_pmu-1516 1..s1 282520594us : execlists_submission_tasklet: bcs0 csb[0]: status=0x00000001:0x00000000, active=0x1
>> <0>[ 681.023168] kworker/-338 1.... 298087910us : reset_common_ring: bcs0 seqno=a
>> <0>[ 681.023321] ksoftirq-17 1..s. 298088483us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
>> <0>[ 681.023482] ksoftirq-17 1..s. 298088575us : execlists_submission_tasklet: bcs0 cs-irq head=0 [0], tail=1 [1]
>> <0>[ 681.023644] ksoftirq-17 1..s. 298088579us : execlists_submission_tasklet: bcs0 csb[1]: status=0x00000018:0x00000003, active=0x1
>> <0>[ 681.023811] ksoftirq-17 1..s. 298088581us : execlists_submission_tasklet: bcs0 out[0]: ctx=3.1, seqno=a
>>
>> Everything stops.
>>
>>> [kbl] https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-kbl-7560u/igt@perf_pmu@busy-accuracy-2-bcs0.html
>>
>> ...
>> <0>[ 506.745332] perf_pmu-1544 3..s1 107905835us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
>> <0>[ 506.745397] <idle>-0 2..s1 107905980us : execlists_submission_tasklet: bcs0 cs-irq head=2 [1?], tail=3 [3?]
>> <0>[ 506.745440] <idle>-0 2..s1 107905983us : execlists_submission_tasklet: bcs0 csb[3]: status=0x00000001:0x00000000, active=0x1
>> <0>[ 506.745498] kworker/-30 3.... 120840583us : reset_common_ring: bcs0 seqno=a
>> <0>[ 506.745547] ksoftirq-29 3..s. 120840688us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
>> <0>[ 506.745598] in:imklo-499 2..s1 120840710us : execlists_submission_tasklet: bcs0 cs-irq head=0 [0], tail=1 [1]
>> <0>[ 506.745637] in:imklo-499 2..s1 120840712us : execlists_submission_tasklet: bcs0 csb[1]: status=0x00000018:0x00000003, active=0x1
>> <0>[ 506.745676] in:imklo-499 2..s1 120840713us : execlists_submission_tasklet: bcs0 out[0]: ctx=3.1, seqno=a
>>
>> Everything stops here.
>>
>> I have not idea what's happening here. In both cases I would expect the test
>> to have exited after the GPU hang (or at least attempt to exit!), since it
>> would detect it overran the timeout.
>>
>> Could it be stuck in gem_sync after the reset? Or somewhere else?
>
> I think it's that we will be throwing the calibration off if it hangs.
> If busy_ns = 10s, won't that generate a target idle time of 500s?
Indeed, well spotted. I'll need to add a hang detector of some sort.
In the meantime trying to figure out how to wire up GuC to engine stats.
The fix to get correct state on stats enable by looking at ports is a
problem given different tracking in GuC mode I had.
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [Intel-gfx] [igt-dev] [PATCH i-g-t v6] tests/perf_pmu: Verify engine busyness accuracy
@ 2018-02-19 10:58 ` Tvrtko Ursulin
0 siblings, 0 replies; 25+ messages in thread
From: Tvrtko Ursulin @ 2018-02-19 10:58 UTC (permalink / raw)
To: Chris Wilson, Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
On 19/02/2018 10:26, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2018-02-19 09:57:20)
>>
>> On 19/02/2018 09:27, Chris Wilson wrote:
>>> Quoting Tvrtko Ursulin (2018-02-19 09:19:47)
>>>>
>>>> Do you have a link to BSW hang? Is that obviously related to PMU?
>>>
>>> It's only occurring in this test, just looks like an issue with the
>>> spinner:
>>>
>>> [bsw] https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-bsw-n3050/igt@perf_pmu@busy-accuracy-2-bcs0.html
>>
>> ...
>> <0>[ 681.022677] perf_pmu-1516 1..s1 282520414us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
>> <0>[ 681.022838] perf_pmu-1516 1..s1 282520580us : execlists_submission_tasklet: bcs0 cs-irq head=5 [5?], tail=0 [0?]
>> <0>[ 681.023001] perf_pmu-1516 1..s1 282520594us : execlists_submission_tasklet: bcs0 csb[0]: status=0x00000001:0x00000000, active=0x1
>> <0>[ 681.023168] kworker/-338 1.... 298087910us : reset_common_ring: bcs0 seqno=a
>> <0>[ 681.023321] ksoftirq-17 1..s. 298088483us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
>> <0>[ 681.023482] ksoftirq-17 1..s. 298088575us : execlists_submission_tasklet: bcs0 cs-irq head=0 [0], tail=1 [1]
>> <0>[ 681.023644] ksoftirq-17 1..s. 298088579us : execlists_submission_tasklet: bcs0 csb[1]: status=0x00000018:0x00000003, active=0x1
>> <0>[ 681.023811] ksoftirq-17 1..s. 298088581us : execlists_submission_tasklet: bcs0 out[0]: ctx=3.1, seqno=a
>>
>> Everything stops.
>>
>>> [kbl] https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-kbl-7560u/igt@perf_pmu@busy-accuracy-2-bcs0.html
>>
>> ...
>> <0>[ 506.745332] perf_pmu-1544 3..s1 107905835us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
>> <0>[ 506.745397] <idle>-0 2..s1 107905980us : execlists_submission_tasklet: bcs0 cs-irq head=2 [1?], tail=3 [3?]
>> <0>[ 506.745440] <idle>-0 2..s1 107905983us : execlists_submission_tasklet: bcs0 csb[3]: status=0x00000001:0x00000000, active=0x1
>> <0>[ 506.745498] kworker/-30 3.... 120840583us : reset_common_ring: bcs0 seqno=a
>> <0>[ 506.745547] ksoftirq-29 3..s. 120840688us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
>> <0>[ 506.745598] in:imklo-499 2..s1 120840710us : execlists_submission_tasklet: bcs0 cs-irq head=0 [0], tail=1 [1]
>> <0>[ 506.745637] in:imklo-499 2..s1 120840712us : execlists_submission_tasklet: bcs0 csb[1]: status=0x00000018:0x00000003, active=0x1
>> <0>[ 506.745676] in:imklo-499 2..s1 120840713us : execlists_submission_tasklet: bcs0 out[0]: ctx=3.1, seqno=a
>>
>> Everything stops here.
>>
>> I have not idea what's happening here. In both cases I would expect the test
>> to have exited after the GPU hang (or at least attempt to exit!), since it
>> would detect it overran the timeout.
>>
>> Could it be stuck in gem_sync after the reset? Or somewhere else?
>
> I think it's that we will be throwing the calibration off if it hangs.
> If busy_ns = 10s, won't that generate a target idle time of 500s?
Indeed, well spotted. I'll need to add a hang detector of some sort.
In the meantime trying to figure out how to wire up GuC to engine stats.
The fix to get correct state on stats enable by looking at ports is a
problem given different tracking in GuC mode I had.
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v6] tests/perf_pmu: Verify engine busyness accuracy
2018-02-19 10:58 ` [Intel-gfx] " Tvrtko Ursulin
@ 2018-02-19 11:04 ` Chris Wilson
-1 siblings, 0 replies; 25+ messages in thread
From: Chris Wilson @ 2018-02-19 11:04 UTC (permalink / raw)
To: Tvrtko Ursulin, Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
Quoting Tvrtko Ursulin (2018-02-19 10:58:25)
>
> On 19/02/2018 10:26, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2018-02-19 09:57:20)
> >>
> >> On 19/02/2018 09:27, Chris Wilson wrote:
> >>> Quoting Tvrtko Ursulin (2018-02-19 09:19:47)
> >>>>
> >>>> Do you have a link to BSW hang? Is that obviously related to PMU?
> >>>
> >>> It's only occurring in this test, just looks like an issue with the
> >>> spinner:
> >>>
> >>> [bsw] https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-bsw-n3050/igt@perf_pmu@busy-accuracy-2-bcs0.html
> >>
> >> ...
> >> <0>[ 681.022677] perf_pmu-1516 1..s1 282520414us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
> >> <0>[ 681.022838] perf_pmu-1516 1..s1 282520580us : execlists_submission_tasklet: bcs0 cs-irq head=5 [5?], tail=0 [0?]
> >> <0>[ 681.023001] perf_pmu-1516 1..s1 282520594us : execlists_submission_tasklet: bcs0 csb[0]: status=0x00000001:0x00000000, active=0x1
> >> <0>[ 681.023168] kworker/-338 1.... 298087910us : reset_common_ring: bcs0 seqno=a
> >> <0>[ 681.023321] ksoftirq-17 1..s. 298088483us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
> >> <0>[ 681.023482] ksoftirq-17 1..s. 298088575us : execlists_submission_tasklet: bcs0 cs-irq head=0 [0], tail=1 [1]
> >> <0>[ 681.023644] ksoftirq-17 1..s. 298088579us : execlists_submission_tasklet: bcs0 csb[1]: status=0x00000018:0x00000003, active=0x1
> >> <0>[ 681.023811] ksoftirq-17 1..s. 298088581us : execlists_submission_tasklet: bcs0 out[0]: ctx=3.1, seqno=a
> >>
> >> Everything stops.
> >>
> >>> [kbl] https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-kbl-7560u/igt@perf_pmu@busy-accuracy-2-bcs0.html
> >>
> >> ...
> >> <0>[ 506.745332] perf_pmu-1544 3..s1 107905835us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
> >> <0>[ 506.745397] <idle>-0 2..s1 107905980us : execlists_submission_tasklet: bcs0 cs-irq head=2 [1?], tail=3 [3?]
> >> <0>[ 506.745440] <idle>-0 2..s1 107905983us : execlists_submission_tasklet: bcs0 csb[3]: status=0x00000001:0x00000000, active=0x1
> >> <0>[ 506.745498] kworker/-30 3.... 120840583us : reset_common_ring: bcs0 seqno=a
> >> <0>[ 506.745547] ksoftirq-29 3..s. 120840688us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
> >> <0>[ 506.745598] in:imklo-499 2..s1 120840710us : execlists_submission_tasklet: bcs0 cs-irq head=0 [0], tail=1 [1]
> >> <0>[ 506.745637] in:imklo-499 2..s1 120840712us : execlists_submission_tasklet: bcs0 csb[1]: status=0x00000018:0x00000003, active=0x1
> >> <0>[ 506.745676] in:imklo-499 2..s1 120840713us : execlists_submission_tasklet: bcs0 out[0]: ctx=3.1, seqno=a
> >>
> >> Everything stops here.
> >>
> >> I have not idea what's happening here. In both cases I would expect the test
> >> to have exited after the GPU hang (or at least attempt to exit!), since it
> >> would detect it overran the timeout.
> >>
> >> Could it be stuck in gem_sync after the reset? Or somewhere else?
> >
> > I think it's that we will be throwing the calibration off if it hangs.
> > If busy_ns = 10s, won't that generate a target idle time of 500s?
>
> Indeed, well spotted. I'll need to add a hang detector of some sort.
Oh, I think I know why it's hanging. As the buffer will be idle, the
kernel is allowed to move it, and __submit_spin_batch() doesn't tell the
kernel to preserve the original address (so the kernel assumes that the
relocations are relative to the passed in address and so move the buffer
to match). I should have noticed that before given the discussion around
EXEC_OBJECT_PINNED for the spinner.
I think there's an easy enough patch...
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [igt-dev] [Intel-gfx] [PATCH i-g-t v6] tests/perf_pmu: Verify engine busyness accuracy
@ 2018-02-19 11:04 ` Chris Wilson
0 siblings, 0 replies; 25+ messages in thread
From: Chris Wilson @ 2018-02-19 11:04 UTC (permalink / raw)
To: Tvrtko Ursulin, Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
Quoting Tvrtko Ursulin (2018-02-19 10:58:25)
>
> On 19/02/2018 10:26, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2018-02-19 09:57:20)
> >>
> >> On 19/02/2018 09:27, Chris Wilson wrote:
> >>> Quoting Tvrtko Ursulin (2018-02-19 09:19:47)
> >>>>
> >>>> Do you have a link to BSW hang? Is that obviously related to PMU?
> >>>
> >>> It's only occurring in this test, just looks like an issue with the
> >>> spinner:
> >>>
> >>> [bsw] https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-bsw-n3050/igt@perf_pmu@busy-accuracy-2-bcs0.html
> >>
> >> ...
> >> <0>[ 681.022677] perf_pmu-1516 1..s1 282520414us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
> >> <0>[ 681.022838] perf_pmu-1516 1..s1 282520580us : execlists_submission_tasklet: bcs0 cs-irq head=5 [5?], tail=0 [0?]
> >> <0>[ 681.023001] perf_pmu-1516 1..s1 282520594us : execlists_submission_tasklet: bcs0 csb[0]: status=0x00000001:0x00000000, active=0x1
> >> <0>[ 681.023168] kworker/-338 1.... 298087910us : reset_common_ring: bcs0 seqno=a
> >> <0>[ 681.023321] ksoftirq-17 1..s. 298088483us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
> >> <0>[ 681.023482] ksoftirq-17 1..s. 298088575us : execlists_submission_tasklet: bcs0 cs-irq head=0 [0], tail=1 [1]
> >> <0>[ 681.023644] ksoftirq-17 1..s. 298088579us : execlists_submission_tasklet: bcs0 csb[1]: status=0x00000018:0x00000003, active=0x1
> >> <0>[ 681.023811] ksoftirq-17 1..s. 298088581us : execlists_submission_tasklet: bcs0 out[0]: ctx=3.1, seqno=a
> >>
> >> Everything stops.
> >>
> >>> [kbl] https://intel-gfx-ci.01.org/tree/drm-tip/kasan_2/fi-kbl-7560u/igt@perf_pmu@busy-accuracy-2-bcs0.html
> >>
> >> ...
> >> <0>[ 506.745332] perf_pmu-1544 3..s1 107905835us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
> >> <0>[ 506.745397] <idle>-0 2..s1 107905980us : execlists_submission_tasklet: bcs0 cs-irq head=2 [1?], tail=3 [3?]
> >> <0>[ 506.745440] <idle>-0 2..s1 107905983us : execlists_submission_tasklet: bcs0 csb[3]: status=0x00000001:0x00000000, active=0x1
> >> <0>[ 506.745498] kworker/-30 3.... 120840583us : reset_common_ring: bcs0 seqno=a
> >> <0>[ 506.745547] ksoftirq-29 3..s. 120840688us : execlists_submission_tasklet: bcs0 in[0]: ctx=3.1, seqno=a
> >> <0>[ 506.745598] in:imklo-499 2..s1 120840710us : execlists_submission_tasklet: bcs0 cs-irq head=0 [0], tail=1 [1]
> >> <0>[ 506.745637] in:imklo-499 2..s1 120840712us : execlists_submission_tasklet: bcs0 csb[1]: status=0x00000018:0x00000003, active=0x1
> >> <0>[ 506.745676] in:imklo-499 2..s1 120840713us : execlists_submission_tasklet: bcs0 out[0]: ctx=3.1, seqno=a
> >>
> >> Everything stops here.
> >>
> >> I have not idea what's happening here. In both cases I would expect the test
> >> to have exited after the GPU hang (or at least attempt to exit!), since it
> >> would detect it overran the timeout.
> >>
> >> Could it be stuck in gem_sync after the reset? Or somewhere else?
> >
> > I think it's that we will be throwing the calibration off if it hangs.
> > If busy_ns = 10s, won't that generate a target idle time of 500s?
>
> Indeed, well spotted. I'll need to add a hang detector of some sort.
Oh, I think I know why it's hanging. As the buffer will be idle, the
kernel is allowed to move it, and __submit_spin_batch() doesn't tell the
kernel to preserve the original address (so the kernel assumes that the
relocations are relative to the passed in address and so move the buffer
to match). I should have noticed that before given the discussion around
EXEC_OBJECT_PINNED for the spinner.
I think there's an easy enough patch...
-Chris
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 25+ messages in thread
end of thread, other threads:[~2018-02-19 11:04 UTC | newest]
Thread overview: 25+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-02-15 11:53 [PATCH i-g-t] tests/perf_pmu: Verify engine busyness accuracy Tvrtko Ursulin
2018-02-15 11:53 ` [igt-dev] " Tvrtko Ursulin
2018-02-15 12:43 ` Chris Wilson
2018-02-15 12:43 ` [Intel-gfx] " Chris Wilson
2018-02-15 15:34 ` [PATCH i-g-t v6] " Tvrtko Ursulin
2018-02-15 15:34 ` [igt-dev] " Tvrtko Ursulin
2018-02-17 11:36 ` Chris Wilson
2018-02-17 11:36 ` Chris Wilson
2018-02-19 9:19 ` Tvrtko Ursulin
2018-02-19 9:19 ` [igt-dev] [Intel-gfx] " Tvrtko Ursulin
2018-02-19 9:27 ` [igt-dev] " Chris Wilson
2018-02-19 9:27 ` [igt-dev] [Intel-gfx] " Chris Wilson
2018-02-19 9:57 ` [igt-dev] " Tvrtko Ursulin
2018-02-19 9:57 ` [igt-dev] [Intel-gfx] " Tvrtko Ursulin
2018-02-19 10:26 ` [igt-dev] " Chris Wilson
2018-02-19 10:26 ` [igt-dev] [Intel-gfx] " Chris Wilson
2018-02-19 10:58 ` [igt-dev] " Tvrtko Ursulin
2018-02-19 10:58 ` [Intel-gfx] " Tvrtko Ursulin
2018-02-19 11:04 ` Chris Wilson
2018-02-19 11:04 ` [igt-dev] [Intel-gfx] " Chris Wilson
2018-02-15 15:07 ` [igt-dev] ✗ Fi.CI.BAT: failure for tests/perf_pmu: Verify engine busyness accuracy (rev2) Patchwork
2018-02-15 17:20 ` [igt-dev] ✗ Fi.CI.BAT: warning for tests/perf_pmu: Verify engine busyness accuracy (rev3) Patchwork
2018-02-16 12:50 ` [igt-dev] ✗ Fi.CI.BAT: failure " Patchwork
2018-02-16 13:27 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
2018-02-16 15:37 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
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