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From: laurentiu.tudor at nxp.com <laurentiu.tudor@nxp.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v8 6/8] armv8: ls1046a: add icid setup for qman portals
Date: Thu,  9 Aug 2018 15:19:47 +0300	[thread overview]
Message-ID: <20180809121949.17305-7-laurentiu.tudor@nxp.com> (raw)
In-Reply-To: <20180809121949.17305-1-laurentiu.tudor@nxp.com>

From: Laurentiu Tudor <laurentiu.tudor@nxp.com>

Add support for ICID setting of qman portals and the required device
tree fixups. Also fix an endiness issue in portal setup code.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
---
 .../arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 16 +++++++
 .../asm/arch-fsl-layerscape/fsl_portals.h     | 24 +++++++++++
 drivers/misc/fsl_portals.c                    | 43 +++++++++++++++++--
 3 files changed, 79 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
index 1c528ab751..80e1ceadc0 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
@@ -6,6 +6,22 @@
 #include <common.h>
 #include <asm/arch-fsl-layerscape/immap_lsch2.h>
 #include <asm/arch-fsl-layerscape/fsl_icid.h>
+#include <asm/arch-fsl-layerscape/fsl_portals.h>
+
+#ifdef CONFIG_SYS_DPAA_QBMAN
+struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
+	SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+	SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+	SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+	SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+	SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+	SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+	SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+	SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+	SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+	SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+};
+#endif
 
 struct icid_id_table icid_tbl[] = {
 #ifdef CONFIG_SYS_DPAA_QBMAN
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h
new file mode 100644
index 0000000000..1577e935a6
--- /dev/null
+++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2018 NXP
+ */
+
+#ifndef _FSL_PORTALS_H_
+#define _FSL_PORTALS_H_
+
+struct qportal_info {
+	u16	dicid;	/* DQRR ICID */
+	u16	ficid;	/* frame data ICID */
+	u16	icid;
+	u8	sdest;
+};
+
+#define SET_QP_INFO(streamid, dest) \
+	{ .dicid = (streamid), .ficid = (streamid), .icid = (streamid), \
+	.sdest = (dest) }
+
+extern struct qportal_info qp_info[];
+void fdt_portal(void *blob, const char *compat, const char *container,
+		u64 addr, u32 size);
+
+#endif
diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c
index 22faf16751..d3137680ad 100644
--- a/drivers/misc/fsl_portals.c
+++ b/drivers/misc/fsl_portals.c
@@ -13,6 +13,9 @@
 #ifdef CONFIG_PPC
 #include <asm/fsl_portals.h>
 #include <asm/fsl_liodn.h>
+#else
+#include <asm/arch-fsl-layerscape/fsl_portals.h>
+#include <asm/arch-fsl-layerscape/fsl_icid.h>
 #endif
 #include <fsl_qbman.h>
 
@@ -45,6 +48,22 @@ void setup_qbman_portals(void)
 		/* set frame liodn */
 		out_be32(&qman->qcsp[i].qcsp_io_cfg, (sdest << 16) | fliodn);
 	}
+#else
+#ifdef CONFIG_ARCH_LS1046A
+	int i;
+
+	for (i = 0; i < CONFIG_SYS_QMAN_NUM_PORTALS; i++) {
+		u8 sdest = qp_info[i].sdest;
+		u16 ficid = qp_info[i].ficid;
+		u16 dicid = qp_info[i].dicid;
+		u16 icid = qp_info[i].icid;
+
+		out_be32(&qman->qcsp[i].qcsp_lio_cfg, (icid << 16) |
+					dicid);
+		/* set frame icid */
+		out_be32(&qman->qcsp[i].qcsp_io_cfg, (sdest << 16) | ficid);
+	}
+#endif
 #endif
 
 	/* Change default state of BMan ISDR portals to all 1s */
@@ -178,6 +197,10 @@ void fdt_fixup_qportals(void *blob)
 	char compat[64];
 	int compat_len;
 
+#ifdef CONFIG_ARCH_LS1046A
+	int smmu_ph = fdt_get_smmu_phandle(blob);
+#endif
+
 	maj = (rev_1 >> 8) & 0xff;
 	min = rev_1 & 0xff;
 	ip_cfg = rev_2 & 0xff;
@@ -188,7 +211,7 @@ void fdt_fixup_qportals(void *blob)
 
 	off = fdt_node_offset_by_compatible(blob, -1, "fsl,qman-portal");
 	while (off != -FDT_ERR_NOTFOUND) {
-#ifdef CONFIG_PPC
+#if defined(CONFIG_PPC) || defined(CONFIG_ARCH_LS1046A)
 #ifdef CONFIG_FSL_CORENET
 		u32 liodns[2];
 #endif
@@ -198,12 +221,12 @@ void fdt_fixup_qportals(void *blob)
 		if (!ci)
 			goto err;
 
-		i = *ci;
-#ifdef CONFIG_SYS_DPAA_FMAN
+		i = fdt32_to_cpu(*ci);
+#if defined(CONFIG_SYS_DPAA_FMAN) && defined(CONFIG_PPC)
 		int j;
 #endif
 
-#endif /* CONFIG_PPC */
+#endif /* CONFIG_PPC || CONFIG_ARCH_LS1046A */
 		err = fdt_setprop(blob, off, "compatible", compat, compat_len);
 		if (err < 0)
 			goto err;
@@ -251,6 +274,18 @@ void fdt_fixup_qportals(void *blob)
 		if (err < 0)
 			goto err;
 #endif
+#else
+#ifdef CONFIG_ARCH_LS1046A
+		if (smmu_ph >= 0) {
+			u32 icids[3];
+
+			icids[0] = qp_info[i].icid;
+			icids[1] = qp_info[i].dicid;
+			icids[2] = qp_info[i].ficid;
+
+			fdt_set_iommu_prop(blob, off, smmu_ph, icids, 3);
+		}
+#endif
 #endif /* CONFIG_PPC */
 
 err:
-- 
2.17.1

  parent reply	other threads:[~2018-08-09 12:19 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-09 12:19 [U-Boot] [PATCH v8 0/8] NXP LS1046A SMMU enabling patches laurentiu.tudor at nxp.com
2018-08-09 12:19 ` [U-Boot] [PATCH v8 1/8] armv8: fsl-layerscape: add missing register blocks base address defines laurentiu.tudor at nxp.com
2018-08-13 16:31   ` York Sun
2018-08-09 12:19 ` [U-Boot] [PATCH v8 2/8] armv8: ls1046a: advertise QMan v3 in configuration laurentiu.tudor at nxp.com
2018-08-09 12:19 ` [U-Boot] [PATCH v8 3/8] misc: fsl_portals: setup QMAN_BAR{E} also on ARM platforms laurentiu.tudor at nxp.com
2018-08-09 12:19 ` [U-Boot] [PATCH v8 4/8] armv8: fsl-layerscape: add missing debug stream ID laurentiu.tudor at nxp.com
2018-08-09 12:19 ` [U-Boot] [PATCH v8 5/8] armv8: ls1046a: initial icid setup support laurentiu.tudor at nxp.com
2018-08-09 12:19 ` laurentiu.tudor at nxp.com [this message]
2018-08-09 12:19 ` [U-Boot] [PATCH v8 7/8] armv8: ls1046a: setup fman ports ICIDs and device tree laurentiu.tudor at nxp.com
2018-08-09 12:19 ` [U-Boot] [PATCH v8 8/8] armv8: ls1046a: setup SEC ICIDs and fix up " laurentiu.tudor at nxp.com

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