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* [PATCH v2 0/6] Implement HDCP2.2: PART-I
@ 2018-10-29  9:45 Ramalingam C
  2018-10-29  9:45 ` [PATCH v2 1/6] drm/i915: wrapping all hdcp var into intel_hdcp Ramalingam C
                   ` (8 more replies)
  0 siblings, 9 replies; 14+ messages in thread
From: Ramalingam C @ 2018-10-29  9:45 UTC (permalink / raw)
  To: intel-gfx, dri-devel, seanpaul, daniel.vetter

This series defines the HDCP2.2 authentication messages at drm header
along with intel specific HDCP2.2 registers. And introduces a
structure intel_hdcp to wrap all hdcp related variables into it.

Out of these patches 4 were previously reviewed at
https://patchwork.freedesktop.org/series/38254/

Second and third patches are doing some cleanup on HDCP1.4.

Ramalingam C (6):
  drm/i915: wrapping all hdcp var into intel_hdcp
  drm/i915: Reassigning log level for HDCP failures
  drm/i915: Cancel the Link check before disable
  drm: hdcp2.2 authentication msg definitions
  drm: HDMI and DP specific HDCP2.2 defines
  drm/i915: Define Intel HDCP2.2 registers

 drivers/gpu/drm/i915/i915_debugfs.c  |   2 +-
 drivers/gpu/drm/i915/i915_reg.h      |  32 ++++++
 drivers/gpu/drm/i915/intel_display.c |   6 +-
 drivers/gpu/drm/i915/intel_drv.h     |  15 ++-
 drivers/gpu/drm/i915/intel_hdcp.c    | 127 +++++++++++----------
 include/drm/drm_dp_helper.h          |  51 +++++++++
 include/drm/drm_hdcp.h               | 212 +++++++++++++++++++++++++++++++++++
 7 files changed, 378 insertions(+), 67 deletions(-)

-- 
2.7.4

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 14+ messages in thread
* [PATCH v2 1/6] drm/i915: wrapping all hdcp var into intel_hdcp
  2018-10-29  9:45 [PATCH v2 0/6] Implement HDCP2.2: PART-I Ramalingam C
@ 2018-10-29  9:45 ` Ramalingam C
  2018-10-29  9:45 ` [PATCH v2 2/6] drm/i915: Reassigning log level for HDCP failures Ramalingam C
                   ` (7 subsequent siblings)
  8 siblings, 0 replies; 14+ messages in thread
From: Ramalingam C @ 2018-10-29  9:45 UTC (permalink / raw)
  To: intel-gfx, dri-devel, seanpaul, daniel.vetter

Considering significant number of HDCP specific variables, it will
be clean to have separate struct for HDCP.

New structure called intel_hdcp is added within intel_connector.

v2:
  struct hdcp statically allocated. [Sean Paul]
  enable and disable function parameters are retained.[Sean Paul]
v3:
  No Changes.
v4:
  Commit msg is rephrased [Uma]
v5:
  Comment for mutex definition.
v6:
  hdcp_ prefix from all intel_hdcp members are removed [Sean Paul]
  inline function intel_hdcp_to_connector is defined [Sean Paul]
v7:
  %s/uint64_t/u64
v8:
  Rebased

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c  |   2 +-
 drivers/gpu/drm/i915/intel_display.c |   6 +-
 drivers/gpu/drm/i915/intel_drv.h     |  15 +++--
 drivers/gpu/drm/i915/intel_hdcp.c    | 109 +++++++++++++++++++----------------
 4 files changed, 74 insertions(+), 58 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 5cadfcd03ea9..041319d48ca3 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -4986,7 +4986,7 @@ static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data)
 		return -ENODEV;
 
 	/* HDCP is supported by connector */
-	if (!intel_connector->hdcp_shim)
+	if (!intel_connector->hdcp.shim)
 		return -EINVAL;
 
 	seq_printf(m, "%s:%d HDCP version: ", connector->name,
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index fe045abb6472..0aabc4b9854a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15776,9 +15776,9 @@ static void intel_hpd_poll_fini(struct drm_device *dev)
 	for_each_intel_connector_iter(connector, &conn_iter) {
 		if (connector->modeset_retry_work.func)
 			cancel_work_sync(&connector->modeset_retry_work);
-		if (connector->hdcp_shim) {
-			cancel_delayed_work_sync(&connector->hdcp_check_work);
-			cancel_work_sync(&connector->hdcp_prop_work);
+		if (connector->hdcp.shim) {
+			cancel_delayed_work_sync(&connector->hdcp.check_work);
+			cancel_work_sync(&connector->hdcp.prop_work);
 		}
 	}
 	drm_connector_list_iter_end(&conn_iter);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index db24308729b4..268afb6d2746 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -381,6 +381,15 @@ struct intel_hdcp_shim {
 			    bool *hdcp_capable);
 };
 
+struct intel_hdcp {
+	const struct intel_hdcp_shim *shim;
+	/* Mutex for hdcp state of the connector */
+	struct mutex mutex;
+	u64 value;
+	struct delayed_work check_work;
+	struct work_struct prop_work;
+};
+
 struct intel_connector {
 	struct drm_connector base;
 	/*
@@ -413,11 +422,7 @@ struct intel_connector {
 	/* Work struct to schedule a uevent on link train failure */
 	struct work_struct modeset_retry_work;
 
-	const struct intel_hdcp_shim *hdcp_shim;
-	struct mutex hdcp_mutex;
-	uint64_t hdcp_value; /* protected by hdcp_mutex */
-	struct delayed_work hdcp_check_work;
-	struct work_struct hdcp_prop_work;
+	struct intel_hdcp hdcp;
 };
 
 struct intel_digital_connector_state {
diff --git a/drivers/gpu/drm/i915/intel_hdcp.c b/drivers/gpu/drm/i915/intel_hdcp.c
index 5b423a78518d..26daf54ffde9 100644
--- a/drivers/gpu/drm/i915/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/intel_hdcp.c
@@ -55,7 +55,7 @@ int intel_hdcp_read_valid_bksv(struct intel_digital_port *intel_dig_port,
 bool intel_hdcp_capable(struct intel_connector *connector)
 {
 	struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
-	const struct intel_hdcp_shim *shim = connector->hdcp_shim;
+	const struct intel_hdcp_shim *shim = connector->hdcp.shim;
 	bool capable = false;
 	u8 bksv[5];
 
@@ -655,6 +655,7 @@ static int intel_hdcp_auth(struct intel_digital_port *intel_dig_port,
 
 static int _intel_hdcp_disable(struct intel_connector *connector)
 {
+	struct intel_hdcp *hdcp = &connector->hdcp;
 	struct drm_i915_private *dev_priv = connector->base.dev->dev_private;
 	struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
 	enum port port = intel_dig_port->base.port;
@@ -670,7 +671,7 @@ static int _intel_hdcp_disable(struct intel_connector *connector)
 		return -ETIMEDOUT;
 	}
 
-	ret = connector->hdcp_shim->toggle_signalling(intel_dig_port, false);
+	ret = hdcp->shim->toggle_signalling(intel_dig_port, false);
 	if (ret) {
 		DRM_ERROR("Failed to disable HDCP signalling\n");
 		return ret;
@@ -682,6 +683,7 @@ static int _intel_hdcp_disable(struct intel_connector *connector)
 
 static int _intel_hdcp_enable(struct intel_connector *connector)
 {
+	struct intel_hdcp *hdcp = &connector->hdcp;
 	struct drm_i915_private *dev_priv = connector->base.dev->dev_private;
 	int i, ret, tries = 3;
 
@@ -706,8 +708,7 @@ static int _intel_hdcp_enable(struct intel_connector *connector)
 
 	/* Incase of authentication failures, HDCP spec expects reauth. */
 	for (i = 0; i < tries; i++) {
-		ret = intel_hdcp_auth(conn_to_dig_port(connector),
-				      connector->hdcp_shim);
+		ret = intel_hdcp_auth(conn_to_dig_port(connector), hdcp->shim);
 		if (!ret)
 			return 0;
 
@@ -721,38 +722,46 @@ static int _intel_hdcp_enable(struct intel_connector *connector)
 	return ret;
 }
 
+static inline
+struct intel_connector *intel_hdcp_to_connector(struct intel_hdcp *hdcp)
+{
+	return container_of(hdcp, struct intel_connector, hdcp);
+}
+
 static void intel_hdcp_check_work(struct work_struct *work)
 {
-	struct intel_connector *connector = container_of(to_delayed_work(work),
-							 struct intel_connector,
-							 hdcp_check_work);
+	struct intel_hdcp *hdcp = container_of(to_delayed_work(work),
+					       struct intel_hdcp,
+					       check_work);
+	struct intel_connector *connector = intel_hdcp_to_connector(hdcp);
+
 	if (!intel_hdcp_check_link(connector))
-		schedule_delayed_work(&connector->hdcp_check_work,
+		schedule_delayed_work(&hdcp->check_work,
 				      DRM_HDCP_CHECK_PERIOD_MS);
 }
 
 static void intel_hdcp_prop_work(struct work_struct *work)
 {
-	struct intel_connector *connector = container_of(work,
-							 struct intel_connector,
-							 hdcp_prop_work);
+	struct intel_hdcp *hdcp = container_of(work, struct intel_hdcp,
+					       prop_work);
+	struct intel_connector *connector = intel_hdcp_to_connector(hdcp);
 	struct drm_device *dev = connector->base.dev;
 	struct drm_connector_state *state;
 
 	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
-	mutex_lock(&connector->hdcp_mutex);
+	mutex_lock(&hdcp->mutex);
 
 	/*
 	 * This worker is only used to flip between ENABLED/DESIRED. Either of
-	 * those to UNDESIRED is handled by core. If hdcp_value == UNDESIRED,
+	 * those to UNDESIRED is handled by core. If value == UNDESIRED,
 	 * we're running just after hdcp has been disabled, so just exit
 	 */
-	if (connector->hdcp_value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
+	if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
 		state = connector->base.state;
-		state->content_protection = connector->hdcp_value;
+		state->content_protection = hdcp->value;
 	}
 
-	mutex_unlock(&connector->hdcp_mutex);
+	mutex_unlock(&hdcp->mutex);
 	drm_modeset_unlock(&dev->mode_config.connection_mutex);
 }
 
@@ -764,8 +773,9 @@ bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port)
 }
 
 int intel_hdcp_init(struct intel_connector *connector,
-		    const struct intel_hdcp_shim *hdcp_shim)
+		    const struct intel_hdcp_shim *shim)
 {
+	struct intel_hdcp *hdcp = &connector->hdcp;
 	int ret;
 
 	ret = drm_connector_attach_content_protection_property(
@@ -773,51 +783,53 @@ int intel_hdcp_init(struct intel_connector *connector,
 	if (ret)
 		return ret;
 
-	connector->hdcp_shim = hdcp_shim;
-	mutex_init(&connector->hdcp_mutex);
-	INIT_DELAYED_WORK(&connector->hdcp_check_work, intel_hdcp_check_work);
-	INIT_WORK(&connector->hdcp_prop_work, intel_hdcp_prop_work);
+	hdcp->shim = shim;
+	mutex_init(&hdcp->mutex);
+	INIT_DELAYED_WORK(&hdcp->check_work, intel_hdcp_check_work);
+	INIT_WORK(&hdcp->prop_work, intel_hdcp_prop_work);
 	return 0;
 }
 
 int intel_hdcp_enable(struct intel_connector *connector)
 {
+	struct intel_hdcp *hdcp = &connector->hdcp;
 	int ret;
 
-	if (!connector->hdcp_shim)
+	if (!hdcp->shim)
 		return -ENOENT;
 
-	mutex_lock(&connector->hdcp_mutex);
+	mutex_lock(&hdcp->mutex);
 
 	ret = _intel_hdcp_enable(connector);
 	if (ret)
 		goto out;
 
-	connector->hdcp_value = DRM_MODE_CONTENT_PROTECTION_ENABLED;
-	schedule_work(&connector->hdcp_prop_work);
-	schedule_delayed_work(&connector->hdcp_check_work,
+	hdcp->value = DRM_MODE_CONTENT_PROTECTION_ENABLED;
+	schedule_work(&hdcp->prop_work);
+	schedule_delayed_work(&hdcp->check_work,
 			      DRM_HDCP_CHECK_PERIOD_MS);
 out:
-	mutex_unlock(&connector->hdcp_mutex);
+	mutex_unlock(&hdcp->mutex);
 	return ret;
 }
 
 int intel_hdcp_disable(struct intel_connector *connector)
 {
+	struct intel_hdcp *hdcp = &connector->hdcp;
 	int ret = 0;
 
-	if (!connector->hdcp_shim)
+	if (!hdcp->shim)
 		return -ENOENT;
 
-	mutex_lock(&connector->hdcp_mutex);
+	mutex_lock(&hdcp->mutex);
 
-	if (connector->hdcp_value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
-		connector->hdcp_value = DRM_MODE_CONTENT_PROTECTION_UNDESIRED;
+	if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
+		hdcp->value = DRM_MODE_CONTENT_PROTECTION_UNDESIRED;
 		ret = _intel_hdcp_disable(connector);
 	}
 
-	mutex_unlock(&connector->hdcp_mutex);
-	cancel_delayed_work_sync(&connector->hdcp_check_work);
+	mutex_unlock(&hdcp->mutex);
+	cancel_delayed_work_sync(&hdcp->check_work);
 	return ret;
 }
 
@@ -857,17 +869,18 @@ void intel_hdcp_atomic_check(struct drm_connector *connector,
 /* Implements Part 3 of the HDCP authorization procedure */
 int intel_hdcp_check_link(struct intel_connector *connector)
 {
+	struct intel_hdcp *hdcp = &connector->hdcp;
 	struct drm_i915_private *dev_priv = connector->base.dev->dev_private;
 	struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
 	enum port port = intel_dig_port->base.port;
 	int ret = 0;
 
-	if (!connector->hdcp_shim)
+	if (!hdcp->shim)
 		return -ENOENT;
 
-	mutex_lock(&connector->hdcp_mutex);
+	mutex_lock(&hdcp->mutex);
 
-	if (connector->hdcp_value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
+	if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
 		goto out;
 
 	if (!(I915_READ(PORT_HDCP_STATUS(port)) & HDCP_STATUS_ENC)) {
@@ -875,17 +888,15 @@ int intel_hdcp_check_link(struct intel_connector *connector)
 			  connector->base.name, connector->base.base.id,
 			  I915_READ(PORT_HDCP_STATUS(port)));
 		ret = -ENXIO;
-		connector->hdcp_value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
-		schedule_work(&connector->hdcp_prop_work);
+		hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
+		schedule_work(&hdcp->prop_work);
 		goto out;
 	}
 
-	if (connector->hdcp_shim->check_link(intel_dig_port)) {
-		if (connector->hdcp_value !=
-		    DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
-			connector->hdcp_value =
-				DRM_MODE_CONTENT_PROTECTION_ENABLED;
-			schedule_work(&connector->hdcp_prop_work);
+	if (hdcp->shim->check_link(intel_dig_port)) {
+		if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
+			hdcp->value = DRM_MODE_CONTENT_PROTECTION_ENABLED;
+			schedule_work(&hdcp->prop_work);
 		}
 		goto out;
 	}
@@ -896,20 +907,20 @@ int intel_hdcp_check_link(struct intel_connector *connector)
 	ret = _intel_hdcp_disable(connector);
 	if (ret) {
 		DRM_ERROR("Failed to disable hdcp (%d)\n", ret);
-		connector->hdcp_value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
-		schedule_work(&connector->hdcp_prop_work);
+		hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
+		schedule_work(&hdcp->prop_work);
 		goto out;
 	}
 
 	ret = _intel_hdcp_enable(connector);
 	if (ret) {
 		DRM_ERROR("Failed to enable hdcp (%d)\n", ret);
-		connector->hdcp_value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
-		schedule_work(&connector->hdcp_prop_work);
+		hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
+		schedule_work(&hdcp->prop_work);
 		goto out;
 	}
 
 out:
-	mutex_unlock(&connector->hdcp_mutex);
+	mutex_unlock(&hdcp->mutex);
 	return ret;
 }
-- 
2.7.4

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply related	[flat|nested] 14+ messages in thread
* [PATCH v2 2/6] drm/i915: Reassigning log level for HDCP failures
  2018-10-29  9:45 [PATCH v2 0/6] Implement HDCP2.2: PART-I Ramalingam C
  2018-10-29  9:45 ` [PATCH v2 1/6] drm/i915: wrapping all hdcp var into intel_hdcp Ramalingam C
@ 2018-10-29  9:45 ` Ramalingam C
  2018-10-29  9:45 ` [PATCH v2 3/6] drm/i915: Cancel the Link check before disable Ramalingam C
                   ` (6 subsequent siblings)
  8 siblings, 0 replies; 14+ messages in thread
From: Ramalingam C @ 2018-10-29  9:45 UTC (permalink / raw)
  To: intel-gfx, dri-devel, seanpaul, daniel.vetter

As a policy, this change considers all I915 programming failures and
HW failures as ERRORS. Where as all HDCP failures due to the sink is
considered as DEBUG logs.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 drivers/gpu/drm/i915/intel_hdcp.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_hdcp.c b/drivers/gpu/drm/i915/intel_hdcp.c
index 26daf54ffde9..1bf487f94254 100644
--- a/drivers/gpu/drm/i915/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/intel_hdcp.c
@@ -427,7 +427,7 @@ int intel_hdcp_validate_v_prime(struct intel_digital_port *intel_dig_port,
 	if (intel_wait_for_register(dev_priv, HDCP_REP_CTL,
 				    HDCP_SHA1_COMPLETE,
 				    HDCP_SHA1_COMPLETE, 1)) {
-		DRM_DEBUG_KMS("Timed out waiting for SHA1 complete\n");
+		DRM_ERROR("Timed out waiting for SHA1 complete\n");
 		return -ETIMEDOUT;
 	}
 	if (!(I915_READ(HDCP_REP_CTL) & HDCP_SHA1_V_MATCH)) {
@@ -448,7 +448,7 @@ int intel_hdcp_auth_downstream(struct intel_digital_port *intel_dig_port,
 
 	ret = intel_hdcp_poll_ksv_fifo(intel_dig_port, shim);
 	if (ret) {
-		DRM_ERROR("KSV list failed to become ready (%d)\n", ret);
+		DRM_DEBUG_KMS("KSV list failed to become ready (%d)\n", ret);
 		return ret;
 	}
 
@@ -458,7 +458,7 @@ int intel_hdcp_auth_downstream(struct intel_digital_port *intel_dig_port,
 
 	if (DRM_HDCP_MAX_DEVICE_EXCEEDED(bstatus[0]) ||
 	    DRM_HDCP_MAX_CASCADE_EXCEEDED(bstatus[1])) {
-		DRM_ERROR("Max Topology Limit Exceeded\n");
+		DRM_DEBUG_KMS("Max Topology Limit Exceeded\n");
 		return -EPERM;
 	}
 
@@ -494,7 +494,7 @@ int intel_hdcp_auth_downstream(struct intel_digital_port *intel_dig_port,
 	}
 
 	if (i == tries) {
-		DRM_ERROR("V Prime validation failed.(%d)\n", ret);
+		DRM_DEBUG_KMS("V Prime validation failed.(%d)\n", ret);
 		goto err;
 	}
 
@@ -543,7 +543,7 @@ static int intel_hdcp_auth(struct intel_digital_port *intel_dig_port,
 		if (ret)
 			return ret;
 		if (!hdcp_capable) {
-			DRM_ERROR("Panel is not HDCP capable\n");
+			DRM_DEBUG_KMS("Panel is not HDCP capable\n");
 			return -EINVAL;
 		}
 	}
@@ -629,8 +629,8 @@ static int intel_hdcp_auth(struct intel_digital_port *intel_dig_port,
 	}
 
 	if (i == tries) {
-		DRM_ERROR("Timed out waiting for Ri prime match (%x)\n",
-			  I915_READ(PORT_HDCP_STATUS(port)));
+		DRM_DEBUG_KMS("Timed out waiting for Ri prime match (%x)\n",
+			      I915_READ(PORT_HDCP_STATUS(port)));
 		return -ETIMEDOUT;
 	}
 
@@ -718,7 +718,7 @@ static int _intel_hdcp_enable(struct intel_connector *connector)
 		_intel_hdcp_disable(connector);
 	}
 
-	DRM_ERROR("HDCP authentication failed (%d tries/%d)\n", tries, ret);
+	DRM_DEBUG_KMS("HDCP authentication failed (%d tries/%d)\n", tries, ret);
 	return ret;
 }
 
@@ -914,7 +914,7 @@ int intel_hdcp_check_link(struct intel_connector *connector)
 
 	ret = _intel_hdcp_enable(connector);
 	if (ret) {
-		DRM_ERROR("Failed to enable hdcp (%d)\n", ret);
+		DRM_DEBUG_KMS("Failed to enable hdcp (%d)\n", ret);
 		hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
 		schedule_work(&hdcp->prop_work);
 		goto out;
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 14+ messages in thread
* [PATCH v2 3/6] drm/i915: Cancel the Link check before disable
  2018-10-29  9:45 [PATCH v2 0/6] Implement HDCP2.2: PART-I Ramalingam C
  2018-10-29  9:45 ` [PATCH v2 1/6] drm/i915: wrapping all hdcp var into intel_hdcp Ramalingam C
  2018-10-29  9:45 ` [PATCH v2 2/6] drm/i915: Reassigning log level for HDCP failures Ramalingam C
@ 2018-10-29  9:45 ` Ramalingam C
  2018-10-29 15:18   ` Daniel Vetter
  2018-10-29  9:45 ` [PATCH v2 4/6] drm: hdcp2.2 authentication msg definitions Ramalingam C
                   ` (5 subsequent siblings)
  8 siblings, 1 reply; 14+ messages in thread
From: Ramalingam C @ 2018-10-29  9:45 UTC (permalink / raw)
  To: intel-gfx, dri-devel, seanpaul, daniel.vetter

To avoid the execution of link integrity check when the HDCP is
already disabled, cancel the delayed work for link integrity check
before disabling the HDCP.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 drivers/gpu/drm/i915/intel_hdcp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_hdcp.c b/drivers/gpu/drm/i915/intel_hdcp.c
index 1bf487f94254..d13e4af9ac05 100644
--- a/drivers/gpu/drm/i915/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/intel_hdcp.c
@@ -821,6 +821,7 @@ int intel_hdcp_disable(struct intel_connector *connector)
 	if (!hdcp->shim)
 		return -ENOENT;
 
+	cancel_delayed_work_sync(&hdcp->check_work);
 	mutex_lock(&hdcp->mutex);
 
 	if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
@@ -829,7 +830,6 @@ int intel_hdcp_disable(struct intel_connector *connector)
 	}
 
 	mutex_unlock(&hdcp->mutex);
-	cancel_delayed_work_sync(&hdcp->check_work);
 	return ret;
 }
 
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 14+ messages in thread
* [PATCH v2 4/6] drm: hdcp2.2 authentication msg definitions
  2018-10-29  9:45 [PATCH v2 0/6] Implement HDCP2.2: PART-I Ramalingam C
                   ` (2 preceding siblings ...)
  2018-10-29  9:45 ` [PATCH v2 3/6] drm/i915: Cancel the Link check before disable Ramalingam C
@ 2018-10-29  9:45 ` Ramalingam C
  2018-10-29  9:45 ` [PATCH v2 5/6] drm: HDMI and DP specific HDCP2.2 defines Ramalingam C
                   ` (4 subsequent siblings)
  8 siblings, 0 replies; 14+ messages in thread
From: Ramalingam C @ 2018-10-29  9:45 UTC (permalink / raw)
  To: intel-gfx, dri-devel, seanpaul, daniel.vetter

This patch defines the hdcp2.2 protocol messages for authentication.

v2:
  bit_fields are removed. Instead bitmasking used. [Tomas and Jani]
  prefix HDCP_2_2_ is added to the macros. [Tomas]
v3:
  No Changes.
v4:
  Style and spellings are fixed [Uma]
v5:
  Fix for macros.
v6:
  comment for Type is improved [Sean Paul]
v7:
  %s/HDCP_2_2_LPRIME_HALF_LEN/HDCP_2_2_V_PRIME_HALF_LEN [Uma]
  %s/uintxx_t/uxx
v8:
  %s/eceiver_id/receiver_id

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 include/drm/drm_hdcp.h | 184 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 184 insertions(+)

diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
index 98e63d870139..7cd7269c7c7b 100644
--- a/include/drm/drm_hdcp.h
+++ b/include/drm/drm_hdcp.h
@@ -38,4 +38,188 @@
 #define DRM_HDCP_DDC_BSTATUS			0x41
 #define DRM_HDCP_DDC_KSV_FIFO			0x43
 
+#define DRM_HDCP_1_4_SRM_ID			0x8
+#define DRM_HDCP_1_4_VRL_LENGTH_SIZE		3
+#define DRM_HDCP_1_4_DCP_SIG_SIZE		40
+
+/* Protocol message definition for HDCP2.2 specification */
+/*
+ * Protected content streams are classified into 2 types:
+ * - Type0: Can be transmitted with HDCP 1.4+
+ * - Type1: Can be transmitted with HDCP 2.2+
+ */
+#define HDCP_STREAM_TYPE0			0x00
+#define HDCP_STREAM_TYPE1			0x01
+
+/* HDCP2.2 Msg IDs */
+#define HDCP_2_2_NULL_MSG			1
+#define HDCP_2_2_AKE_INIT			2
+#define HDCP_2_2_AKE_SEND_CERT			3
+#define HDCP_2_2_AKE_NO_STORED_KM		4
+#define HDCP_2_2_AKE_STORED_KM			5
+#define HDCP_2_2_AKE_SEND_HPRIME		7
+#define HDCP_2_2_AKE_SEND_PAIRING_INFO		8
+#define HDCP_2_2_LC_INIT			9
+#define HDCP_2_2_LC_SEND_LPRIME			10
+#define HDCP_2_2_SKE_SEND_EKS			11
+#define HDCP_2_2_REP_SEND_RECVID_LIST		12
+#define HDCP_2_2_REP_SEND_ACK			15
+#define HDCP_2_2_REP_STREAM_MANAGE		16
+#define HDCP_2_2_REP_STREAM_READY		17
+#define HDCP_2_2_ERRATA_DP_STREAM_TYPE		50
+
+#define HDCP_2_2_RTX_LEN			8
+#define HDCP_2_2_RRX_LEN			8
+
+#define HDCP_2_2_K_PUB_RX_MOD_N_LEN		128
+#define HDCP_2_2_K_PUB_RX_EXP_E_LEN		3
+#define HDCP_2_2_K_PUB_RX_LEN			(HDCP_2_2_K_PUB_RX_MOD_N_LEN + \
+						 HDCP_2_2_K_PUB_RX_EXP_E_LEN)
+
+#define HDCP_2_2_DCP_LLC_SIG_LEN		384
+
+#define HDCP_2_2_E_KPUB_KM_LEN			128
+#define HDCP_2_2_E_KH_KM_M_LEN			(16 + 16)
+#define HDCP_2_2_H_PRIME_LEN			32
+#define HDCP_2_2_E_KH_KM_LEN			16
+#define HDCP_2_2_RN_LEN				8
+#define HDCP_2_2_L_PRIME_LEN			32
+#define HDCP_2_2_E_DKEY_KS_LEN			16
+#define HDCP_2_2_RIV_LEN			8
+#define HDCP_2_2_SEQ_NUM_LEN			3
+#define HDCP_2_2_V_PRIME_HALF_LEN		(HDCP_2_2_L_PRIME_LEN / 2)
+#define HDCP_2_2_RECEIVER_ID_LEN		DRM_HDCP_KSV_LEN
+#define HDCP_2_2_MAX_DEVICE_COUNT		31
+#define HDCP_2_2_RECEIVER_IDS_MAX_LEN		(HDCP_2_2_RECEIVER_ID_LEN * \
+						 HDCP_2_2_MAX_DEVICE_COUNT)
+#define HDCP_2_2_MPRIME_LEN			32
+
+/* Following Macros take a byte at a time for bit(s) masking */
+/*
+ * TODO: This has to be changed for DP MST, as multiple stream on
+ * same port is possible.
+ * For HDCP2.2 on HDMI and DP SST this value is always 1.
+ */
+#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT	1
+#define HDCP_2_2_TXCAP_MASK_LEN			2
+#define HDCP_2_2_RXCAPS_LEN			3
+#define HDCP_2_2_RX_REPEATER(x)			((x) & BIT(0))
+#define HDCP_2_2_DP_HDCP_CAPABLE(x)		((x) & BIT(1))
+#define HDCP_2_2_RXINFO_LEN			2
+
+/* HDCP1.x compliant device in downstream */
+#define HDCP_2_2_HDCP1_DEVICE_CONNECTED(x)	((x) & BIT(0))
+
+/* HDCP2.0 Compliant repeater in downstream */
+#define HDCP_2_2_HDCP_2_0_REP_CONNECTED(x)	((x) & BIT(1))
+#define HDCP_2_2_MAX_CASCADE_EXCEEDED(x)	((x) & BIT(2))
+#define HDCP_2_2_MAX_DEVS_EXCEEDED(x)		((x) & BIT(3))
+#define HDCP_2_2_DEV_COUNT_LO(x)		(((x) & (0xF << 4)) >> 4)
+#define HDCP_2_2_DEV_COUNT_HI(x)		((x) & BIT(0))
+#define HDCP_2_2_DEPTH(x)			(((x) & (0x7 << 1)) >> 1)
+
+struct hdcp2_cert_rx {
+	u8	receiver_id[HDCP_2_2_RECEIVER_ID_LEN];
+	u8	kpub_rx[HDCP_2_2_K_PUB_RX_LEN];
+	u8	reserved[2];
+	u8	dcp_signature[HDCP_2_2_DCP_LLC_SIG_LEN];
+} __packed;
+
+struct hdcp2_streamid_type {
+	u8	stream_id;
+	u8	stream_type;
+} __packed;
+
+/*
+ * The TxCaps field specified in the HDCP HDMI, DP specs
+ * This field is big endian as specified in the errata.
+ */
+struct hdcp2_tx_caps {
+	/* Transmitter must set this to 0x2 */
+	u8	version;
+
+	/* Reserved for HDCP and DP Spec. Read as Zero */
+	u8	tx_cap_mask[HDCP_2_2_TXCAP_MASK_LEN];
+} __packed;
+
+/* Main structures for HDCP2.2 protocol communication */
+struct hdcp2_ake_init {
+	u8			msg_id;
+	u8			r_tx[HDCP_2_2_RTX_LEN];
+	struct hdcp2_tx_caps	tx_caps;
+} __packed;
+
+struct hdcp2_ake_send_cert {
+	u8			msg_id;
+	struct hdcp2_cert_rx	cert_rx;
+	u8			r_rx[HDCP_2_2_RRX_LEN];
+	u8			rx_caps[HDCP_2_2_RXCAPS_LEN];
+} __packed;
+
+struct hdcp2_ake_no_stored_km {
+	u8	msg_id;
+	u8	e_kpub_km[HDCP_2_2_E_KPUB_KM_LEN];
+} __packed;
+
+struct hdcp2_ake_stored_km {
+	u8	msg_id;
+	u8	e_kh_km_m[HDCP_2_2_E_KH_KM_M_LEN];
+} __packed;
+
+struct hdcp2_ake_send_hprime {
+	u8	msg_id;
+	u8	h_prime[HDCP_2_2_H_PRIME_LEN];
+} __packed;
+
+struct hdcp2_ake_send_pairing_info {
+	u8	msg_id;
+	u8	e_kh_km[HDCP_2_2_E_KH_KM_LEN];
+} __packed;
+
+struct hdcp2_lc_init {
+	u8	msg_id;
+	u8	r_n[HDCP_2_2_RN_LEN];
+} __packed;
+
+struct hdcp2_lc_send_lprime {
+	u8	msg_id;
+	u8	l_prime[HDCP_2_2_L_PRIME_LEN];
+} __packed;
+
+struct hdcp2_ske_send_eks {
+	u8	msg_id;
+	u8	e_dkey_ks[HDCP_2_2_E_DKEY_KS_LEN];
+	u8	riv[HDCP_2_2_RIV_LEN];
+} __packed;
+
+struct hdcp2_rep_send_receiverid_list {
+	u8	msg_id;
+	u8	rx_info[HDCP_2_2_RXINFO_LEN];
+	u8	seq_num_v[HDCP_2_2_SEQ_NUM_LEN];
+	u8	v_prime[HDCP_2_2_V_PRIME_HALF_LEN];
+	u8	receiver_ids[HDCP_2_2_RECEIVER_IDS_MAX_LEN];
+} __packed;
+
+struct hdcp2_rep_send_ack {
+	u8	msg_id;
+	u8	v[HDCP_2_2_V_PRIME_HALF_LEN];
+} __packed;
+
+struct hdcp2_rep_stream_manage {
+	u8			msg_id;
+	u8			seq_num_m[HDCP_2_2_SEQ_NUM_LEN];
+	__be16			k;
+	struct hdcp2_streamid_type streams[HDCP_2_2_MAX_CONTENT_STREAMS_CNT];
+} __packed;
+
+struct hdcp2_rep_stream_ready {
+	u8	msg_id;
+	u8	m_prime[HDCP_2_2_MPRIME_LEN];
+} __packed;
+
+struct hdcp2_dp_errata_stream_type {
+	u8	msg_id;
+	u8	stream_type;
+} __packed;
+
 #endif
-- 
2.7.4

_______________________________________________
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply related	[flat|nested] 14+ messages in thread
* [PATCH v2 5/6] drm: HDMI and DP specific HDCP2.2 defines
  2018-10-29  9:45 [PATCH v2 0/6] Implement HDCP2.2: PART-I Ramalingam C
                   ` (3 preceding siblings ...)
  2018-10-29  9:45 ` [PATCH v2 4/6] drm: hdcp2.2 authentication msg definitions Ramalingam C
@ 2018-10-29  9:45 ` Ramalingam C
  2018-10-29  9:45 ` [PATCH v2 6/6] drm/i915: Define Intel HDCP2.2 registers Ramalingam C
                   ` (3 subsequent siblings)
  8 siblings, 0 replies; 14+ messages in thread
From: Ramalingam C @ 2018-10-29  9:45 UTC (permalink / raw)
  To: intel-gfx, dri-devel, seanpaul, daniel.vetter

This patch adds HDCP register definitions for HDMI and DP HDCP
adaptations.

HDMI specific HDCP2.2 register definitions are added into drm_hdcp.h,
where as HDCP2.2 register offsets in DPCD offsets are defined at
drm_dp_helper.h.

v2:
  bit_field definitions are replaced by macros. [Tomas and Jani]
v3:
  No Changes.
v4:
  Comments style and typos are fixed [Uma]
v5:
  Fix for macros.
v6:
  Adds _MS to the timeouts to represent units [Sean Paul]
v7:
  Macro DP_HDCP_2_2_REG_EKH_KM_OFFSET renamed [Uma]
  Redundant macro is removed [Uma]

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
---
 include/drm/drm_dp_helper.h | 51 +++++++++++++++++++++++++++++++++++++++++++++
 include/drm/drm_hdcp.h      | 28 +++++++++++++++++++++++++
 2 files changed, 79 insertions(+)

diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 9ad98e8d9ede..4c714134a83b 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -907,6 +907,57 @@
 #define DP_AUX_HDCP_KSV_FIFO		0x6802C
 #define DP_AUX_HDCP_AINFO		0x6803B
 
+/* DP HDCP2.2 parameter offsets in DPCD address space */
+#define DP_HDCP_2_2_REG_RTX_OFFSET		0x69000
+#define DP_HDCP_2_2_REG_TXCAPS_OFFSET		0x69008
+#define DP_HDCP_2_2_REG_CERT_RX_OFFSET		0x6900B
+#define DP_HDCP_2_2_REG_RRX_OFFSET		0x69215
+#define DP_HDCP_2_2_REG_RX_CAPS_OFFSET		0x6921D
+#define DP_HDCP_2_2_REG_EKPUB_KM_OFFSET		0x69220
+#define DP_HDCP_2_2_REG_EKH_KM_WR_OFFSET	0x692A0
+#define DP_HDCP_2_2_REG_M_OFFSET		0x692B0
+#define DP_HDCP_2_2_REG_HPRIME_OFFSET		0x692C0
+#define DP_HDCP_2_2_REG_EKH_KM_RD_OFFSET	0x692E0
+#define DP_HDCP_2_2_REG_RN_OFFSET		0x692F0
+#define DP_HDCP_2_2_REG_LPRIME_OFFSET		0x692F8
+#define DP_HDCP_2_2_REG_EDKEY_KS_OFFSET		0x69318
+#define	DP_HDCP_2_2_REG_RIV_OFFSET		0x69328
+#define DP_HDCP_2_2_REG_RXINFO_OFFSET		0x69330
+#define DP_HDCP_2_2_REG_SEQ_NUM_V_OFFSET	0x69332
+#define DP_HDCP_2_2_REG_VPRIME_OFFSET		0x69335
+#define DP_HDCP_2_2_REG_RECV_ID_LIST_OFFSET	0x69345
+#define DP_HDCP_2_2_REG_V_OFFSET		0x693E0
+#define DP_HDCP_2_2_REG_SEQ_NUM_M_OFFSET	0x693F0
+#define DP_HDCP_2_2_REG_K_OFFSET		0x693F3
+#define DP_HDCP_2_2_REG_STREAM_ID_TYPE_OFFSET	0x693F5
+#define DP_HDCP_2_2_REG_MPRIME_OFFSET		0x69473
+#define DP_HDCP_2_2_REG_RXSTATUS_OFFSET		0x69493
+#define DP_HDCP_2_2_REG_STREAM_TYPE_OFFSET	0x69494
+#define DP_HDCP_2_2_REG_DBG_OFFSET		0x69518
+
+/* DP HDCP message start offsets in DPCD address space */
+#define DP_HDCP_2_2_AKE_INIT_OFFSET		DP_HDCP_2_2_REG_RTX_OFFSET
+#define DP_HDCP_2_2_AKE_SEND_CERT_OFFSET	DP_HDCP_2_2_REG_CERT_RX_OFFSET
+#define DP_HDCP_2_2_AKE_NO_STORED_KM_OFFSET	DP_HDCP_2_2_REG_EKPUB_KM_OFFSET
+#define DP_HDCP_2_2_AKE_STORED_KM_OFFSET	DP_HDCP_2_2_REG_EKH_KM_WR_OFFSET
+#define DP_HDCP_2_2_AKE_SEND_HPRIME_OFFSET	DP_HDCP_2_2_REG_HPRIME_OFFSET
+#define DP_HDCP_2_2_AKE_SEND_PAIRING_INFO_OFFSET \
+						DP_HDCP_2_2_REG_EKH_KM_RD_OFFSET
+#define DP_HDCP_2_2_LC_INIT_OFFSET		DP_HDCP_2_2_REG_RN_OFFSET
+#define DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET	DP_HDCP_2_2_REG_LPRIME_OFFSET
+#define DP_HDCP_2_2_SKE_SEND_EKS_OFFSET		DP_HDCP_2_2_REG_EDKEY_KS_OFFSET
+#define DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET	DP_HDCP_2_2_REG_RXINFO_OFFSET
+#define DP_HDCP_2_2_REP_SEND_ACK_OFFSET		DP_HDCP_2_2_REG_V_OFFSET
+#define DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET	DP_HDCP_2_2_REG_SEQ_NUM_M_OFFSET
+#define DP_HDCP_2_2_REP_STREAM_READY_OFFSET	DP_HDCP_2_2_REG_MPRIME_OFFSET
+
+#define HDCP_2_2_DP_RXSTATUS_LEN		1
+#define HDCP_2_2_DP_RXSTATUS_READY(x)		((x) & BIT(0))
+#define HDCP_2_2_DP_RXSTATUS_H_PRIME(x)		((x) & BIT(1))
+#define HDCP_2_2_DP_RXSTATUS_PAIRING(x)		((x) & BIT(2))
+#define HDCP_2_2_DP_RXSTATUS_REAUTH_REQ(x)	((x) & BIT(3))
+#define HDCP_2_2_DP_RXSTATUS_LINK_FAILED(x)	((x) & BIT(4))
+
 /* DP 1.2 Sideband message defines */
 /* peer device type - DP 1.2a Table 2-92 */
 #define DP_PEER_DEVICE_NONE		0x0
diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
index 7cd7269c7c7b..a6de09c5e47f 100644
--- a/include/drm/drm_hdcp.h
+++ b/include/drm/drm_hdcp.h
@@ -222,4 +222,32 @@ struct hdcp2_dp_errata_stream_type {
 	u8	stream_type;
 } __packed;
 
+/* HDCP2.2 TIMEOUTs in mSec */
+#define HDCP_2_2_CERT_TIMEOUT_MS		100
+#define HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS	1000
+#define HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS	200
+#define HDCP_2_2_PAIRING_TIMEOUT_MS		200
+#define	HDCP_2_2_HDMI_LPRIME_TIMEOUT_MS		20
+#define HDCP_2_2_DP_LPRIME_TIMEOUT_MS		7
+#define HDCP_2_2_RECVID_LIST_TIMEOUT_MS		3000
+#define HDCP_2_2_STREAM_READY_TIMEOUT_MS	100
+
+/* HDMI HDCP2.2 Register Offsets */
+#define HDCP_2_2_HDMI_REG_VER_OFFSET		0x50
+#define HDCP_2_2_HDMI_REG_WR_MSG_OFFSET		0x60
+#define HDCP_2_2_HDMI_REG_RXSTATUS_OFFSET	0x70
+#define HDCP_2_2_HDMI_REG_RD_MSG_OFFSET		0x80
+#define HDCP_2_2_HDMI_REG_DBG_OFFSET		0xC0
+
+#define HDCP_2_2_HDMI_SUPPORT_MASK		BIT(2)
+#define HDCP_2_2_RX_CAPS_VERSION_VAL		0x02
+#define HDCP_2_2_SEQ_NUM_MAX			0xFFFFFF
+#define	HDCP_2_2_DELAY_BEFORE_ENCRYPTION_EN	200
+
+/* Below macros take a byte at a time and mask the bit(s) */
+#define HDCP_2_2_HDMI_RXSTATUS_LEN		2
+#define HDCP_2_2_HDMI_RXSTATUS_MSG_SZ_HI(x)	((x) & 0x3)
+#define HDCP_2_2_HDMI_RXSTATUS_READY(x)		((x) & BIT(2))
+#define HDCP_2_2_HDMI_RXSTATUS_REAUTH_REQ(x)	((x) & BIT(3))
+
 #endif
-- 
2.7.4

_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply related	[flat|nested] 14+ messages in thread
* [PATCH v2 6/6] drm/i915: Define Intel HDCP2.2 registers
  2018-10-29  9:45 [PATCH v2 0/6] Implement HDCP2.2: PART-I Ramalingam C
                   ` (4 preceding siblings ...)
  2018-10-29  9:45 ` [PATCH v2 5/6] drm: HDMI and DP specific HDCP2.2 defines Ramalingam C
@ 2018-10-29  9:45 ` Ramalingam C
  2018-10-29 15:31   ` Daniel Vetter
  2018-10-29 10:40 ` ✓ Fi.CI.BAT: success for Implement HDCP2.2: PART-I (rev2) Patchwork
                   ` (2 subsequent siblings)
  8 siblings, 1 reply; 14+ messages in thread
From: Ramalingam C @ 2018-10-29  9:45 UTC (permalink / raw)
  To: intel-gfx, dri-devel, seanpaul, daniel.vetter

Intel HDCP2.2 registers are defined with addr offsets and bit details.

v2:
  Replaced the arith calc with _PICK [Sean Paul]
v3:
  No changes.
v4:
  %s/HDCP2_CTR_DDI/HDCP2_CTL_DDI [Uma]
v5:
  Added parentheses for the parameters of macro.
v6:
  No changes
v7:
  No changes

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 69eb573348b3..934722693477 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9038,6 +9038,38 @@ enum skl_power_gate {
 #define  HDCP_STATUS_CIPHER		BIT(16)
 #define  HDCP_STATUS_FRAME_CNT(x)	(((x) >> 8) & 0xff)
 
+/* HDCP2.2 Registers */
+#define _PORTA_HDCP2_BASE		0x66800
+#define _PORTB_HDCP2_BASE		0x66500
+#define _PORTC_HDCP2_BASE		0x66600
+#define _PORTD_HDCP2_BASE		0x66700
+#define _PORTE_HDCP2_BASE		0x66A00
+#define _PORTF_HDCP2_BASE		0x66900
+#define _PORT_HDCP2_BASE(port, x)	_MMIO(_PICK((port), \
+					  _PORTA_HDCP2_BASE, \
+					  _PORTB_HDCP2_BASE, \
+					  _PORTC_HDCP2_BASE, \
+					  _PORTD_HDCP2_BASE, \
+					  _PORTE_HDCP2_BASE, \
+					  _PORTF_HDCP2_BASE) + (x))
+
+#define HDCP2_AUTH_DDI(port)		_PORT_HDCP2_BASE(port, 0x98)
+#define   AUTH_LINK_AUTHENTICATED	BIT(31)
+#define   AUTH_LINK_TYPE		BIT(30)
+#define   AUTH_FORCE_CLR_INPUTCTR	BIT(19)
+#define   AUTH_CLR_KEYS			BIT(18)
+
+#define HDCP2_CTL_DDI(port)		_PORT_HDCP2_BASE(port, 0xB0)
+#define   CTL_LINK_ENCRYPTION_REQ	BIT(31)
+
+#define HDCP2_STATUS_DDI(port)		_PORT_HDCP2_BASE(port, 0xB4)
+#define   STREAM_ENCRYPTION_STATUS_A	BIT(31)
+#define   STREAM_ENCRYPTION_STATUS_B	BIT(30)
+#define   STREAM_ENCRYPTION_STATUS_C	BIT(29)
+#define   LINK_TYPE_STATUS		BIT(22)
+#define   LINK_AUTH_STATUS		BIT(21)
+#define   LINK_ENCRYPTION_STATUS	BIT(20)
+
 /* Per-pipe DDI Function Control */
 #define _TRANS_DDI_FUNC_CTL_A		0x60400
 #define _TRANS_DDI_FUNC_CTL_B		0x61400
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 14+ messages in thread
* ✓ Fi.CI.BAT: success for Implement HDCP2.2: PART-I (rev2)
  2018-10-29  9:45 [PATCH v2 0/6] Implement HDCP2.2: PART-I Ramalingam C
                   ` (5 preceding siblings ...)
  2018-10-29  9:45 ` [PATCH v2 6/6] drm/i915: Define Intel HDCP2.2 registers Ramalingam C
@ 2018-10-29 10:40 ` Patchwork
  2018-10-29 11:55 ` ✗ Fi.CI.IGT: failure " Patchwork
  2018-10-30 10:27 ` ✗ Fi.CI.BAT: " Patchwork
  8 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2018-10-29 10:40 UTC (permalink / raw)
  To: Ramalingam C; +Cc: intel-gfx

== Series Details ==

Series: Implement HDCP2.2: PART-I (rev2)
URL   : https://patchwork.freedesktop.org/series/51495/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_5044 -> Patchwork_10620 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/51495/revisions/2/mbox/

== Known issues ==

  Here are the changes found in Patchwork_10620 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@drv_selftest@live_contexts:
      fi-icl-u:           PASS -> DMESG-FAIL (fdo#108569)

    igt@kms_frontbuffer_tracking@basic:
      fi-byt-clapper:     PASS -> FAIL (fdo#103167)

    
    ==== Possible fixes ====

    igt@drv_module_reload@basic-reload:
      fi-glk-j4005:       DMESG-WARN (fdo#106725, fdo#106248) -> PASS

    igt@gem_exec_suspend@basic-s3:
      fi-blb-e6850:       INCOMPLETE (fdo#107718) -> PASS

    igt@gem_sync@basic-each:
      fi-glk-j4005:       DMESG-WARN (fdo#105719) -> PASS

    igt@kms_pipe_crc_basic@read-crc-pipe-b-frame-sequence:
      fi-byt-clapper:     FAIL (fdo#103191, fdo#107362) -> PASS

    igt@kms_pipe_crc_basic@read-crc-pipe-c-frame-sequence:
      fi-glk-j4005:       DMESG-FAIL (fdo#106000) -> PASS

    
  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
  fdo#105719 https://bugs.freedesktop.org/show_bug.cgi?id=105719
  fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000
  fdo#106248 https://bugs.freedesktop.org/show_bug.cgi?id=106248
  fdo#106725 https://bugs.freedesktop.org/show_bug.cgi?id=106725
  fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
  fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
  fdo#108569 https://bugs.freedesktop.org/show_bug.cgi?id=108569


== Participating hosts (47 -> 43) ==

  Additional (5): fi-gdg-551 fi-cfl-8109u fi-ivb-3770 fi-pnv-d510 fi-snb-2600 
  Missing    (9): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-j1900 fi-bsw-cyan fi-ilk-650 fi-ctg-p8600 fi-elk-e7500 fi-byt-n2820 


== Build changes ==

    * Linux: CI_DRM_5044 -> Patchwork_10620

  CI_DRM_5044: c4487dca27970879bf67f331614142c749984d65 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4698: af57164fcb16950187ad402ed31f565e88c42a78 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10620: eb45139dab6aaa52b467d2ec73ddfc9c8d55ae72 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

eb45139dab6a drm/i915: Define Intel HDCP2.2 registers
5e67dba3ba4f drm: HDMI and DP specific HDCP2.2 defines
c13de61bbab5 drm: hdcp2.2 authentication msg definitions
7802805131d9 drm/i915: Cancel the Link check before disable
c027fdfa04c7 drm/i915: Reassigning log level for HDCP failures
e8fb6e8ee57f drm/i915: wrapping all hdcp var into intel_hdcp

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10620/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 14+ messages in thread
* ✗ Fi.CI.IGT: failure for Implement HDCP2.2: PART-I (rev2)
  2018-10-29  9:45 [PATCH v2 0/6] Implement HDCP2.2: PART-I Ramalingam C
                   ` (6 preceding siblings ...)
  2018-10-29 10:40 ` ✓ Fi.CI.BAT: success for Implement HDCP2.2: PART-I (rev2) Patchwork
@ 2018-10-29 11:55 ` Patchwork
  2018-10-29 14:46   ` Martin Peres
  2018-10-30 10:27 ` ✗ Fi.CI.BAT: " Patchwork
  8 siblings, 1 reply; 14+ messages in thread
From: Patchwork @ 2018-10-29 11:55 UTC (permalink / raw)
  To: Ramalingam C; +Cc: intel-gfx

== Series Details ==

Series: Implement HDCP2.2: PART-I (rev2)
URL   : https://patchwork.freedesktop.org/series/51495/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_5044_full -> Patchwork_10620_full =

== Summary - FAILURE ==

  Serious unknown changes coming with Patchwork_10620_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_10620_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_10620_full:

  === IGT changes ===

    ==== Possible regressions ====

    igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend:
      shard-apl:          PASS -> FAIL

    
    ==== Warnings ====

    igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing:
      shard-apl:          DMESG-FAIL (fdo#108549) -> FAIL +2

    
== Known issues ==

  Here are the changes found in Patchwork_10620_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@drv_suspend@shrink:
      shard-skl:          NOTRUN -> INCOMPLETE (fdo#106886)
      shard-glk:          PASS -> INCOMPLETE (fdo#103359, fdo#106886, k.org#198133)

    igt@gem_cpu_reloc@full:
      shard-skl:          NOTRUN -> INCOMPLETE (fdo#108073)

    igt@gem_exec_schedule@pi-ringfull-bsd:
      shard-skl:          NOTRUN -> FAIL (fdo#103158) +2

    igt@gem_ppgtt@blt-vs-render-ctxn:
      shard-skl:          NOTRUN -> TIMEOUT (fdo#108039)

    igt@kms_busy@extended-modeset-hang-newfb-render-a:
      shard-skl:          NOTRUN -> DMESG-WARN (fdo#107956) +4

    igt@kms_cursor_crc@cursor-128x42-onscreen:
      shard-apl:          PASS -> FAIL (fdo#103232) +2

    igt@kms_cursor_crc@cursor-64x21-offscreen:
      shard-skl:          NOTRUN -> FAIL (fdo#103232)

    igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
      shard-glk:          PASS -> FAIL (fdo#104873)

    igt@kms_fbcon_fbt@psr-suspend:
      shard-skl:          NOTRUN -> FAIL (fdo#107882) +1

    igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
      shard-glk:          PASS -> FAIL (fdo#105363)

    igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-pwrite:
      shard-snb:          SKIP -> INCOMPLETE (fdo#105411)

    igt@kms_plane@pixel-format-pipe-c-planes:
      shard-skl:          NOTRUN -> DMESG-FAIL (fdo#103166, fdo#106885)

    igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
      shard-skl:          NOTRUN -> INCOMPLETE (fdo#104108)

    igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
      shard-skl:          NOTRUN -> FAIL (fdo#108145, fdo#107815) +2

    igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
      shard-skl:          NOTRUN -> FAIL (fdo#108145) +8

    igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
      shard-skl:          NOTRUN -> FAIL (fdo#103166, fdo#107815)

    igt@kms_universal_plane@universal-plane-pipe-a-functional:
      shard-apl:          PASS -> FAIL (fdo#103166) +1

    
    ==== Possible fixes ====

    igt@drv_suspend@debugfs-reader:
      shard-skl:          INCOMPLETE (fdo#104108) -> PASS

    igt@kms_busy@extended-modeset-hang-newfb-render-a:
      shard-kbl:          DMESG-WARN (fdo#107956) -> PASS

    igt@kms_chv_cursor_fail@pipe-b-128x128-bottom-edge:
      shard-skl:          FAIL (fdo#104671) -> PASS +1

    igt@kms_color@pipe-b-ctm-max:
      shard-apl:          DMESG-WARN (fdo#108549) -> PASS +22

    igt@kms_cursor_crc@cursor-64x21-sliding:
      shard-apl:          FAIL (fdo#103232) -> PASS +2

    igt@kms_cursor_crc@cursor-64x64-sliding:
      shard-apl:          DMESG-FAIL (fdo#108549, fdo#103232) -> PASS

    igt@kms_cursor_crc@cursor-64x64-suspend:
      shard-apl:          FAIL (fdo#103232, fdo#103191) -> PASS

    igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu:
      shard-glk:          DMESG-WARN (fdo#105763, fdo#106538) -> PASS +1

    igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite:
      shard-apl:          FAIL (fdo#103167) -> PASS

    igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
      shard-apl:          FAIL (fdo#103375) -> PASS

    igt@kms_plane@plane-panning-top-left-pipe-b-planes:
      shard-apl:          INCOMPLETE (fdo#103927) -> PASS

    igt@kms_plane@plane-position-covered-pipe-a-planes:
      shard-glk:          FAIL (fdo#103166) -> PASS

    igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
      shard-skl:          FAIL (fdo#107815) -> PASS

    igt@kms_plane_multiple@atomic-pipe-a-tiling-x:
      shard-apl:          FAIL (fdo#103166) -> PASS

    igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
      shard-snb:          DMESG-WARN (fdo#102365) -> PASS

    igt@kms_vblank@pipe-c-ts-continuation-dpms-rpm:
      shard-apl:          DMESG-FAIL (fdo#108549) -> PASS

    igt@pm_rpm@dpms-lpsp:
      shard-skl:          INCOMPLETE (fdo#107807) -> PASS

    
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  fdo#102365 https://bugs.freedesktop.org/show_bug.cgi?id=102365
  fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158
  fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
  fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
  fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
  fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
  fdo#104671 https://bugs.freedesktop.org/show_bug.cgi?id=104671
  fdo#104873 https://bugs.freedesktop.org/show_bug.cgi?id=104873
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
  fdo#105763 https://bugs.freedesktop.org/show_bug.cgi?id=105763
  fdo#106538 https://bugs.freedesktop.org/show_bug.cgi?id=106538
  fdo#106885 https://bugs.freedesktop.org/show_bug.cgi?id=106885
  fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886
  fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807
  fdo#107815 https://bugs.freedesktop.org/show_bug.cgi?id=107815
  fdo#107882 https://bugs.freedesktop.org/show_bug.cgi?id=107882
  fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956
  fdo#108039 https://bugs.freedesktop.org/show_bug.cgi?id=108039
  fdo#108073 https://bugs.freedesktop.org/show_bug.cgi?id=108073
  fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145
  fdo#108549 https://bugs.freedesktop.org/show_bug.cgi?id=108549
  k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133


== Participating hosts (6 -> 6) ==

  No changes in participating hosts


== Build changes ==

    * Linux: CI_DRM_5044 -> Patchwork_10620

  CI_DRM_5044: c4487dca27970879bf67f331614142c749984d65 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4698: af57164fcb16950187ad402ed31f565e88c42a78 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10620: eb45139dab6aaa52b467d2ec73ddfc9c8d55ae72 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10620/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: ✗ Fi.CI.IGT: failure for Implement HDCP2.2: PART-I (rev2)
  2018-10-29 11:55 ` ✗ Fi.CI.IGT: failure " Patchwork
@ 2018-10-29 14:46   ` Martin Peres
  2018-10-29 15:07     ` C, Ramalingam
  0 siblings, 1 reply; 14+ messages in thread
From: Martin Peres @ 2018-10-29 14:46 UTC (permalink / raw)
  To: intel-gfx, Patchwork, Ramalingam C



On 29/10/2018 13:55, Patchwork wrote:
> == Series Details ==
> 
> Series: Implement HDCP2.2: PART-I (rev2)
> URL   : https://patchwork.freedesktop.org/series/51495/
> State : failure
> 
> == Summary ==
> 
> = CI Bug Log - changes from CI_DRM_5044_full -> Patchwork_10620_full =
> 
> == Summary - FAILURE ==
> 
>   Serious unknown changes coming with Patchwork_10620_full absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_10620_full, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   
> 
> == Possible new issues ==
> 
>   Here are the unknown changes that may have been introduced in Patchwork_10620_full:
> 
>   === IGT changes ===
> 
>     ==== Possible regressions ====
> 
>     igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend:
>       shard-apl:          PASS -> FAIL

https://bugs.freedesktop.org/show_bug.cgi?id=104894

> 
>     
>     ==== Warnings ====
> 
>     igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing:
>       shard-apl:          DMESG-FAIL (fdo#108549) -> FAIL +2

This part is not noise. The test was not failing before and it still
does now. Please fix!

> 
>     
> == Known issues ==
> 
>   Here are the changes found in Patchwork_10620_full that come from known issues:
> 
>   === IGT changes ===
> 
>     ==== Issues hit ====
> 
>     igt@drv_suspend@shrink:
>       shard-skl:          NOTRUN -> INCOMPLETE (fdo#106886)
>       shard-glk:          PASS -> INCOMPLETE (fdo#103359, fdo#106886, k.org#198133)
> 
>     igt@gem_cpu_reloc@full:
>       shard-skl:          NOTRUN -> INCOMPLETE (fdo#108073)
> 
>     igt@gem_exec_schedule@pi-ringfull-bsd:
>       shard-skl:          NOTRUN -> FAIL (fdo#103158) +2
> 
>     igt@gem_ppgtt@blt-vs-render-ctxn:
>       shard-skl:          NOTRUN -> TIMEOUT (fdo#108039)
> 
>     igt@kms_busy@extended-modeset-hang-newfb-render-a:
>       shard-skl:          NOTRUN -> DMESG-WARN (fdo#107956) +4
> 
>     igt@kms_cursor_crc@cursor-128x42-onscreen:
>       shard-apl:          PASS -> FAIL (fdo#103232) +2
> 
>     igt@kms_cursor_crc@cursor-64x21-offscreen:
>       shard-skl:          NOTRUN -> FAIL (fdo#103232)
> 
>     igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
>       shard-glk:          PASS -> FAIL (fdo#104873)
> 
>     igt@kms_fbcon_fbt@psr-suspend:
>       shard-skl:          NOTRUN -> FAIL (fdo#107882) +1
> 
>     igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
>       shard-glk:          PASS -> FAIL (fdo#105363)
> 
>     igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-pwrite:
>       shard-snb:          SKIP -> INCOMPLETE (fdo#105411)
> 
>     igt@kms_plane@pixel-format-pipe-c-planes:
>       shard-skl:          NOTRUN -> DMESG-FAIL (fdo#103166, fdo#106885)
> 
>     igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
>       shard-skl:          NOTRUN -> INCOMPLETE (fdo#104108)
> 
>     igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
>       shard-skl:          NOTRUN -> FAIL (fdo#108145, fdo#107815) +2
> 
>     igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
>       shard-skl:          NOTRUN -> FAIL (fdo#108145) +8
> 
>     igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
>       shard-skl:          NOTRUN -> FAIL (fdo#103166, fdo#107815)
> 
>     igt@kms_universal_plane@universal-plane-pipe-a-functional:
>       shard-apl:          PASS -> FAIL (fdo#103166) +1
> 
>     
>     ==== Possible fixes ====
> 
>     igt@drv_suspend@debugfs-reader:
>       shard-skl:          INCOMPLETE (fdo#104108) -> PASS
> 
>     igt@kms_busy@extended-modeset-hang-newfb-render-a:
>       shard-kbl:          DMESG-WARN (fdo#107956) -> PASS
> 
>     igt@kms_chv_cursor_fail@pipe-b-128x128-bottom-edge:
>       shard-skl:          FAIL (fdo#104671) -> PASS +1
> 
>     igt@kms_color@pipe-b-ctm-max:
>       shard-apl:          DMESG-WARN (fdo#108549) -> PASS +22
> 
>     igt@kms_cursor_crc@cursor-64x21-sliding:
>       shard-apl:          FAIL (fdo#103232) -> PASS +2
> 
>     igt@kms_cursor_crc@cursor-64x64-sliding:
>       shard-apl:          DMESG-FAIL (fdo#108549, fdo#103232) -> PASS
> 
>     igt@kms_cursor_crc@cursor-64x64-suspend:
>       shard-apl:          FAIL (fdo#103232, fdo#103191) -> PASS
> 
>     igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu:
>       shard-glk:          DMESG-WARN (fdo#105763, fdo#106538) -> PASS +1
> 
>     igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite:
>       shard-apl:          FAIL (fdo#103167) -> PASS
> 
>     igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
>       shard-apl:          FAIL (fdo#103375) -> PASS
> 
>     igt@kms_plane@plane-panning-top-left-pipe-b-planes:
>       shard-apl:          INCOMPLETE (fdo#103927) -> PASS
> 
>     igt@kms_plane@plane-position-covered-pipe-a-planes:
>       shard-glk:          FAIL (fdo#103166) -> PASS
> 
>     igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
>       shard-skl:          FAIL (fdo#107815) -> PASS
> 
>     igt@kms_plane_multiple@atomic-pipe-a-tiling-x:
>       shard-apl:          FAIL (fdo#103166) -> PASS
> 
>     igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
>       shard-snb:          DMESG-WARN (fdo#102365) -> PASS
> 
>     igt@kms_vblank@pipe-c-ts-continuation-dpms-rpm:
>       shard-apl:          DMESG-FAIL (fdo#108549) -> PASS
> 
>     igt@pm_rpm@dpms-lpsp:
>       shard-skl:          INCOMPLETE (fdo#107807) -> PASS
> 
>     
>   {name}: This element is suppressed. This means it is ignored when computing
>           the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
>   fdo#102365 https://bugs.freedesktop.org/show_bug.cgi?id=102365
>   fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158
>   fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
>   fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
>   fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
>   fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
>   fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
>   fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375
>   fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
>   fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
>   fdo#104671 https://bugs.freedesktop.org/show_bug.cgi?id=104671
>   fdo#104873 https://bugs.freedesktop.org/show_bug.cgi?id=104873
>   fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
>   fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
>   fdo#105763 https://bugs.freedesktop.org/show_bug.cgi?id=105763
>   fdo#106538 https://bugs.freedesktop.org/show_bug.cgi?id=106538
>   fdo#106885 https://bugs.freedesktop.org/show_bug.cgi?id=106885
>   fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886
>   fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807
>   fdo#107815 https://bugs.freedesktop.org/show_bug.cgi?id=107815
>   fdo#107882 https://bugs.freedesktop.org/show_bug.cgi?id=107882
>   fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956
>   fdo#108039 https://bugs.freedesktop.org/show_bug.cgi?id=108039
>   fdo#108073 https://bugs.freedesktop.org/show_bug.cgi?id=108073
>   fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145
>   fdo#108549 https://bugs.freedesktop.org/show_bug.cgi?id=108549
>   k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133
> 
> 
> == Participating hosts (6 -> 6) ==
> 
>   No changes in participating hosts
> 
> 
> == Build changes ==
> 
>     * Linux: CI_DRM_5044 -> Patchwork_10620
> 
>   CI_DRM_5044: c4487dca27970879bf67f331614142c749984d65 @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGT_4698: af57164fcb16950187ad402ed31f565e88c42a78 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
>   Patchwork_10620: eb45139dab6aaa52b467d2ec73ddfc9c8d55ae72 @ git://anongit.freedesktop.org/gfx-ci/linux
>   piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10620/shards.html
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: ✗ Fi.CI.IGT: failure for Implement HDCP2.2: PART-I (rev2)
  2018-10-29 14:46   ` Martin Peres
@ 2018-10-29 15:07     ` C, Ramalingam
  0 siblings, 0 replies; 14+ messages in thread
From: C, Ramalingam @ 2018-10-29 15:07 UTC (permalink / raw)
  To: Martin Peres, intel-gfx, Patchwork


[-- Attachment #1.1: Type: text/plain, Size: 9247 bytes --]


On 10/29/2018 8:16 PM, Martin Peres wrote:
>
> On 29/10/2018 13:55, Patchwork wrote:
>> == Series Details ==
>>
>> Series: Implement HDCP2.2: PART-I (rev2)
>> URL   : https://patchwork.freedesktop.org/series/51495/
>> State : failure
>>
>> == Summary ==
>>
>> = CI Bug Log - changes from CI_DRM_5044_full -> Patchwork_10620_full =
>>
>> == Summary - FAILURE ==
>>
>>    Serious unknown changes coming with Patchwork_10620_full absolutely need to be
>>    verified manually.
>>    
>>    If you think the reported changes have nothing to do with the changes
>>    introduced in Patchwork_10620_full, please notify your bug team to allow them
>>    to document this new failure mode, which will reduce false positives in CI.
>>
>>    
>>
>> == Possible new issues ==
>>
>>    Here are the unknown changes that may have been introduced in Patchwork_10620_full:
>>
>>    === IGT changes ===
>>
>>      ==== Possible regressions ====
>>
>>      igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend:
>>        shard-apl:          PASS -> FAIL
> https://bugs.freedesktop.org/show_bug.cgi?id=104894
>
>>      
>>      ==== Warnings ====
>>
>>      igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing:
>>        shard-apl:          DMESG-FAIL (fdo#108549) -> FAIL +2
> This part is not noise. The test was not failing before and it still
> does now. Please fix!

So igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing failed atCI_DRM_5044  <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5044/>  andPatchwork_10620.  <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10620/>
This series improves the result removes the DRM WARNINGS( by making them as debug logs.)

But the HDCP attempts(because of known bug at IGT) will be avoided as soon as https://patchwork.freedesktop.org/patch/258692/ is merged.
So I dont see anything to be fixed here.

--Ram
  <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10620/>

>>      
>> == Known issues ==
>>
>>    Here are the changes found in Patchwork_10620_full that come from known issues:
>>
>>    === IGT changes ===
>>
>>      ==== Issues hit ====
>>
>>      igt@drv_suspend@shrink:
>>        shard-skl:          NOTRUN -> INCOMPLETE (fdo#106886)
>>        shard-glk:          PASS -> INCOMPLETE (fdo#103359, fdo#106886, k.org#198133)
>>
>>      igt@gem_cpu_reloc@full:
>>        shard-skl:          NOTRUN -> INCOMPLETE (fdo#108073)
>>
>>      igt@gem_exec_schedule@pi-ringfull-bsd:
>>        shard-skl:          NOTRUN -> FAIL (fdo#103158) +2
>>
>>      igt@gem_ppgtt@blt-vs-render-ctxn:
>>        shard-skl:          NOTRUN -> TIMEOUT (fdo#108039)
>>
>>      igt@kms_busy@extended-modeset-hang-newfb-render-a:
>>        shard-skl:          NOTRUN -> DMESG-WARN (fdo#107956) +4
>>
>>      igt@kms_cursor_crc@cursor-128x42-onscreen:
>>        shard-apl:          PASS -> FAIL (fdo#103232) +2
>>
>>      igt@kms_cursor_crc@cursor-64x21-offscreen:
>>        shard-skl:          NOTRUN -> FAIL (fdo#103232)
>>
>>      igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
>>        shard-glk:          PASS -> FAIL (fdo#104873)
>>
>>      igt@kms_fbcon_fbt@psr-suspend:
>>        shard-skl:          NOTRUN -> FAIL (fdo#107882) +1
>>
>>      igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
>>        shard-glk:          PASS -> FAIL (fdo#105363)
>>
>>      igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-pwrite:
>>        shard-snb:          SKIP -> INCOMPLETE (fdo#105411)
>>
>>      igt@kms_plane@pixel-format-pipe-c-planes:
>>        shard-skl:          NOTRUN -> DMESG-FAIL (fdo#103166, fdo#106885)
>>
>>      igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
>>        shard-skl:          NOTRUN -> INCOMPLETE (fdo#104108)
>>
>>      igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
>>        shard-skl:          NOTRUN -> FAIL (fdo#108145, fdo#107815) +2
>>
>>      igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
>>        shard-skl:          NOTRUN -> FAIL (fdo#108145) +8
>>
>>      igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
>>        shard-skl:          NOTRUN -> FAIL (fdo#103166, fdo#107815)
>>
>>      igt@kms_universal_plane@universal-plane-pipe-a-functional:
>>        shard-apl:          PASS -> FAIL (fdo#103166) +1
>>
>>      
>>      ==== Possible fixes ====
>>
>>      igt@drv_suspend@debugfs-reader:
>>        shard-skl:          INCOMPLETE (fdo#104108) -> PASS
>>
>>      igt@kms_busy@extended-modeset-hang-newfb-render-a:
>>        shard-kbl:          DMESG-WARN (fdo#107956) -> PASS
>>
>>      igt@kms_chv_cursor_fail@pipe-b-128x128-bottom-edge:
>>        shard-skl:          FAIL (fdo#104671) -> PASS +1
>>
>>      igt@kms_color@pipe-b-ctm-max:
>>        shard-apl:          DMESG-WARN (fdo#108549) -> PASS +22
>>
>>      igt@kms_cursor_crc@cursor-64x21-sliding:
>>        shard-apl:          FAIL (fdo#103232) -> PASS +2
>>
>>      igt@kms_cursor_crc@cursor-64x64-sliding:
>>        shard-apl:          DMESG-FAIL (fdo#108549, fdo#103232) -> PASS
>>
>>      igt@kms_cursor_crc@cursor-64x64-suspend:
>>        shard-apl:          FAIL (fdo#103232, fdo#103191) -> PASS
>>
>>      igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu:
>>        shard-glk:          DMESG-WARN (fdo#105763, fdo#106538) -> PASS +1
>>
>>      igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite:
>>        shard-apl:          FAIL (fdo#103167) -> PASS
>>
>>      igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
>>        shard-apl:          FAIL (fdo#103375) -> PASS
>>
>>      igt@kms_plane@plane-panning-top-left-pipe-b-planes:
>>        shard-apl:          INCOMPLETE (fdo#103927) -> PASS
>>
>>      igt@kms_plane@plane-position-covered-pipe-a-planes:
>>        shard-glk:          FAIL (fdo#103166) -> PASS
>>
>>      igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
>>        shard-skl:          FAIL (fdo#107815) -> PASS
>>
>>      igt@kms_plane_multiple@atomic-pipe-a-tiling-x:
>>        shard-apl:          FAIL (fdo#103166) -> PASS
>>
>>      igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
>>        shard-snb:          DMESG-WARN (fdo#102365) -> PASS
>>
>>      igt@kms_vblank@pipe-c-ts-continuation-dpms-rpm:
>>        shard-apl:          DMESG-FAIL (fdo#108549) -> PASS
>>
>>      igt@pm_rpm@dpms-lpsp:
>>        shard-skl:          INCOMPLETE (fdo#107807) -> PASS
>>
>>      
>>    {name}: This element is suppressed. This means it is ignored when computing
>>            the status of the difference (SUCCESS, WARNING, or FAILURE).
>>
>>    fdo#102365 https://bugs.freedesktop.org/show_bug.cgi?id=102365
>>    fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158
>>    fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
>>    fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
>>    fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
>>    fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
>>    fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
>>    fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375
>>    fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
>>    fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
>>    fdo#104671 https://bugs.freedesktop.org/show_bug.cgi?id=104671
>>    fdo#104873 https://bugs.freedesktop.org/show_bug.cgi?id=104873
>>    fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
>>    fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
>>    fdo#105763 https://bugs.freedesktop.org/show_bug.cgi?id=105763
>>    fdo#106538 https://bugs.freedesktop.org/show_bug.cgi?id=106538
>>    fdo#106885 https://bugs.freedesktop.org/show_bug.cgi?id=106885
>>    fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886
>>    fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807
>>    fdo#107815 https://bugs.freedesktop.org/show_bug.cgi?id=107815
>>    fdo#107882 https://bugs.freedesktop.org/show_bug.cgi?id=107882
>>    fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956
>>    fdo#108039 https://bugs.freedesktop.org/show_bug.cgi?id=108039
>>    fdo#108073 https://bugs.freedesktop.org/show_bug.cgi?id=108073
>>    fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145
>>    fdo#108549 https://bugs.freedesktop.org/show_bug.cgi?id=108549
>>    k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133
>>
>>
>> == Participating hosts (6 -> 6) ==
>>
>>    No changes in participating hosts
>>
>>
>> == Build changes ==
>>
>>      * Linux: CI_DRM_5044 -> Patchwork_10620
>>
>>    CI_DRM_5044: c4487dca27970879bf67f331614142c749984d65 @ git://anongit.freedesktop.org/gfx-ci/linux
>>    IGT_4698: af57164fcb16950187ad402ed31f565e88c42a78 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
>>    Patchwork_10620: eb45139dab6aaa52b467d2ec73ddfc9c8d55ae72 @ git://anongit.freedesktop.org/gfx-ci/linux
>>    piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
>>
>> == Logs ==
>>
>> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10620/shards.html
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>>

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[-- Attachment #2: Type: text/plain, Size: 160 bytes --]

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: [PATCH v2 3/6] drm/i915: Cancel the Link check before disable
  2018-10-29  9:45 ` [PATCH v2 3/6] drm/i915: Cancel the Link check before disable Ramalingam C
@ 2018-10-29 15:18   ` Daniel Vetter
  0 siblings, 0 replies; 14+ messages in thread
From: Daniel Vetter @ 2018-10-29 15:18 UTC (permalink / raw)
  To: Ramalingam C; +Cc: daniel.vetter, intel-gfx, seanpaul, dri-devel

On Mon, Oct 29, 2018 at 03:15:48PM +0530, Ramalingam C wrote:
> To avoid the execution of link integrity check when the HDCP is
> already disabled, cancel the delayed work for link integrity check
> before disabling the HDCP.
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>

This is racy. As an exercise, please lay out the scenario of what exactly
happens where. I'll drop this patch from the series.
-Daniel

> ---
>  drivers/gpu/drm/i915/intel_hdcp.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_hdcp.c b/drivers/gpu/drm/i915/intel_hdcp.c
> index 1bf487f94254..d13e4af9ac05 100644
> --- a/drivers/gpu/drm/i915/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/intel_hdcp.c
> @@ -821,6 +821,7 @@ int intel_hdcp_disable(struct intel_connector *connector)
>  	if (!hdcp->shim)
>  		return -ENOENT;
>  
> +	cancel_delayed_work_sync(&hdcp->check_work);
>  	mutex_lock(&hdcp->mutex);
>  
>  	if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
> @@ -829,7 +830,6 @@ int intel_hdcp_disable(struct intel_connector *connector)
>  	}
>  
>  	mutex_unlock(&hdcp->mutex);
> -	cancel_delayed_work_sync(&hdcp->check_work);
>  	return ret;
>  }
>  
> -- 
> 2.7.4
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: [PATCH v2 6/6] drm/i915: Define Intel HDCP2.2 registers
  2018-10-29  9:45 ` [PATCH v2 6/6] drm/i915: Define Intel HDCP2.2 registers Ramalingam C
@ 2018-10-29 15:31   ` Daniel Vetter
  0 siblings, 0 replies; 14+ messages in thread
From: Daniel Vetter @ 2018-10-29 15:31 UTC (permalink / raw)
  To: Ramalingam C; +Cc: daniel.vetter, intel-gfx, seanpaul, dri-devel

On Mon, Oct 29, 2018 at 03:15:51PM +0530, Ramalingam C wrote:
> Intel HDCP2.2 registers are defined with addr offsets and bit details.
> 
> v2:
>   Replaced the arith calc with _PICK [Sean Paul]
> v3:
>   No changes.
> v4:
>   %s/HDCP2_CTR_DDI/HDCP2_CTL_DDI [Uma]
> v5:
>   Added parentheses for the parameters of macro.
> v6:
>   No changes
> v7:
>   No changes
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> Reviewed-by: Sean Paul <seanpaul@chromium.org>
> Reviewed-by: Uma Shankar <uma.shankar@intel.com>

All (except the one patch) merged into dinq.
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_reg.h | 32 ++++++++++++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 69eb573348b3..934722693477 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9038,6 +9038,38 @@ enum skl_power_gate {
>  #define  HDCP_STATUS_CIPHER		BIT(16)
>  #define  HDCP_STATUS_FRAME_CNT(x)	(((x) >> 8) & 0xff)
>  
> +/* HDCP2.2 Registers */
> +#define _PORTA_HDCP2_BASE		0x66800
> +#define _PORTB_HDCP2_BASE		0x66500
> +#define _PORTC_HDCP2_BASE		0x66600
> +#define _PORTD_HDCP2_BASE		0x66700
> +#define _PORTE_HDCP2_BASE		0x66A00
> +#define _PORTF_HDCP2_BASE		0x66900
> +#define _PORT_HDCP2_BASE(port, x)	_MMIO(_PICK((port), \
> +					  _PORTA_HDCP2_BASE, \
> +					  _PORTB_HDCP2_BASE, \
> +					  _PORTC_HDCP2_BASE, \
> +					  _PORTD_HDCP2_BASE, \
> +					  _PORTE_HDCP2_BASE, \
> +					  _PORTF_HDCP2_BASE) + (x))
> +
> +#define HDCP2_AUTH_DDI(port)		_PORT_HDCP2_BASE(port, 0x98)
> +#define   AUTH_LINK_AUTHENTICATED	BIT(31)
> +#define   AUTH_LINK_TYPE		BIT(30)
> +#define   AUTH_FORCE_CLR_INPUTCTR	BIT(19)
> +#define   AUTH_CLR_KEYS			BIT(18)
> +
> +#define HDCP2_CTL_DDI(port)		_PORT_HDCP2_BASE(port, 0xB0)
> +#define   CTL_LINK_ENCRYPTION_REQ	BIT(31)
> +
> +#define HDCP2_STATUS_DDI(port)		_PORT_HDCP2_BASE(port, 0xB4)
> +#define   STREAM_ENCRYPTION_STATUS_A	BIT(31)
> +#define   STREAM_ENCRYPTION_STATUS_B	BIT(30)
> +#define   STREAM_ENCRYPTION_STATUS_C	BIT(29)
> +#define   LINK_TYPE_STATUS		BIT(22)
> +#define   LINK_AUTH_STATUS		BIT(21)
> +#define   LINK_ENCRYPTION_STATUS	BIT(20)
> +
>  /* Per-pipe DDI Function Control */
>  #define _TRANS_DDI_FUNC_CTL_A		0x60400
>  #define _TRANS_DDI_FUNC_CTL_B		0x61400
> -- 
> 2.7.4
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 14+ messages in thread
* ✗ Fi.CI.BAT: failure for Implement HDCP2.2: PART-I (rev2)
  2018-10-29  9:45 [PATCH v2 0/6] Implement HDCP2.2: PART-I Ramalingam C
                   ` (7 preceding siblings ...)
  2018-10-29 11:55 ` ✗ Fi.CI.IGT: failure " Patchwork
@ 2018-10-30 10:27 ` Patchwork
  8 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2018-10-30 10:27 UTC (permalink / raw)
  To: Ramalingam C; +Cc: intel-gfx

== Series Details ==

Series: Implement HDCP2.2: PART-I (rev2)
URL   : https://patchwork.freedesktop.org/series/51495/
State : failure

== Summary ==

Applying: drm/i915: wrapping all hdcp var into intel_hdcp
Using index info to reconstruct a base tree...
M	drivers/gpu/drm/i915/i915_debugfs.c
M	drivers/gpu/drm/i915/intel_display.c
M	drivers/gpu/drm/i915/intel_drv.h
M	drivers/gpu/drm/i915/intel_hdcp.c
Falling back to patching base and 3-way merge...
Auto-merging drivers/gpu/drm/i915/intel_hdcp.c
CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/intel_hdcp.c
error: Failed to merge in the changes.
Patch failed at 0001 drm/i915: wrapping all hdcp var into intel_hdcp
Use 'git am --show-current-patch' to see the failed patch
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10620/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 14+ messages in thread
end of thread, other threads:[~2018-10-30 10:27 UTC | newest]

Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-10-29  9:45 [PATCH v2 0/6] Implement HDCP2.2: PART-I Ramalingam C
2018-10-29  9:45 ` [PATCH v2 1/6] drm/i915: wrapping all hdcp var into intel_hdcp Ramalingam C
2018-10-29  9:45 ` [PATCH v2 2/6] drm/i915: Reassigning log level for HDCP failures Ramalingam C
2018-10-29  9:45 ` [PATCH v2 3/6] drm/i915: Cancel the Link check before disable Ramalingam C
2018-10-29 15:18   ` Daniel Vetter
2018-10-29  9:45 ` [PATCH v2 4/6] drm: hdcp2.2 authentication msg definitions Ramalingam C
2018-10-29  9:45 ` [PATCH v2 5/6] drm: HDMI and DP specific HDCP2.2 defines Ramalingam C
2018-10-29  9:45 ` [PATCH v2 6/6] drm/i915: Define Intel HDCP2.2 registers Ramalingam C
2018-10-29 15:31   ` Daniel Vetter
2018-10-29 10:40 ` ✓ Fi.CI.BAT: success for Implement HDCP2.2: PART-I (rev2) Patchwork
2018-10-29 11:55 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-10-29 14:46   ` Martin Peres
2018-10-29 15:07     ` C, Ramalingam
2018-10-30 10:27 ` ✗ Fi.CI.BAT: " Patchwork

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