From: kbuild test robot <lkp@intel.com>
To: Paul Cercueil <paul@crapouillou.net>
Cc: kbuild-all@01.org, David Woodhouse <dwmw2@infradead.org>,
Brian Norris <computersforpeace@gmail.com>,
Boris Brezillon <bbrezillon@kernel.org>,
Marek Vasut <marek.vasut@gmail.com>,
Richard Weinberger <richard@nod.at>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Harvey Hunt <harveyhuntnexus@gmail.com>,
Mathieu Malaterre <malat@debian.org>,
linux-mtd@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Paul Cercueil <paul@crapouillou.net>
Subject: Re: [PATCH v2 9/9] mtd: rawnand: jz4780-bch: Add support for the JZ4740
Date: Mon, 4 Feb 2019 18:02:59 +0800 [thread overview]
Message-ID: <201902041853.7GbN5MZX%fengguang.wu@intel.com> (raw)
In-Reply-To: <20190202231926.2444-10-paul@crapouillou.net>
[-- Attachment #1: Type: text/plain, Size: 5966 bytes --]
Hi Paul,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on mtd/nand/next]
[also build test ERROR on v5.0-rc4]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Paul-Cercueil/Ingenic-JZ4780-NAND-patchset-v2/20190204-163709
base: git://git.infradead.org/linux-mtd.git nand/next
config: sh-allmodconfig (attached as .config)
compiler: sh4-linux-gnu-gcc (Debian 8.2.0-11) 8.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=8.2.0 make.cross ARCH=sh
All errors (new ones prefixed by >>):
drivers/mtd/nand/raw/ingenic/jz4740_bch.c: In function 'jz4740_bch_init':
>> drivers/mtd/nand/raw/ingenic/jz4740_bch.c:46:2: error: implicit declaration of function 'writel' [-Werror=implicit-function-declaration]
writel(0, bch->base + JZ_REG_NAND_IRQ_STAT);
^~~~~~
>> drivers/mtd/nand/raw/ingenic/jz4740_bch.c:49:8: error: implicit declaration of function 'readl' [-Werror=implicit-function-declaration]
reg = readl(bch->base + JZ_REG_NAND_ECC_CTRL);
^~~~~
drivers/mtd/nand/raw/ingenic/jz4740_bch.c: In function 'jz4740_bch_calculate':
>> drivers/mtd/nand/raw/ingenic/jz4740_bch.c:83:17: error: implicit declaration of function 'readb' [-Werror=implicit-function-declaration]
ecc_code[i] = readb(bch->base + JZ_REG_NAND_PAR0 + i);
^~~~~
drivers/mtd/nand/raw/ingenic/jz4740_bch.c: In function 'jz4740_bch_correct':
>> drivers/mtd/nand/raw/ingenic/jz4740_bch.c:123:3: error: implicit declaration of function 'writeb'; did you mean 'up_write'? [-Werror=implicit-function-declaration]
writeb(ecc_code[i], bch->base + JZ_REG_NAND_PAR0 + i);
^~~~~~
up_write
cc1: some warnings being treated as errors
vim +/writel +46 drivers/mtd/nand/raw/ingenic/jz4740_bch.c
40
41 static void jz4740_bch_init(struct jz4780_bch *bch, bool encode)
42 {
43 uint32_t reg;
44
45 /* Clear interrupt status */
> 46 writel(0, bch->base + JZ_REG_NAND_IRQ_STAT);
47
48 /* Initialize and enable BCH */
> 49 reg = readl(bch->base + JZ_REG_NAND_ECC_CTRL);
50 reg |= JZ_NAND_ECC_CTRL_RESET;
51 reg |= JZ_NAND_ECC_CTRL_ENABLE;
52 reg |= JZ_NAND_ECC_CTRL_RS;
53 if (encode)
54 reg |= JZ_NAND_ECC_CTRL_ENCODING;
55 else
56 reg &= ~JZ_NAND_ECC_CTRL_ENCODING;
57
58 writel(reg, bch->base + JZ_REG_NAND_ECC_CTRL);
59 }
60
61 static int jz4740_bch_calculate(struct jz4780_bch *bch,
62 struct jz4780_bch_params *params,
63 const u8 *buf, u8 *ecc_code)
64 {
65 uint32_t reg, status;
66 unsigned int timeout = 1000;
67 int i;
68
69 jz4740_bch_init(bch, true);
70
71 do {
72 status = readl(bch->base + JZ_REG_NAND_IRQ_STAT);
73 } while (!(status & JZ_NAND_STATUS_ENC_FINISH) && --timeout);
74
75 if (timeout == 0)
76 return -ETIMEDOUT;
77
78 reg = readl(bch->base + JZ_REG_NAND_ECC_CTRL);
79 reg &= ~JZ_NAND_ECC_CTRL_ENABLE;
80 writel(reg, bch->base + JZ_REG_NAND_ECC_CTRL);
81
82 for (i = 0; i < params->bytes; ++i)
> 83 ecc_code[i] = readb(bch->base + JZ_REG_NAND_PAR0 + i);
84
85 /* If the written data is completely 0xff, we also want to write 0xff as
86 * ecc, otherwise we will get in trouble when doing subpage writes.
87 */
88 if (memcmp(ecc_code, empty_block_ecc, ARRAY_SIZE(empty_block_ecc)) == 0)
89 memset(ecc_code, 0xff, ARRAY_SIZE(empty_block_ecc));
90
91 return 0;
92 }
93
94 static void jz_nand_correct_data(uint8_t *buf, int index, int mask)
95 {
96 int offset = index & 0x7;
97 uint16_t data;
98
99 index += (index >> 3);
100
101 data = buf[index];
102 data |= buf[index + 1] << 8;
103
104 mask ^= (data >> offset) & 0x1ff;
105 data &= ~(0x1ff << offset);
106 data |= (mask << offset);
107
108 buf[index] = data & 0xff;
109 buf[index + 1] = (data >> 8) & 0xff;
110 }
111
112 static int jz4740_bch_correct(struct jz4780_bch *bch,
113 struct jz4780_bch_params *params,
114 u8 *buf, u8 *ecc_code)
115 {
116 int i, error_count, index;
117 uint32_t reg, status, error;
118 unsigned int timeout = 1000;
119
120 jz4740_bch_init(bch, false);
121
122 for (i = 0; i < params->bytes; ++i)
> 123 writeb(ecc_code[i], bch->base + JZ_REG_NAND_PAR0 + i);
124
125 reg = readl(bch->base + JZ_REG_NAND_ECC_CTRL);
126 reg |= JZ_NAND_ECC_CTRL_PAR_READY;
127 writel(reg, bch->base + JZ_REG_NAND_ECC_CTRL);
128
129 do {
130 status = readl(bch->base + JZ_REG_NAND_IRQ_STAT);
131 } while (!(status & JZ_NAND_STATUS_DEC_FINISH) && --timeout);
132
133 if (timeout == 0)
134 return -ETIMEDOUT;
135
136 reg = readl(bch->base + JZ_REG_NAND_ECC_CTRL);
137 reg &= ~JZ_NAND_ECC_CTRL_ENABLE;
138 writel(reg, bch->base + JZ_REG_NAND_ECC_CTRL);
139
140 if (status & JZ_NAND_STATUS_ERROR) {
141 if (status & JZ_NAND_STATUS_UNCOR_ERROR)
142 return -EBADMSG;
143
144 error_count = (status & JZ_NAND_STATUS_ERR_COUNT) >> 29;
145
146 for (i = 0; i < error_count; ++i) {
147 error = readl(bch->base + JZ_REG_NAND_ERR(i));
148 index = ((error >> 16) & 0x1ff) - 1;
149 if (index >= 0 && index < params->size)
150 jz_nand_correct_data(buf, index, error & 0x1ff);
151 }
152
153 return error_count;
154 }
155
156 return 0;
157 }
158
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 50843 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: kbuild test robot <lkp@intel.com>
Cc: kbuild-all@01.org, David Woodhouse <dwmw2@infradead.org>,
Brian Norris <computersforpeace@gmail.com>,
Boris Brezillon <bbrezillon@kernel.org>,
Marek Vasut <marek.vasut@gmail.com>,
Richard Weinberger <richard@nod.at>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Harvey Hunt <harveyhuntnexus@gmail.com>,
Mathieu Malaterre <malat@debian.org>,
linux-mtd@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Paul Cercueil <paul@crapouillou.net>
Subject: Re: [PATCH v2 9/9] mtd: rawnand: jz4780-bch: Add support for the JZ4740
Date: Mon, 4 Feb 2019 18:02:59 +0800 [thread overview]
Message-ID: <201902041853.7GbN5MZX%fengguang.wu@intel.com> (raw)
In-Reply-To: <20190202231926.2444-10-paul@crapouillou.net>
[-- Attachment #1: Type: text/plain, Size: 5966 bytes --]
Hi Paul,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on mtd/nand/next]
[also build test ERROR on v5.0-rc4]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Paul-Cercueil/Ingenic-JZ4780-NAND-patchset-v2/20190204-163709
base: git://git.infradead.org/linux-mtd.git nand/next
config: sh-allmodconfig (attached as .config)
compiler: sh4-linux-gnu-gcc (Debian 8.2.0-11) 8.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=8.2.0 make.cross ARCH=sh
All errors (new ones prefixed by >>):
drivers/mtd/nand/raw/ingenic/jz4740_bch.c: In function 'jz4740_bch_init':
>> drivers/mtd/nand/raw/ingenic/jz4740_bch.c:46:2: error: implicit declaration of function 'writel' [-Werror=implicit-function-declaration]
writel(0, bch->base + JZ_REG_NAND_IRQ_STAT);
^~~~~~
>> drivers/mtd/nand/raw/ingenic/jz4740_bch.c:49:8: error: implicit declaration of function 'readl' [-Werror=implicit-function-declaration]
reg = readl(bch->base + JZ_REG_NAND_ECC_CTRL);
^~~~~
drivers/mtd/nand/raw/ingenic/jz4740_bch.c: In function 'jz4740_bch_calculate':
>> drivers/mtd/nand/raw/ingenic/jz4740_bch.c:83:17: error: implicit declaration of function 'readb' [-Werror=implicit-function-declaration]
ecc_code[i] = readb(bch->base + JZ_REG_NAND_PAR0 + i);
^~~~~
drivers/mtd/nand/raw/ingenic/jz4740_bch.c: In function 'jz4740_bch_correct':
>> drivers/mtd/nand/raw/ingenic/jz4740_bch.c:123:3: error: implicit declaration of function 'writeb'; did you mean 'up_write'? [-Werror=implicit-function-declaration]
writeb(ecc_code[i], bch->base + JZ_REG_NAND_PAR0 + i);
^~~~~~
up_write
cc1: some warnings being treated as errors
vim +/writel +46 drivers/mtd/nand/raw/ingenic/jz4740_bch.c
40
41 static void jz4740_bch_init(struct jz4780_bch *bch, bool encode)
42 {
43 uint32_t reg;
44
45 /* Clear interrupt status */
> 46 writel(0, bch->base + JZ_REG_NAND_IRQ_STAT);
47
48 /* Initialize and enable BCH */
> 49 reg = readl(bch->base + JZ_REG_NAND_ECC_CTRL);
50 reg |= JZ_NAND_ECC_CTRL_RESET;
51 reg |= JZ_NAND_ECC_CTRL_ENABLE;
52 reg |= JZ_NAND_ECC_CTRL_RS;
53 if (encode)
54 reg |= JZ_NAND_ECC_CTRL_ENCODING;
55 else
56 reg &= ~JZ_NAND_ECC_CTRL_ENCODING;
57
58 writel(reg, bch->base + JZ_REG_NAND_ECC_CTRL);
59 }
60
61 static int jz4740_bch_calculate(struct jz4780_bch *bch,
62 struct jz4780_bch_params *params,
63 const u8 *buf, u8 *ecc_code)
64 {
65 uint32_t reg, status;
66 unsigned int timeout = 1000;
67 int i;
68
69 jz4740_bch_init(bch, true);
70
71 do {
72 status = readl(bch->base + JZ_REG_NAND_IRQ_STAT);
73 } while (!(status & JZ_NAND_STATUS_ENC_FINISH) && --timeout);
74
75 if (timeout == 0)
76 return -ETIMEDOUT;
77
78 reg = readl(bch->base + JZ_REG_NAND_ECC_CTRL);
79 reg &= ~JZ_NAND_ECC_CTRL_ENABLE;
80 writel(reg, bch->base + JZ_REG_NAND_ECC_CTRL);
81
82 for (i = 0; i < params->bytes; ++i)
> 83 ecc_code[i] = readb(bch->base + JZ_REG_NAND_PAR0 + i);
84
85 /* If the written data is completely 0xff, we also want to write 0xff as
86 * ecc, otherwise we will get in trouble when doing subpage writes.
87 */
88 if (memcmp(ecc_code, empty_block_ecc, ARRAY_SIZE(empty_block_ecc)) == 0)
89 memset(ecc_code, 0xff, ARRAY_SIZE(empty_block_ecc));
90
91 return 0;
92 }
93
94 static void jz_nand_correct_data(uint8_t *buf, int index, int mask)
95 {
96 int offset = index & 0x7;
97 uint16_t data;
98
99 index += (index >> 3);
100
101 data = buf[index];
102 data |= buf[index + 1] << 8;
103
104 mask ^= (data >> offset) & 0x1ff;
105 data &= ~(0x1ff << offset);
106 data |= (mask << offset);
107
108 buf[index] = data & 0xff;
109 buf[index + 1] = (data >> 8) & 0xff;
110 }
111
112 static int jz4740_bch_correct(struct jz4780_bch *bch,
113 struct jz4780_bch_params *params,
114 u8 *buf, u8 *ecc_code)
115 {
116 int i, error_count, index;
117 uint32_t reg, status, error;
118 unsigned int timeout = 1000;
119
120 jz4740_bch_init(bch, false);
121
122 for (i = 0; i < params->bytes; ++i)
> 123 writeb(ecc_code[i], bch->base + JZ_REG_NAND_PAR0 + i);
124
125 reg = readl(bch->base + JZ_REG_NAND_ECC_CTRL);
126 reg |= JZ_NAND_ECC_CTRL_PAR_READY;
127 writel(reg, bch->base + JZ_REG_NAND_ECC_CTRL);
128
129 do {
130 status = readl(bch->base + JZ_REG_NAND_IRQ_STAT);
131 } while (!(status & JZ_NAND_STATUS_DEC_FINISH) && --timeout);
132
133 if (timeout == 0)
134 return -ETIMEDOUT;
135
136 reg = readl(bch->base + JZ_REG_NAND_ECC_CTRL);
137 reg &= ~JZ_NAND_ECC_CTRL_ENABLE;
138 writel(reg, bch->base + JZ_REG_NAND_ECC_CTRL);
139
140 if (status & JZ_NAND_STATUS_ERROR) {
141 if (status & JZ_NAND_STATUS_UNCOR_ERROR)
142 return -EBADMSG;
143
144 error_count = (status & JZ_NAND_STATUS_ERR_COUNT) >> 29;
145
146 for (i = 0; i < error_count; ++i) {
147 error = readl(bch->base + JZ_REG_NAND_ERR(i));
148 index = ((error >> 16) & 0x1ff) - 1;
149 if (index >= 0 && index < params->size)
150 jz_nand_correct_data(buf, index, error & 0x1ff);
151 }
152
153 return error_count;
154 }
155
156 return 0;
157 }
158
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 50843 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: kbuild test robot <lkp@intel.com>
To: Paul Cercueil <paul@crapouillou.net>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org,
Boris Brezillon <bbrezillon@kernel.org>,
Mathieu Malaterre <malat@debian.org>,
Richard Weinberger <richard@nod.at>,
linux-kernel@vger.kernel.org,
Paul Cercueil <paul@crapouillou.net>,
Marek Vasut <marek.vasut@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
linux-mtd@lists.infradead.org, kbuild-all@01.org,
Harvey Hunt <harveyhuntnexus@gmail.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Brian Norris <computersforpeace@gmail.com>,
David Woodhouse <dwmw2@infradead.org>
Subject: Re: [PATCH v2 9/9] mtd: rawnand: jz4780-bch: Add support for the JZ4740
Date: Mon, 4 Feb 2019 18:02:59 +0800 [thread overview]
Message-ID: <201902041853.7GbN5MZX%fengguang.wu@intel.com> (raw)
In-Reply-To: <20190202231926.2444-10-paul@crapouillou.net>
[-- Attachment #1: Type: text/plain, Size: 5966 bytes --]
Hi Paul,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on mtd/nand/next]
[also build test ERROR on v5.0-rc4]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Paul-Cercueil/Ingenic-JZ4780-NAND-patchset-v2/20190204-163709
base: git://git.infradead.org/linux-mtd.git nand/next
config: sh-allmodconfig (attached as .config)
compiler: sh4-linux-gnu-gcc (Debian 8.2.0-11) 8.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=8.2.0 make.cross ARCH=sh
All errors (new ones prefixed by >>):
drivers/mtd/nand/raw/ingenic/jz4740_bch.c: In function 'jz4740_bch_init':
>> drivers/mtd/nand/raw/ingenic/jz4740_bch.c:46:2: error: implicit declaration of function 'writel' [-Werror=implicit-function-declaration]
writel(0, bch->base + JZ_REG_NAND_IRQ_STAT);
^~~~~~
>> drivers/mtd/nand/raw/ingenic/jz4740_bch.c:49:8: error: implicit declaration of function 'readl' [-Werror=implicit-function-declaration]
reg = readl(bch->base + JZ_REG_NAND_ECC_CTRL);
^~~~~
drivers/mtd/nand/raw/ingenic/jz4740_bch.c: In function 'jz4740_bch_calculate':
>> drivers/mtd/nand/raw/ingenic/jz4740_bch.c:83:17: error: implicit declaration of function 'readb' [-Werror=implicit-function-declaration]
ecc_code[i] = readb(bch->base + JZ_REG_NAND_PAR0 + i);
^~~~~
drivers/mtd/nand/raw/ingenic/jz4740_bch.c: In function 'jz4740_bch_correct':
>> drivers/mtd/nand/raw/ingenic/jz4740_bch.c:123:3: error: implicit declaration of function 'writeb'; did you mean 'up_write'? [-Werror=implicit-function-declaration]
writeb(ecc_code[i], bch->base + JZ_REG_NAND_PAR0 + i);
^~~~~~
up_write
cc1: some warnings being treated as errors
vim +/writel +46 drivers/mtd/nand/raw/ingenic/jz4740_bch.c
40
41 static void jz4740_bch_init(struct jz4780_bch *bch, bool encode)
42 {
43 uint32_t reg;
44
45 /* Clear interrupt status */
> 46 writel(0, bch->base + JZ_REG_NAND_IRQ_STAT);
47
48 /* Initialize and enable BCH */
> 49 reg = readl(bch->base + JZ_REG_NAND_ECC_CTRL);
50 reg |= JZ_NAND_ECC_CTRL_RESET;
51 reg |= JZ_NAND_ECC_CTRL_ENABLE;
52 reg |= JZ_NAND_ECC_CTRL_RS;
53 if (encode)
54 reg |= JZ_NAND_ECC_CTRL_ENCODING;
55 else
56 reg &= ~JZ_NAND_ECC_CTRL_ENCODING;
57
58 writel(reg, bch->base + JZ_REG_NAND_ECC_CTRL);
59 }
60
61 static int jz4740_bch_calculate(struct jz4780_bch *bch,
62 struct jz4780_bch_params *params,
63 const u8 *buf, u8 *ecc_code)
64 {
65 uint32_t reg, status;
66 unsigned int timeout = 1000;
67 int i;
68
69 jz4740_bch_init(bch, true);
70
71 do {
72 status = readl(bch->base + JZ_REG_NAND_IRQ_STAT);
73 } while (!(status & JZ_NAND_STATUS_ENC_FINISH) && --timeout);
74
75 if (timeout == 0)
76 return -ETIMEDOUT;
77
78 reg = readl(bch->base + JZ_REG_NAND_ECC_CTRL);
79 reg &= ~JZ_NAND_ECC_CTRL_ENABLE;
80 writel(reg, bch->base + JZ_REG_NAND_ECC_CTRL);
81
82 for (i = 0; i < params->bytes; ++i)
> 83 ecc_code[i] = readb(bch->base + JZ_REG_NAND_PAR0 + i);
84
85 /* If the written data is completely 0xff, we also want to write 0xff as
86 * ecc, otherwise we will get in trouble when doing subpage writes.
87 */
88 if (memcmp(ecc_code, empty_block_ecc, ARRAY_SIZE(empty_block_ecc)) == 0)
89 memset(ecc_code, 0xff, ARRAY_SIZE(empty_block_ecc));
90
91 return 0;
92 }
93
94 static void jz_nand_correct_data(uint8_t *buf, int index, int mask)
95 {
96 int offset = index & 0x7;
97 uint16_t data;
98
99 index += (index >> 3);
100
101 data = buf[index];
102 data |= buf[index + 1] << 8;
103
104 mask ^= (data >> offset) & 0x1ff;
105 data &= ~(0x1ff << offset);
106 data |= (mask << offset);
107
108 buf[index] = data & 0xff;
109 buf[index + 1] = (data >> 8) & 0xff;
110 }
111
112 static int jz4740_bch_correct(struct jz4780_bch *bch,
113 struct jz4780_bch_params *params,
114 u8 *buf, u8 *ecc_code)
115 {
116 int i, error_count, index;
117 uint32_t reg, status, error;
118 unsigned int timeout = 1000;
119
120 jz4740_bch_init(bch, false);
121
122 for (i = 0; i < params->bytes; ++i)
> 123 writeb(ecc_code[i], bch->base + JZ_REG_NAND_PAR0 + i);
124
125 reg = readl(bch->base + JZ_REG_NAND_ECC_CTRL);
126 reg |= JZ_NAND_ECC_CTRL_PAR_READY;
127 writel(reg, bch->base + JZ_REG_NAND_ECC_CTRL);
128
129 do {
130 status = readl(bch->base + JZ_REG_NAND_IRQ_STAT);
131 } while (!(status & JZ_NAND_STATUS_DEC_FINISH) && --timeout);
132
133 if (timeout == 0)
134 return -ETIMEDOUT;
135
136 reg = readl(bch->base + JZ_REG_NAND_ECC_CTRL);
137 reg &= ~JZ_NAND_ECC_CTRL_ENABLE;
138 writel(reg, bch->base + JZ_REG_NAND_ECC_CTRL);
139
140 if (status & JZ_NAND_STATUS_ERROR) {
141 if (status & JZ_NAND_STATUS_UNCOR_ERROR)
142 return -EBADMSG;
143
144 error_count = (status & JZ_NAND_STATUS_ERR_COUNT) >> 29;
145
146 for (i = 0; i < error_count; ++i) {
147 error = readl(bch->base + JZ_REG_NAND_ERR(i));
148 index = ((error >> 16) & 0x1ff) - 1;
149 if (index >= 0 && index < params->size)
150 jz_nand_correct_data(buf, index, error & 0x1ff);
151 }
152
153 return error_count;
154 }
155
156 return 0;
157 }
158
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 50843 bytes --]
[-- Attachment #3: Type: text/plain, Size: 144 bytes --]
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2019-02-04 10:04 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-02 23:19 [PATCH v2 0/9] Ingenic JZ4780 NAND patchset v2 Paul Cercueil
2019-02-02 23:19 ` Paul Cercueil
2019-02-02 23:19 ` [PATCH v2 1/9] mtd: rawnand: Move drivers for Ingenic SoCs to subfolder Paul Cercueil
2019-02-02 23:19 ` Paul Cercueil
2019-02-02 23:19 ` [PATCH v2 2/9] dt-bindings: mtd: ingenic: Add compatible strings for the JZ4740 Paul Cercueil
2019-02-02 23:19 ` Paul Cercueil
2019-02-18 19:20 ` Rob Herring
2019-02-18 19:20 ` Rob Herring
2019-02-18 19:20 ` Rob Herring
2019-02-02 23:19 ` [PATCH v2 3/9] mtd: rawnand: jz4780: Use SPDX license notifiers Paul Cercueil
2019-02-02 23:19 ` Paul Cercueil
2019-02-02 23:19 ` [PATCH v2 4/9] mtd: rawnand: jz4780: Add support for the JZ4740 Paul Cercueil
2019-02-02 23:19 ` Paul Cercueil
2019-02-03 7:31 ` Boris Brezillon
2019-02-03 7:31 ` Boris Brezillon
2019-02-03 13:56 ` Paul Cercueil
2019-02-03 13:56 ` Paul Cercueil
2019-02-03 14:08 ` Boris Brezillon
2019-02-03 14:08 ` Boris Brezillon
2019-02-03 14:10 ` Paul Cercueil
2019-02-03 14:10 ` Paul Cercueil
2019-02-03 14:24 ` Boris Brezillon
2019-02-03 14:24 ` Boris Brezillon
2019-02-02 23:19 ` [PATCH v2 5/9] mtd: rawnand: jz4780: Add ooblayout for the JZ4725B Paul Cercueil
2019-02-02 23:19 ` Paul Cercueil
2019-02-03 7:21 ` Boris Brezillon
2019-02-03 7:21 ` Boris Brezillon
2019-02-02 23:19 ` [PATCH v2 6/9] mtd: rawnand: jz4780: Add ooblayout for the Qi Ben Nanonote Paul Cercueil
2019-02-02 23:19 ` Paul Cercueil
2019-02-03 7:30 ` Boris Brezillon
2019-02-03 7:30 ` Boris Brezillon
2019-02-02 23:19 ` [PATCH v2 7/9] mtd: rawnand: jz4780-bch: Separate top-level and SoC specific code Paul Cercueil
2019-02-02 23:19 ` Paul Cercueil
2019-02-02 23:19 ` [PATCH v2 8/9] mtd: rawnand: jz4780-bch: Add support for the JZ4725B Paul Cercueil
2019-02-02 23:19 ` Paul Cercueil
2019-02-02 23:19 ` [PATCH v2 9/9] mtd: rawnand: jz4780-bch: Add support for the JZ4740 Paul Cercueil
2019-02-02 23:19 ` Paul Cercueil
2019-02-03 7:35 ` Boris Brezillon
2019-02-03 7:35 ` Boris Brezillon
2019-02-03 13:58 ` Paul Cercueil
2019-02-03 13:58 ` Paul Cercueil
2019-02-03 14:16 ` Boris Brezillon
2019-02-03 14:16 ` Boris Brezillon
2019-02-03 14:56 ` Paul Cercueil
2019-02-03 14:56 ` Paul Cercueil
2019-02-03 15:07 ` Boris Brezillon
2019-02-03 15:07 ` Boris Brezillon
2019-02-03 15:41 ` Paul Cercueil
2019-02-03 15:41 ` Paul Cercueil
2019-02-04 9:26 ` kbuild test robot
2019-02-04 9:26 ` kbuild test robot
2019-02-04 9:26 ` kbuild test robot
2019-02-04 10:02 ` kbuild test robot [this message]
2019-02-04 10:02 ` kbuild test robot
2019-02-04 10:02 ` kbuild test robot
2019-02-03 7:20 ` [PATCH v2 0/9] Ingenic JZ4780 NAND patchset v2 Boris Brezillon
2019-02-03 7:20 ` Boris Brezillon
2019-02-03 13:01 ` Paul Cercueil
2019-02-03 13:01 ` Paul Cercueil
2019-02-03 14:04 ` Boris Brezillon
2019-02-03 14:04 ` Boris Brezillon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=201902041853.7GbN5MZX%fengguang.wu@intel.com \
--to=lkp@intel.com \
--cc=bbrezillon@kernel.org \
--cc=computersforpeace@gmail.com \
--cc=devicetree@vger.kernel.org \
--cc=dwmw2@infradead.org \
--cc=harveyhuntnexus@gmail.com \
--cc=kbuild-all@01.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=malat@debian.org \
--cc=marek.vasut@gmail.com \
--cc=mark.rutland@arm.com \
--cc=miquel.raynal@bootlin.com \
--cc=paul@crapouillou.net \
--cc=richard@nod.at \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.