[igt-dev] [PATCH i-g-t 0/2] Enabling gpgpu_fill and media_fill on TGL

[igt-dev] [PATCH i-g-t 0/2] Enabling gpgpu_fill and media_fill on TGL

[Katarzyna Dec]

I am resending, because patch has landed on ML some time ago,
but there was no response.

Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com>

Katarzyna Dec (2):
  lib/gpgpu_fill/tgl: Implement gpgpu_fillfunc for TGL
  lib/media_fill/tgl: Implement media_fillfunc for TGL

 lib/gpgpu_fill.c                              | 22 ++++++++++++++++
 lib/gpgpu_fill.h                              |  7 ++++++
 lib/i915/shaders/README                       |  2 ++
 .../shaders/gpgpu/gen12p1_gpgpu_kernel.asm    | 12 +++++++++
 .../shaders/media/gen12p1_media_kernel.asm    | 13 ++++++++++
 lib/intel_batchbuffer.c                       |  6 ++++-
 lib/media_fill.c                              | 25 +++++++++++++++++++
 lib/media_fill.h                              |  7 ++++++
 8 files changed, 93 insertions(+), 1 deletion(-)
 create mode 100644 lib/i915/shaders/gpgpu/gen12p1_gpgpu_kernel.asm
 create mode 100644 lib/i915/shaders/media/gen12p1_media_kernel.asm

-- 
2.20.1

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[igt-dev] [PATCH i-g-t 1/2] lib/gpgpu_fill/tgl: Implement gpgpu_fillfunc for TGL

[Katarzyna Dec]

Adding gen12p1_gpgpu_fillfunc to have gpgpu_fill running on TGL.
Gpgpu shader was generated using IGA (Intel Graphics Assembler)
based on Gen11 binary adding necessary SWSB dependencies and
changes in SEND instruction.

Shader source code and array containing its assembled version
have same names now to avoid ambiguity.

Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Signed-off-by: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 lib/gpgpu_fill.c                              | 22 +++++++++++++++++++
 lib/gpgpu_fill.h                              |  7 ++++++
 lib/i915/shaders/README                       |  2 ++
 .../shaders/gpgpu/gen12p1_gpgpu_kernel.asm    | 12 ++++++++++
 lib/intel_batchbuffer.c                       |  2 ++
 5 files changed, 45 insertions(+)
 create mode 100644 lib/i915/shaders/gpgpu/gen12p1_gpgpu_kernel.asm

diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
index 003f4616..ec7204b8 100644
--- a/lib/gpgpu_fill.c
+++ b/lib/gpgpu_fill.c
@@ -87,6 +87,19 @@ static const uint32_t gen11_gpgpu_kernel[][4] = {
 	{ 0x07800031, 0x20000a40, 0x06000e00, 0x82000010 },
 };
 
+static const uint32_t gen12p1_gpgpu_kernel[][4] = {
+	{ 0x00020061, 0x01050000, 0x00000104, 0x00000000 },
+	{ 0x00000069, 0x02058220, 0x02000024, 0x00000004 },
+	{ 0x00000061, 0x02250220, 0x000000c4, 0x00000000 },
+	{ 0x00030061, 0x04050220, 0x00460005, 0x00000000 },
+	{ 0x00010261, 0x04050220, 0x00220205, 0x00000000 },
+	{ 0x00000061, 0x04454220, 0x00000000, 0x0000000f },
+	{ 0x00040661, 0x05050220, 0x00000104, 0x00000000 },
+	{ 0x00049031, 0x00000000, 0xc0000414, 0x02a00000 },
+	{ 0x00030061, 0x70050220, 0x00460005, 0x00000000 },
+	{ 0x00040131, 0x00000004, 0x7020700c, 0x10000000 },
+};
+
 /*
  * This sets up the gpgpu pipeline,
  *
@@ -282,3 +295,12 @@ void gen11_gpgpu_fillfunc(struct intel_batchbuffer *batch,
 	__gen9_gpgpu_fillfunc(batch, dst, x, y, width, height, color,
 			      gen11_gpgpu_kernel, sizeof(gen11_gpgpu_kernel));
 }
+void gen12p1_gpgpu_fillfunc(struct intel_batchbuffer *batch,
+			  const struct igt_buf *dst,
+			  unsigned int x, unsigned int y,
+			  unsigned int width, unsigned int height,
+			  uint8_t color)
+{
+	__gen9_gpgpu_fillfunc(batch, dst, x, y, width, height, color,
+			      gen12p1_gpgpu_kernel, sizeof(gen12p1_gpgpu_kernel));
+}
diff --git a/lib/gpgpu_fill.h b/lib/gpgpu_fill.h
index e405df3e..91c7ef71 100644
--- a/lib/gpgpu_fill.h
+++ b/lib/gpgpu_fill.h
@@ -57,4 +57,11 @@ gen11_gpgpu_fillfunc(struct intel_batchbuffer *batch,
 		     unsigned int width, unsigned int height,
 		     uint8_t color);
 
+void
+gen12p1_gpgpu_fillfunc(struct intel_batchbuffer *batch,
+		       const struct igt_buf *dst,
+		       unsigned int x, unsigned int y,
+		       unsigned int width, unsigned int height,
+		       uint8_t color);
+
 #endif /* GPGPU_FILL_H */
diff --git a/lib/i915/shaders/README b/lib/i915/shaders/README
index 06b9883c..6f80111b 100644
--- a/lib/i915/shaders/README
+++ b/lib/i915/shaders/README
@@ -23,3 +23,5 @@ Commands used to generate the shader on gen8
 $> m4 media_fill.gxa > media_fill.gxm
 $> intel-gen4asm -g 8 -o <output> media_fill.gxm
 
+Gen11+ shader is generated using IGA (Intel Graphics Assembler).
+Binary can no longer be generated using intel-gen4asm.
diff --git a/lib/i915/shaders/gpgpu/gen12p1_gpgpu_kernel.asm b/lib/i915/shaders/gpgpu/gen12p1_gpgpu_kernel.asm
new file mode 100644
index 00000000..ede87a05
--- /dev/null
+++ b/lib/i915/shaders/gpgpu/gen12p1_gpgpu_kernel.asm
@@ -0,0 +1,12 @@
+L0:
+         mov (4|M0)               r1.0<1>:ub    r1.0<0;1,0>:ub
+         shl (1|M0)               r2.0<1>:ud    r0.1<0;1,0>:ud    0x4:ud
+         mov (1|M0)               r2.1<1>:ud    r0.6<0;1,0>:ud
+         mov (8|M0)               r4.0<1>:ud    r0.0<8;8,1>:ud
+         mov (2|M0)               r4.0<1>:ud    r2.0<2;2,1>:ud                   {@2}
+         mov (1|M0)               r4.2<1>:ud    0xF:ud
+         mov (16|M0)              r5.0<1>:ud    r1.0<0;1,0>:ud                   {@6}
+         send.dc1 (16|M0)         null     r4      null    0x0         0x40A8000  {@1, $0} //    wr:2h+0, rd:0, Media Block Write msc:0, to #0
+         mov (8|M0)               r112.0<1>:ud  r0.0<8;8,1>:ud
+         send.ts (16|M0)          null     r112    null    0x10000000  0x2000010  {EOT, @1} //    wr:1+0, rd:0, fc: 0x10
+L160:
diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 07de5cbb..7fac25b8 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -901,6 +901,8 @@ igt_fillfunc_t igt_get_gpgpu_fillfunc(int devid)
 		fill = gen9_gpgpu_fillfunc;
 	else if (IS_GEN11(devid))
 		fill = gen11_gpgpu_fillfunc;
+	else if (IS_TIGERLAKE(devid))
+		fill = gen12p1_gpgpu_fillfunc;
 
 	return fill;
 }
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 2/2] lib/media_fill/tgl: Implement media_fillfunc for TGL

[Katarzyna Dec]

Adding gen12p1_media_fillfunc to have media_fill running on TGL.
Media shader was generated using IGA (Intel Graphics Assembler)
based on binary found in lib/media_fill_gen9.c to match the
changes in TGL HW. Main change was made in SEND instructions
and adding SWSB dependencies.

Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Signed-off-by: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 .../shaders/media/gen12p1_media_kernel.asm    | 13 ++++++++++
 lib/intel_batchbuffer.c                       |  4 ++-
 lib/media_fill.c                              | 25 +++++++++++++++++++
 lib/media_fill.h                              |  7 ++++++
 4 files changed, 48 insertions(+), 1 deletion(-)
 create mode 100644 lib/i915/shaders/media/gen12p1_media_kernel.asm

diff --git a/lib/i915/shaders/media/gen12p1_media_kernel.asm b/lib/i915/shaders/media/gen12p1_media_kernel.asm
new file mode 100644
index 00000000..5be229b2
--- /dev/null
+++ b/lib/i915/shaders/media/gen12p1_media_kernel.asm
@@ -0,0 +1,13 @@
+L0:
+         mov (4|M0)               r1.0<1>:ub    r1.0<0;1,0>:ub
+         mov (8|M0)               r4.0<1>:ud    r0.0<8;8,1>:ud
+         mov (8|M0)               r4.0<1>:ud    r2.0<2;2,1>:ud
+         mov (1|M0)               r4.2<1>:ud    0xF000F:ud
+         mov (16|M0)              r5.0<1>:ud    r1.0<0;1,0>:ud                   {@4}
+         mov (16|M0)              r7.0<1>:ud    r1.0<0;1,0>:ud                   {@5}
+         mov (16|M0)              r9.0<1>:ud    r1.0<0;1,0>:ud                   {@6}
+         mov (16|M0)              r11.0<1>:ud   r1.0<0;1,0>:ud                   {@7}
+         send.dc1 (16|M0)         null     r4      null    0x10000000  0x120A8000 {@1, $0} //    wr:9h+0, rd:0, Media Block Write msc:0, to #0
+         mov (8|M0)               r112.0<1>:ud  r0.0<8;8,1>:ud
+         send.ts (16|M0)          null     r112    null    0x10000000  0x2000010  {EOT, @1} //    wr:1+0, rd:0, fc: 0x10
+L176:
diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 7fac25b8..ed5e92b8 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -861,7 +861,9 @@ igt_fillfunc_t igt_get_media_fillfunc(int devid)
 {
 	igt_fillfunc_t fill = NULL;
 
-	if (IS_GEN9(devid) || IS_GEN10(devid) || IS_GEN11(devid))
+	if (IS_TIGERLAKE(devid))
+		fill = gen12p1_media_fillfunc;
+	else if (IS_GEN9(devid) || IS_GEN10(devid) || IS_GEN11(devid))
 		fill = gen9_media_fillfunc;
 	else if (IS_GEN8(devid))
 		fill = gen8_media_fillfunc;
diff --git a/lib/media_fill.c b/lib/media_fill.c
index 03b5e71e..1a356cba 100644
--- a/lib/media_fill.c
+++ b/lib/media_fill.c
@@ -101,6 +101,20 @@ static const uint32_t gen11_media_vme_kernel[][4] = {
 	{ 0x00000000, 0x00000000,  0x00000000,  0x00000000 },
 };
 
+static const uint32_t gen12p1_media_kernel[][4] = {
+	{ 0x00020061, 0x01050000, 0x00000104, 0x00000000 },
+	{ 0x00030061, 0x04050220, 0x00460005, 0x00000000 },
+	{ 0x00030061, 0x04050220, 0x00220205, 0x00000000 },
+	{ 0x00000061, 0x04454220, 0x00000000, 0x000f000f },
+	{ 0x00040461, 0x05050220, 0x00000104, 0x00000000 },
+	{ 0x00040561, 0x07050220, 0x00000104, 0x00000000 },
+	{ 0x00040661, 0x09050220, 0x00000104, 0x00000000 },
+	{ 0x00040761, 0x0b050220, 0x00000104, 0x00000000 },
+	{ 0x00049031, 0x00000000, 0xc000044c, 0x12a00000 },
+	{ 0x00030061, 0x70050220, 0x00460005, 0x00000000 },
+	{ 0x00040131, 0x00000004, 0x7020700c, 0x10000000 },
+};
+
 /*
  * This sets up the media pipeline,
  *
@@ -355,3 +369,14 @@ gen11_media_vme_func(struct intel_batchbuffer *batch,
 			       gen11_media_vme_kernel,
 			       sizeof(gen11_media_vme_kernel));
 }
+
+void
+gen12p1_media_fillfunc(struct intel_batchbuffer *batch,
+		     const struct igt_buf *dst,
+		     unsigned int x, unsigned int y,
+		     unsigned int width, unsigned int height,
+		     uint8_t color)
+{
+	__gen9_media_fillfunc(batch, dst, x, y, width, height, color,
+			      gen12p1_media_kernel, sizeof(gen12p1_media_kernel));
+}
diff --git a/lib/media_fill.h b/lib/media_fill.h
index 1d5c5fa8..a29c4043 100644
--- a/lib/media_fill.h
+++ b/lib/media_fill.h
@@ -55,4 +55,11 @@ gen11_media_vme_func(struct intel_batchbuffer *batch,
 		     unsigned int width, unsigned int height,
 		     const struct igt_buf *dst);
 
+void
+gen12p1_media_fillfunc(struct intel_batchbuffer *batch,
+		       const struct igt_buf *dst,
+		       unsigned int x, unsigned int y,
+		       unsigned int width, unsigned int height,
+		       uint8_t color);
+
 #endif /* RENDE_MEDIA_FILL_H */
-- 
2.20.1

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[igt-dev] ✓ Fi.CI.BAT: success for Enabling gpgpu_fill and media_fill on TGL

[Patchwork]

== Series Details ==

Series: Enabling gpgpu_fill and media_fill on TGL
URL   : https://patchwork.freedesktop.org/series/66661/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6889 -> IGTPW_3457
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/66661/revisions/1/mbox/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_3457:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_exec_create@basic:
    - {fi-tgl-u}:         [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/fi-tgl-u/igt@gem_exec_create@basic.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/fi-tgl-u/igt@gem_exec_create@basic.html

  
Known issues
------------

  Here are the changes found in IGTPW_3457 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_mmap_gtt@basic-copy:
    - fi-icl-u3:          [PASS][3] -> [DMESG-WARN][4] ([fdo#107724]) +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/fi-icl-u3/igt@gem_mmap_gtt@basic-copy.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/fi-icl-u3/igt@gem_mmap_gtt@basic-copy.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u2:          [PASS][5] -> [FAIL][6] ([fdo#103167])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html

  
#### Possible fixes ####

  * igt@gem_mmap_gtt@basic-write-gtt:
    - fi-icl-u3:          [DMESG-WARN][7] ([fdo#107724]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/fi-icl-u3/igt@gem_mmap_gtt@basic-write-gtt.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/fi-icl-u3/igt@gem_mmap_gtt@basic-write-gtt.html

  * igt@kms_force_connector_basic@force-edid:
    - fi-ilk-650:         [DMESG-WARN][9] ([fdo#106387]) -> [PASS][10] +1 similar issue
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/fi-ilk-650/igt@kms_force_connector_basic@force-edid.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/fi-ilk-650/igt@kms_force_connector_basic@force-edid.html

  
#### Warnings ####

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][11] ([fdo#111096]) -> [FAIL][12] ([fdo#111407])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#106387]: https://bugs.freedesktop.org/show_bug.cgi?id=106387
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407


Participating hosts (53 -> 46)
------------------------------

  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5180 -> IGTPW_3457

  CI-20190529: 20190529
  CI_DRM_6889: 1e5f271c570175c0074a9b2bc748e9f391f47221 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3457: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/
  IGT_5180: 811b10e2bd7fd2cd8ced9bbb55361c178886bbbd @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/
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[igt-dev] ✓ Fi.CI.IGT: success for Enabling gpgpu_fill and media_fill on TGL

[Patchwork]

== Series Details ==

Series: Enabling gpgpu_fill and media_fill on TGL
URL   : https://patchwork.freedesktop.org/series/66661/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6889_full -> IGTPW_3457_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/66661/revisions/1/mbox/

Known issues
------------

  Here are the changes found in IGTPW_3457_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_schedule@independent-bsd2:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#109276]) +18 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/shard-iclb1/igt@gem_exec_schedule@independent-bsd2.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/shard-iclb3/igt@gem_exec_schedule@independent-bsd2.html

  * igt@gem_exec_schedule@preemptive-hang-bsd:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#111325]) +4 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/shard-iclb7/igt@gem_exec_schedule@preemptive-hang-bsd.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/shard-iclb2/igt@gem_exec_schedule@preemptive-hang-bsd.html

  * igt@gem_persistent_relocs@forked-faulting-reloc-thrashing:
    - shard-hsw:          [PASS][5] -> [INCOMPLETE][6] ([fdo#103540]) +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/shard-hsw5/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/shard-hsw8/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
    - shard-apl:          [PASS][7] -> [DMESG-WARN][8] ([fdo#108566]) +4 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/shard-apl6/igt@i915_suspend@fence-restore-tiled2untiled.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/shard-apl1/igt@i915_suspend@fence-restore-tiled2untiled.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite:
    - shard-iclb:         [PASS][9] -> [FAIL][10] ([fdo#103167]) +5 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b-frame-sequence:
    - shard-snb:          [PASS][11] -> [SKIP][12] ([fdo#109271])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/shard-snb6/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b-frame-sequence.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/shard-snb2/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b-frame-sequence.html

  * igt@kms_psr@psr2_sprite_plane_move:
    - shard-iclb:         [PASS][13] -> [SKIP][14] ([fdo#109441]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/shard-iclb4/igt@kms_psr@psr2_sprite_plane_move.html

  * igt@kms_setmode@basic:
    - shard-hsw:          [PASS][15] -> [FAIL][16] ([fdo#99912])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/shard-hsw5/igt@kms_setmode@basic.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/shard-hsw6/igt@kms_setmode@basic.html

  
#### Possible fixes ####

  * igt@gem_cpu_reloc@full:
    - shard-apl:          [INCOMPLETE][17] ([fdo#103927]) -> [PASS][18] +2 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/shard-apl8/igt@gem_cpu_reloc@full.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/shard-apl1/igt@gem_cpu_reloc@full.html

  * igt@gem_ctx_switch@legacy-bsd2-heavy:
    - shard-iclb:         [SKIP][19] ([fdo#109276]) -> [PASS][20] +12 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/shard-iclb7/igt@gem_ctx_switch@legacy-bsd2-heavy.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/shard-iclb2/igt@gem_ctx_switch@legacy-bsd2-heavy.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [SKIP][21] ([fdo#110854]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/shard-iclb7/igt@gem_exec_balancer@smoke.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/shard-iclb1/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_schedule@independent-bsd:
    - shard-iclb:         [SKIP][23] ([fdo#111325]) -> [PASS][24] +5 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/shard-iclb4/igt@gem_exec_schedule@independent-bsd.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/shard-iclb5/igt@gem_exec_schedule@independent-bsd.html

  * igt@i915_suspend@debugfs-reader:
    - shard-apl:          [DMESG-WARN][25] ([fdo#108566]) -> [PASS][26] +4 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/shard-apl4/igt@i915_suspend@debugfs-reader.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/shard-apl1/igt@i915_suspend@debugfs-reader.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite:
    - shard-iclb:         [FAIL][27] ([fdo#103167]) -> [PASS][28] +2 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/shard-iclb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
    - shard-kbl:          [INCOMPLETE][29] ([fdo#103665]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/shard-kbl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html

  * igt@kms_psr@psr2_dpms:
    - shard-iclb:         [SKIP][31] ([fdo#109441]) -> [PASS][32] +1 similar issue
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/shard-iclb1/igt@kms_psr@psr2_dpms.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/shard-iclb2/igt@kms_psr@psr2_dpms.html

  * igt@kms_psr@suspend:
    - shard-iclb:         [INCOMPLETE][33] ([fdo#107713]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/shard-iclb3/igt@kms_psr@suspend.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/shard-iclb3/igt@kms_psr@suspend.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [SKIP][35] ([fdo#109276]) -> [FAIL][36] ([fdo#111329])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/shard-iclb5/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv.html

  * igt@gem_mocs_settings@mocs-rc6-bsd2:
    - shard-iclb:         [SKIP][37] ([fdo#109276]) -> [FAIL][38] ([fdo#111330])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/shard-iclb3/igt@gem_mocs_settings@mocs-rc6-bsd2.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/shard-iclb2/igt@gem_mocs_settings@mocs-rc6-bsd2.html

  * igt@gem_mocs_settings@mocs-reset-bsd2:
    - shard-iclb:         [FAIL][39] ([fdo#111330]) -> [SKIP][40] ([fdo#109276]) +1 similar issue
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6889/shard-iclb2/igt@gem_mocs_settings@mocs-reset-bsd2.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/shard-iclb6/igt@gem_mocs_settings@mocs-reset-bsd2.html

  
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
  [fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
  [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (10 -> 6)
------------------------------

  Missing    (4): pig-skl-6260u shard-skl pig-hsw-4770r pig-glk-j5005 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5180 -> IGTPW_3457
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_6889: 1e5f271c570175c0074a9b2bc748e9f391f47221 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3457: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/
  IGT_5180: 811b10e2bd7fd2cd8ced9bbb55361c178886bbbd @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3457/
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Re: [igt-dev] [PATCH i-g-t 0/2] Enabling gpgpu_fill and media_fill on TGL

[Arkadiusz Hiler]

On Fri, Sep 13, 2019 at 02:49:01PM +0200, Katarzyna Dec wrote:
> I am resending, because patch has landed on ML some time ago,
> but there was no response.

I am tryboting the same series + HAX patch that forces *_fill tests with
BAT execution. TGL seesm to be back to life, so we should get some
verification of it working:

https://patchwork.freedesktop.org/series/66765/
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Re: [igt-dev] [PATCH i-g-t 1/2] lib/gpgpu_fill/tgl: Implement gpgpu_fillfunc for TGL

[Arkadiusz Hiler]

On Fri, Sep 13, 2019 at 02:49:02PM +0200, Katarzyna Dec wrote:
> Adding gen12p1_gpgpu_fillfunc to have gpgpu_fill running on TGL.
> Gpgpu shader was generated using IGA (Intel Graphics Assembler)
> based on Gen11 binary adding necessary SWSB dependencies and
> changes in SEND instruction.
> 
> Shader source code and array containing its assembled version
> have same names now to avoid ambiguity.
> 
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
> Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> Signed-off-by: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  lib/gpgpu_fill.c                              | 22 +++++++++++++++++++
>  lib/gpgpu_fill.h                              |  7 ++++++
>  lib/i915/shaders/README                       |  2 ++
>  .../shaders/gpgpu/gen12p1_gpgpu_kernel.asm    | 12 ++++++++++
>  lib/intel_batchbuffer.c                       |  2 ++
>  5 files changed, 45 insertions(+)
>  create mode 100644 lib/i915/shaders/gpgpu/gen12p1_gpgpu_kernel.asm
> 
> diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
> index 003f4616..ec7204b8 100644
> --- a/lib/gpgpu_fill.c
> +++ b/lib/gpgpu_fill.c
> @@ -87,6 +87,19 @@ static const uint32_t gen11_gpgpu_kernel[][4] = {
>  	{ 0x07800031, 0x20000a40, 0x06000e00, 0x82000010 },
>  };
>  
> +static const uint32_t gen12p1_gpgpu_kernel[][4] = {
> +	{ 0x00020061, 0x01050000, 0x00000104, 0x00000000 },
> +	{ 0x00000069, 0x02058220, 0x02000024, 0x00000004 },
> +	{ 0x00000061, 0x02250220, 0x000000c4, 0x00000000 },
> +	{ 0x00030061, 0x04050220, 0x00460005, 0x00000000 },
> +	{ 0x00010261, 0x04050220, 0x00220205, 0x00000000 },
> +	{ 0x00000061, 0x04454220, 0x00000000, 0x0000000f },
> +	{ 0x00040661, 0x05050220, 0x00000104, 0x00000000 },
> +	{ 0x00049031, 0x00000000, 0xc0000414, 0x02a00000 },
> +	{ 0x00030061, 0x70050220, 0x00460005, 0x00000000 },
> +	{ 0x00040131, 0x00000004, 0x7020700c, 0x10000000 },
> +};
> +
>  /*
>   * This sets up the gpgpu pipeline,
>   *
> @@ -282,3 +295,12 @@ void gen11_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>  	__gen9_gpgpu_fillfunc(batch, dst, x, y, width, height, color,
>  			      gen11_gpgpu_kernel, sizeof(gen11_gpgpu_kernel));
>  }
> +void gen12p1_gpgpu_fillfunc(struct intel_batchbuffer *batch,
> +			  const struct igt_buf *dst,
> +			  unsigned int x, unsigned int y,
> +			  unsigned int width, unsigned int height,
> +			  uint8_t color)
> +{
> +	__gen9_gpgpu_fillfunc(batch, dst, x, y, width, height, color,
> +			      gen12p1_gpgpu_kernel, sizeof(gen12p1_gpgpu_kernel));
> +}
> diff --git a/lib/gpgpu_fill.h b/lib/gpgpu_fill.h
> index e405df3e..91c7ef71 100644
> --- a/lib/gpgpu_fill.h
> +++ b/lib/gpgpu_fill.h
> @@ -57,4 +57,11 @@ gen11_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>  		     unsigned int width, unsigned int height,
>  		     uint8_t color);
>  
> +void
> +gen12p1_gpgpu_fillfunc(struct intel_batchbuffer *batch,
> +		       const struct igt_buf *dst,
> +		       unsigned int x, unsigned int y,
> +		       unsigned int width, unsigned int height,
> +		       uint8_t color);
> +
>  #endif /* GPGPU_FILL_H */
> diff --git a/lib/i915/shaders/README b/lib/i915/shaders/README
> index 06b9883c..6f80111b 100644
> --- a/lib/i915/shaders/README
> +++ b/lib/i915/shaders/README
> @@ -23,3 +23,5 @@ Commands used to generate the shader on gen8
>  $> m4 media_fill.gxa > media_fill.gxm
>  $> intel-gen4asm -g 8 -o <output> media_fill.gxm
>  
> +Gen11+ shader is generated using IGA (Intel Graphics Assembler).
> +Binary can no longer be generated using intel-gen4asm.
> diff --git a/lib/i915/shaders/gpgpu/gen12p1_gpgpu_kernel.asm b/lib/i915/shaders/gpgpu/gen12p1_gpgpu_kernel.asm
> new file mode 100644
> index 00000000..ede87a05
> --- /dev/null
> +++ b/lib/i915/shaders/gpgpu/gen12p1_gpgpu_kernel.asm
> @@ -0,0 +1,12 @@
> +L0:
> +         mov (4|M0)               r1.0<1>:ub    r1.0<0;1,0>:ub
> +         shl (1|M0)               r2.0<1>:ud    r0.1<0;1,0>:ud    0x4:ud
> +         mov (1|M0)               r2.1<1>:ud    r0.6<0;1,0>:ud
> +         mov (8|M0)               r4.0<1>:ud    r0.0<8;8,1>:ud
> +         mov (2|M0)               r4.0<1>:ud    r2.0<2;2,1>:ud                   {@2}
> +         mov (1|M0)               r4.2<1>:ud    0xF:ud
> +         mov (16|M0)              r5.0<1>:ud    r1.0<0;1,0>:ud                   {@6}
> +         send.dc1 (16|M0)         null     r4      null    0x0         0x40A8000  {@1, $0} //    wr:2h+0, rd:0, Media Block Write msc:0, to #0
> +         mov (8|M0)               r112.0<1>:ud  r0.0<8;8,1>:ud
> +         send.ts (16|M0)          null     r112    null    0x10000000  0x2000010  {EOT, @1} //    wr:1+0, rd:0, fc: 0x10
> +L160:
> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> index 07de5cbb..7fac25b8 100644
> --- a/lib/intel_batchbuffer.c
> +++ b/lib/intel_batchbuffer.c
> @@ -901,6 +901,8 @@ igt_fillfunc_t igt_get_gpgpu_fillfunc(int devid)
>  		fill = gen9_gpgpu_fillfunc;
>  	else if (IS_GEN11(devid))
>  		fill = gen11_gpgpu_fillfunc;
> +	else if (IS_TIGERLAKE(devid))
> +		fill = gen12p1_gpgpu_fillfunc;

I find this naming a bit odd.

If you don't want to overenable it for all GEN12 because you don't know
what the future brings I think we should go with tgl_*_fillfunc, so it's
closer to what we do in kernel (using platform codenames as function
prefixes). This way it isalso  direcly related to check
(IS_TIGERLAKE()).

If it proves to be generic then we can alway change the check to
IS_GEN12() or whatever and rename the function accordingly.

This applies to the media variant too.

Other than that looks good, let's see what the CI says.

-- 
Cheers,
Arek
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Re: [igt-dev] [PATCH i-g-t 1/2] lib/gpgpu_fill/tgl: Implement gpgpu_fillfunc for TGL

[Caz Yokoyama]

On Fri, 2019-09-13 at 14:49 +0200, Katarzyna Dec wrote:
> Adding gen12p1_gpgpu_fillfunc to have gpgpu_fill running on TGL.
> Gpgpu shader was generated using IGA (Intel Graphics Assembler)
> based on Gen11 binary adding necessary SWSB dependencies and
> changes in SEND instruction.
> 
> Shader source code and array containing its assembled version
> have same names now to avoid ambiguity.
> 
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
> Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> Signed-off-by: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  lib/gpgpu_fill.c                              | 22
> +++++++++++++++++++
>  lib/gpgpu_fill.h                              |  7 ++++++
>  lib/i915/shaders/README                       |  2 ++
>  .../shaders/gpgpu/gen12p1_gpgpu_kernel.asm    | 12 ++++++++++
>  lib/intel_batchbuffer.c                       |  2 ++
>  5 files changed, 45 insertions(+)
>  create mode 100644 lib/i915/shaders/gpgpu/gen12p1_gpgpu_kernel.asm
> 
> diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
> index 003f4616..ec7204b8 100644
> --- a/lib/gpgpu_fill.c
> +++ b/lib/gpgpu_fill.c
> @@ -87,6 +87,19 @@ static const uint32_t gen11_gpgpu_kernel[][4] = {
>  	{ 0x07800031, 0x20000a40, 0x06000e00, 0x82000010 },
>  };
>  
> +static const uint32_t gen12p1_gpgpu_kernel[][4] = {
> +	{ 0x00020061, 0x01050000, 0x00000104, 0x00000000 },
> +	{ 0x00000069, 0x02058220, 0x02000024, 0x00000004 },
> +	{ 0x00000061, 0x02250220, 0x000000c4, 0x00000000 },
> +	{ 0x00030061, 0x04050220, 0x00460005, 0x00000000 },
> +	{ 0x00010261, 0x04050220, 0x00220205, 0x00000000 },
> +	{ 0x00000061, 0x04454220, 0x00000000, 0x0000000f },
> +	{ 0x00040661, 0x05050220, 0x00000104, 0x00000000 },
> +	{ 0x00049031, 0x00000000, 0xc0000414, 0x02a00000 },
> +	{ 0x00030061, 0x70050220, 0x00460005, 0x00000000 },
> +	{ 0x00040131, 0x00000004, 0x7020700c, 0x10000000 },
> +};
> +
>  /*
>   * This sets up the gpgpu pipeline,
>   *
> @@ -282,3 +295,12 @@ void gen11_gpgpu_fillfunc(struct
> intel_batchbuffer *batch,
>  	__gen9_gpgpu_fillfunc(batch, dst, x, y, width, height, color,
>  			      gen11_gpgpu_kernel,
> sizeof(gen11_gpgpu_kernel));
>  }
> +void gen12p1_gpgpu_fillfunc(struct intel_batchbuffer *batch,
> +			  const struct igt_buf *dst,
> +			  unsigned int x, unsigned int y,
> +			  unsigned int width, unsigned int height,
> +			  uint8_t color)
> +{
> +	__gen9_gpgpu_fillfunc(batch, dst, x, y, width, height, color,
> +			      gen12p1_gpgpu_kernel,
> sizeof(gen12p1_gpgpu_kernel));
> +}
> diff --git a/lib/gpgpu_fill.h b/lib/gpgpu_fill.h
> index e405df3e..91c7ef71 100644
> --- a/lib/gpgpu_fill.h
> +++ b/lib/gpgpu_fill.h
> @@ -57,4 +57,11 @@ gen11_gpgpu_fillfunc(struct intel_batchbuffer
> *batch,
>  		     unsigned int width, unsigned int height,
>  		     uint8_t color);
>  
> +void
> +gen12p1_gpgpu_fillfunc(struct intel_batchbuffer *batch,
> +		       const struct igt_buf *dst,
> +		       unsigned int x, unsigned int y,
> +		       unsigned int width, unsigned int height,
> +		       uint8_t color);
> +
>  #endif /* GPGPU_FILL_H */
> diff --git a/lib/i915/shaders/README b/lib/i915/shaders/README
> index 06b9883c..6f80111b 100644
> --- a/lib/i915/shaders/README
> +++ b/lib/i915/shaders/README
> @@ -23,3 +23,5 @@ Commands used to generate the shader on gen8
>  $> m4 media_fill.gxa > media_fill.gxm
>  $> intel-gen4asm -g 8 -o <output> media_fill.gxm
>  
> +Gen11+ shader is generated using IGA (Intel Graphics Assembler).
> +Binary can no longer be generated using intel-gen4asm.
> diff --git a/lib/i915/shaders/gpgpu/gen12p1_gpgpu_kernel.asm
> b/lib/i915/shaders/gpgpu/gen12p1_gpgpu_kernel.asm
> new file mode 100644
> index 00000000..ede87a05
> --- /dev/null
> +++ b/lib/i915/shaders/gpgpu/gen12p1_gpgpu_kernel.asm
> @@ -0,0 +1,12 @@
> +L0:
> +         mov (4|M0)               r1.0<1>:ub    r1.0<0;1,0>:ub
> +         shl
> (1|M0)               r2.0<1>:ud    r0.1<0;1,0>:ud    0x4:ud
> +         mov (1|M0)               r2.1<1>:ud    r0.6<0;1,0>:ud
> +         mov (8|M0)               r4.0<1>:ud    r0.0<8;8,1>:ud
> +         mov
> (2|M0)               r4.0<1>:ud    r2.0<2;2,1>:ud                   
> {@2}
> +         mov (1|M0)               r4.2<1>:ud    0xF:ud
> +         mov
> (16|M0)              r5.0<1>:ud    r1.0<0;1,0>:ud                   
> {@6}
> +         send.dc1
> (16|M0)         null     r4      null    0x0         0x40A8000  {@1,
> $0} //    wr:2h+0, rd:0, Media Block Write msc:0, to #0
> +         mov (8|M0)               r112.0<1>:ud  r0.0<8;8,1>:ud
> +         send.ts
> (16|M0)          null     r112    null    0x10000000  0x2000010  {EOT
> , @1} //    wr:1+0, rd:0, fc: 0x10
> +L160:
> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> index 07de5cbb..7fac25b8 100644
> --- a/lib/intel_batchbuffer.c
> +++ b/lib/intel_batchbuffer.c
> @@ -901,6 +901,8 @@ igt_fillfunc_t igt_get_gpgpu_fillfunc(int devid)
>  		fill = gen9_gpgpu_fillfunc;
>  	else if (IS_GEN11(devid))
>  		fill = gen11_gpgpu_fillfunc;
> +	else if (IS_TIGERLAKE(devid))
Same as another patch, IS_GEN12(devid).

> +		fill = gen12p1_gpgpu_fillfunc;
>  
>  	return fill;
>  }

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Re: [igt-dev] [PATCH i-g-t 1/2] lib/gpgpu_fill/tgl: Implement gpgpu_fillfunc for TGL

[Ashutosh Dixit]

On Fri, 13 Sep 2019 05:49:02 -0700, Katarzyna Dec wrote:
>
> Adding gen12p1_gpgpu_fillfunc to have gpgpu_fill running on TGL.
> Gpgpu shader was generated using IGA (Intel Graphics Assembler)
> based on Gen11 binary adding necessary SWSB dependencies and
> changes in SEND instruction.
>
> Shader source code and array containing its assembled version
> have same names now to avoid ambiguity.

[snip]

> --- a/lib/i915/shaders/README
> +++ b/lib/i915/shaders/README
> @@ -23,3 +23,5 @@ Commands used to generate the shader on gen8
>  $> m4 media_fill.gxa > media_fill.gxm
>  $> intel-gen4asm -g 8 -o <output> media_fill.gxm
>
> +Gen11+ shader is generated using IGA (Intel Graphics Assembler).

Note that above in the README it seems to say Gen8+ shader is generated
using IGA, though not sure if it should be Gen9+? Perhaps we should
reconcile this new statement with the older statement?

> +Binary can no longer be generated using intel-gen4asm.
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Re: [igt-dev] [PATCH i-g-t 1/2] lib/gpgpu_fill/tgl: Implement gpgpu_fillfunc for TGL

[Kempczynski, Zbigniew]

On Mon, 2019-09-16 at 18:44 +0300, Arkadiusz Hiler wrote:
> On Fri, Sep 13, 2019 at 02:49:02PM +0200, Katarzyna Dec wrote:
> > 
> > +	else if (IS_TIGERLAKE(devid))
> > +		fill = gen12p1_gpgpu_fillfunc;
> 
> I find this naming a bit odd.
> 
> If you don't want to overenable it for all GEN12 because you don't know
> what the future brings I think we should go with tgl_*_fillfunc, so it's
> closer to what we do in kernel (using platform codenames as function
> prefixes). This way it isalso  direcly related to check
> (IS_TIGERLAKE()).
> 
> If it proves to be generic then we can alway change the check to
> IS_GEN12() or whatever and rename the function accordingly.
> 
> This applies to the media variant too.
> 
> Other than that looks good, let's see what the CI says.
> 

First patch version had this naming convention, tgl_ as prefix,
but we got negative feedback and suggestion that function should
contain genX in the name and selection should be using IS_TIGERLAKE()
macro. Due to many reasons naming in gen12 is not easy, so imo 
we've chosen best option.

Zbigniew
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