* [PATCH] arm64: docs: cpu-feature-registers: Document ID_AA64PFR1_EL1
@ 2019-10-23 17:52 Mark Brown
2019-10-24 10:11 ` Will Deacon
2019-10-25 15:22 ` Catalin Marinas
0 siblings, 2 replies; 4+ messages in thread
From: Mark Brown @ 2019-10-23 17:52 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon; +Cc: Mark Brown, Dave Martin, linux-arm-kernel
From: Dave Martin <Dave.Martin@arm.com>
Commit d71be2b6c0e1 ("arm64: cpufeature: Detect SSBS and advertise
to userspace") exposes ID_AA64PFR1_EL1 to userspace, but didn't
update the documentation to match.
Add it.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
This was posted by Dave as part of the BTI series as it's a dependency
for that but it's a standalone fix so reposting it separately so it
doesn't get tied up with the review of the wider series - AIUI there are
be some other versions of this in flight but whatever gets merged it
seems useful for other work so it'd be good to do so.
Documentation/arm64/cpu-feature-registers.rst | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/Documentation/arm64/cpu-feature-registers.rst b/Documentation/arm64/cpu-feature-registers.rst
index ffcf4e2c71ef..d6d1efe07d49 100644
--- a/Documentation/arm64/cpu-feature-registers.rst
+++ b/Documentation/arm64/cpu-feature-registers.rst
@@ -168,8 +168,15 @@ infrastructure:
+------------------------------+---------+---------+
- 3) MIDR_EL1 - Main ID Register
+ 3) ID_AA64PFR1_EL1 - Processor Feature Register 1
+ +------------------------------+---------+---------+
+ | Name | bits | visible |
+ +------------------------------+---------+---------+
+ | SSBS | [7-4] | y |
+ +------------------------------+---------+---------+
+
+ 4) MIDR_EL1 - Main ID Register
+------------------------------+---------+---------+
| Name | bits | visible |
+------------------------------+---------+---------+
@@ -188,7 +195,7 @@ infrastructure:
as available on the CPU where it is fetched and is not a system
wide safe value.
- 4) ID_AA64ISAR1_EL1 - Instruction set attribute register 1
+ 5) ID_AA64ISAR1_EL1 - Instruction set attribute register 1
+------------------------------+---------+---------+
| Name | bits | visible |
@@ -214,7 +221,7 @@ infrastructure:
| DPB | [3-0] | y |
+------------------------------+---------+---------+
- 5) ID_AA64MMFR2_EL1 - Memory model feature register 2
+ 6) ID_AA64MMFR2_EL1 - Memory model feature register 2
+------------------------------+---------+---------+
| Name | bits | visible |
@@ -222,7 +229,7 @@ infrastructure:
| AT | [35-32] | y |
+------------------------------+---------+---------+
- 6) ID_AA64ZFR0_EL1 - SVE feature ID register 0
+ 7) ID_AA64ZFR0_EL1 - SVE feature ID register 0
+------------------------------+---------+---------+
| Name | bits | visible |
--
2.20.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: docs: cpu-feature-registers: Document ID_AA64PFR1_EL1
2019-10-23 17:52 [PATCH] arm64: docs: cpu-feature-registers: Document ID_AA64PFR1_EL1 Mark Brown
@ 2019-10-24 10:11 ` Will Deacon
2019-10-24 10:23 ` Mark Brown
2019-10-25 15:22 ` Catalin Marinas
1 sibling, 1 reply; 4+ messages in thread
From: Will Deacon @ 2019-10-24 10:11 UTC (permalink / raw)
To: Mark Brown; +Cc: Catalin Marinas, Dave Martin, linux-arm-kernel
On Wed, Oct 23, 2019 at 06:52:22PM +0100, Mark Brown wrote:
> From: Dave Martin <Dave.Martin@arm.com>
>
> Commit d71be2b6c0e1 ("arm64: cpufeature: Detect SSBS and advertise
> to userspace") exposes ID_AA64PFR1_EL1 to userspace, but didn't
> update the documentation to match.
>
> Add it.
>
> Signed-off-by: Dave Martin <Dave.Martin@arm.com>
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
>
> This was posted by Dave as part of the BTI series as it's a dependency
> for that but it's a standalone fix so reposting it separately so it
> doesn't get tied up with the review of the wider series - AIUI there are
> be some other versions of this in flight but whatever gets merged it
> seems useful for other work so it'd be good to do so.
Do you know what the other versions of this are? I couldn't figure it out
from Dave's original posting. Either way:
Acked-by: Will Deacon <will@kernel.org>
Will
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: docs: cpu-feature-registers: Document ID_AA64PFR1_EL1
2019-10-24 10:11 ` Will Deacon
@ 2019-10-24 10:23 ` Mark Brown
0 siblings, 0 replies; 4+ messages in thread
From: Mark Brown @ 2019-10-24 10:23 UTC (permalink / raw)
To: Will Deacon; +Cc: Catalin Marinas, Dave Martin, linux-arm-kernel
[-- Attachment #1.1: Type: text/plain, Size: 636 bytes --]
On Thu, Oct 24, 2019 at 11:11:10AM +0100, Will Deacon wrote:
> > This was posted by Dave as part of the BTI series as it's a dependency
> > for that but it's a standalone fix so reposting it separately so it
> > doesn't get tied up with the review of the wider series - AIUI there are
> > be some other versions of this in flight but whatever gets merged it
> > seems useful for other work so it'd be good to do so.
> Do you know what the other versions of this are? I couldn't figure it out
> from Dave's original posting. Either way:
No, I didn't manage to figure it out either.
> Acked-by: Will Deacon <will@kernel.org>
Thanks.
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[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: docs: cpu-feature-registers: Document ID_AA64PFR1_EL1
2019-10-23 17:52 [PATCH] arm64: docs: cpu-feature-registers: Document ID_AA64PFR1_EL1 Mark Brown
2019-10-24 10:11 ` Will Deacon
@ 2019-10-25 15:22 ` Catalin Marinas
1 sibling, 0 replies; 4+ messages in thread
From: Catalin Marinas @ 2019-10-25 15:22 UTC (permalink / raw)
To: Mark Brown; +Cc: Will Deacon, Dave Martin, linux-arm-kernel
On Wed, Oct 23, 2019 at 06:52:22PM +0100, Mark Brown wrote:
> From: Dave Martin <Dave.Martin@arm.com>
>
> Commit d71be2b6c0e1 ("arm64: cpufeature: Detect SSBS and advertise
> to userspace") exposes ID_AA64PFR1_EL1 to userspace, but didn't
> update the documentation to match.
>
> Add it.
>
> Signed-off-by: Dave Martin <Dave.Martin@arm.com>
> Signed-off-by: Mark Brown <broonie@kernel.org>
Queued for 5.5. Thanks.
--
Catalin
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^ permalink raw reply [flat|nested] 4+ messages in thread
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2019-10-23 17:52 [PATCH] arm64: docs: cpu-feature-registers: Document ID_AA64PFR1_EL1 Mark Brown
2019-10-24 10:11 ` Will Deacon
2019-10-24 10:23 ` Mark Brown
2019-10-25 15:22 ` Catalin Marinas
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