[RFC PATCH i-g-t v3 0/4] Calculate softpin offsets from actual page size

[RFC PATCH i-g-t v3 0/4] Calculate softpin offsets from actual page size

[Janusz Krzysztofik]

Some tests assume 4kB page size while using softpin.  That assumption
may be wrong on future GEM backends with possibly larger minimum page
sizes.  As a result, those tests may either fail on softpin at offsets
which are incorrectly aligned, may silently skip such incorrectly
aligned addresses assuming them occupied by other users, or may always
succeed when examining invalid use patterns.

Provide a helper function that detects minimum page size and returns
the size order.  Use it in test which perform softpin to calculate
offsets suitable for actually used backing store.

Changelog:
v2: Don't skip failing offsets only when on full PPGTT,
  - simplify the code by reversing the size->order conversion,
  - drop irrelevant modifications of requested object sizes.
v3: Drop patch 1/2 "Don't filter out addresses when on PPGTT" - I don't
    know how to detect if the kernel is interfering with the user's GTT,
  - introduce patch 1/4 "lib: Move redundant local helpers to lib/",
    subsequent patch will use the helper,
  - introduce patch 2/4 "lib: Add GEM minimum page size helper",
    subsequent patches will use the new helper (inspired by Chris),
  - in former patch 2/2, now 3/4, initialize page size order with an
    actual minimum returned by the new helper (inspired by Chris),
  - add a new fix for gem_ctx_shared test (patch 4/4).

Janusz Krzysztofik (4):
  lib/i915: Move redundant local helpers to lib/
  lib/i915: Add GEM minimum page size helper
  tests/gem_exec_reloc: Calculate softpin offsets from actual page size
  tests/gem_ctx_shared: Calculate object attributes from actual page size

 lib/igt_x86.c               | 13 ++++++
 lib/igt_x86.h               |  5 +++
 lib/ioctl_wrappers.c        | 82 +++++++++++++++++++++++++++++++++++++
 lib/ioctl_wrappers.h        |  1 +
 tests/i915/gem_ctx_shared.c |  6 ++-
 tests/i915/gem_exec_reloc.c | 26 ++++--------
 tests/i915/gem_softpin.c    | 13 +-----
 7 files changed, 115 insertions(+), 31 deletions(-)

-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [RFC PATCH i-g-t v3 0/4] Calculate softpin offsets from actual page size

[Janusz Krzysztofik]

Some tests assume 4kB page size while using softpin.  That assumption
may be wrong on future GEM backends with possibly larger minimum page
sizes.  As a result, those tests may either fail on softpin at offsets
which are incorrectly aligned, may silently skip such incorrectly
aligned addresses assuming them occupied by other users, or may always
succeed when examining invalid use patterns.

Provide a helper function that detects minimum page size and returns
the size order.  Use it in test which perform softpin to calculate
offsets suitable for actually used backing store.

Changelog:
v2: Don't skip failing offsets only when on full PPGTT,
  - simplify the code by reversing the size->order conversion,
  - drop irrelevant modifications of requested object sizes.
v3: Drop patch 1/2 "Don't filter out addresses when on PPGTT" - I don't
    know how to detect if the kernel is interfering with the user's GTT,
  - introduce patch 1/4 "lib: Move redundant local helpers to lib/",
    subsequent patch will use the helper,
  - introduce patch 2/4 "lib: Add GEM minimum page size helper",
    subsequent patches will use the new helper (inspired by Chris),
  - in former patch 2/2, now 3/4, initialize page size order with an
    actual minimum returned by the new helper (inspired by Chris),
  - add a new fix for gem_ctx_shared test (patch 4/4).

Janusz Krzysztofik (4):
  lib/i915: Move redundant local helpers to lib/
  lib/i915: Add GEM minimum page size helper
  tests/gem_exec_reloc: Calculate softpin offsets from actual page size
  tests/gem_ctx_shared: Calculate object attributes from actual page size

 lib/igt_x86.c               | 13 ++++++
 lib/igt_x86.h               |  5 +++
 lib/ioctl_wrappers.c        | 82 +++++++++++++++++++++++++++++++++++++
 lib/ioctl_wrappers.h        |  1 +
 tests/i915/gem_ctx_shared.c |  6 ++-
 tests/i915/gem_exec_reloc.c | 26 ++++--------
 tests/i915/gem_softpin.c    | 13 +-----
 7 files changed, 115 insertions(+), 31 deletions(-)

-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[RFC PATCH i-g-t v3 1/4] lib: Move redundant local helpers to lib/

[Janusz Krzysztofik]

Two tests - gem_exec_reloc and gem_softpin - define local helpers for
calculation of softpin offset canonical addresses.  As more users are
expected, replace those local instances with a single shared one under
lib/.

Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 lib/igt_x86.c               | 13 +++++++++++++
 lib/igt_x86.h               |  5 +++++
 tests/i915/gem_exec_reloc.c | 16 +++-------------
 tests/i915/gem_softpin.c    | 13 +------------
 4 files changed, 22 insertions(+), 25 deletions(-)

diff --git a/lib/igt_x86.c b/lib/igt_x86.c
index 6ac700df..13d7c6e5 100644
--- a/lib/igt_x86.c
+++ b/lib/igt_x86.c
@@ -190,6 +190,19 @@ char *igt_x86_features_to_string(unsigned features, char *line)
 }
 #endif
 
+/**
+ * gen8_canonical_addr
+ * Used to convert any address into canonical form, i.e. [63:48] == [47].
+ * Based on kernel's sign_extend64 implementation.
+ * @address - a virtual address
+ */
+uint64_t gen8_canonical_addr(uint64_t address)
+{
+	int shift = 63 - GEN8_HIGH_ADDRESS_BIT;
+
+	return (int64_t)(address << shift) >> shift;
+}
+
 #if defined(__x86_64__) && !defined(__clang__)
 #pragma GCC push_options
 #pragma GCC target("sse4.1")
diff --git a/lib/igt_x86.h b/lib/igt_x86.h
index c7b84dec..8c7eb5e8 100644
--- a/lib/igt_x86.h
+++ b/lib/igt_x86.h
@@ -30,6 +30,8 @@
 #ifndef IGT_X86_H
 #define IGT_X86_H
 
+#include <stdint.h>
+
 #define MMX	0x1
 #define SSE	0x2
 #define SSE2	0x4
@@ -56,6 +58,9 @@ static inline char *igt_x86_features_to_string(unsigned features, char *line)
 }
 #endif
 
+#define GEN8_HIGH_ADDRESS_BIT 47
+uint64_t gen8_canonical_addr(uint64_t address);
+
 void igt_memcpy_from_wc(void *dst, const void *src, unsigned long len);
 
 #endif /* IGT_X86_H */
diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
index fdd9661d..61f8b755 100644
--- a/tests/i915/gem_exec_reloc.c
+++ b/tests/i915/gem_exec_reloc.c
@@ -23,6 +23,7 @@
 
 #include "igt.h"
 #include "igt_dummyload.h"
+#include "igt_x86.h"
 
 IGT_TEST_DESCRIPTION("Basic sanity check of execbuf-ioctl relocations.");
 
@@ -500,17 +501,6 @@ static void basic_reloc(int fd, unsigned before, unsigned after, unsigned flags)
 	gem_close(fd, obj.handle);
 }
 
-static inline uint64_t sign_extend(uint64_t x, int index)
-{
-	int shift = 63 - index;
-	return (int64_t)(x << shift) >> shift;
-}
-
-static uint64_t gen8_canonical_address(uint64_t address)
-{
-	return sign_extend(address, 47);
-}
-
 static void basic_range(int fd, unsigned flags)
 {
 	struct drm_i915_gem_relocation_entry reloc[128];
@@ -537,7 +527,7 @@ static void basic_range(int fd, unsigned flags)
 	for (int i = 0; i <= count; i++) {
 		obj[n].handle = gem_create(fd, 4096);
 		obj[n].offset = (1ull << (i + 12)) - 4096;
-		obj[n].offset = gen8_canonical_address(obj[n].offset);
+		obj[n].offset = gen8_canonical_addr(obj[n].offset);
 		obj[n].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
 		gem_write(fd, obj[n].handle, 0, &bbe, sizeof(bbe));
 		execbuf.buffers_ptr = to_user_pointer(&obj[n]);
@@ -557,7 +547,7 @@ static void basic_range(int fd, unsigned flags)
 	for (int i = 1; i < count; i++) {
 		obj[n].handle = gem_create(fd, 4096);
 		obj[n].offset = 1ull << (i + 12);
-		obj[n].offset = gen8_canonical_address(obj[n].offset);
+		obj[n].offset = gen8_canonical_addr(obj[n].offset);
 		obj[n].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
 		gem_write(fd, obj[n].handle, 0, &bbe, sizeof(bbe));
 		execbuf.buffers_ptr = to_user_pointer(&obj[n]);
diff --git a/tests/i915/gem_softpin.c b/tests/i915/gem_softpin.c
index b9ff532e..17bd40a4 100644
--- a/tests/i915/gem_softpin.c
+++ b/tests/i915/gem_softpin.c
@@ -27,22 +27,11 @@
  */
 
 #include "igt.h"
+#include "igt_x86.h"
 
 #define EXEC_OBJECT_PINNED	(1<<4)
 #define EXEC_OBJECT_SUPPORTS_48B_ADDRESS (1<<3)
 
-/* gen8_canonical_addr
- * Used to convert any address into canonical form, i.e. [63:48] == [47].
- * Based on kernel's sign_extend64 implementation.
- * @address - a virtual address
-*/
-#define GEN8_HIGH_ADDRESS_BIT 47
-static uint64_t gen8_canonical_addr(uint64_t address)
-{
-	__u8 shift = 63 - GEN8_HIGH_ADDRESS_BIT;
-	return (__s64)(address << shift) >> shift;
-}
-
 static void test_invalid(int fd)
 {
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [RFC PATCH i-g-t v3 1/4] lib: Move redundant local helpers to lib/

[Janusz Krzysztofik]

Two tests - gem_exec_reloc and gem_softpin - define local helpers for
calculation of softpin offset canonical addresses.  As more users are
expected, replace those local instances with a single shared one under
lib/.

Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 lib/igt_x86.c               | 13 +++++++++++++
 lib/igt_x86.h               |  5 +++++
 tests/i915/gem_exec_reloc.c | 16 +++-------------
 tests/i915/gem_softpin.c    | 13 +------------
 4 files changed, 22 insertions(+), 25 deletions(-)

diff --git a/lib/igt_x86.c b/lib/igt_x86.c
index 6ac700df..13d7c6e5 100644
--- a/lib/igt_x86.c
+++ b/lib/igt_x86.c
@@ -190,6 +190,19 @@ char *igt_x86_features_to_string(unsigned features, char *line)
 }
 #endif
 
+/**
+ * gen8_canonical_addr
+ * Used to convert any address into canonical form, i.e. [63:48] == [47].
+ * Based on kernel's sign_extend64 implementation.
+ * @address - a virtual address
+ */
+uint64_t gen8_canonical_addr(uint64_t address)
+{
+	int shift = 63 - GEN8_HIGH_ADDRESS_BIT;
+
+	return (int64_t)(address << shift) >> shift;
+}
+
 #if defined(__x86_64__) && !defined(__clang__)
 #pragma GCC push_options
 #pragma GCC target("sse4.1")
diff --git a/lib/igt_x86.h b/lib/igt_x86.h
index c7b84dec..8c7eb5e8 100644
--- a/lib/igt_x86.h
+++ b/lib/igt_x86.h
@@ -30,6 +30,8 @@
 #ifndef IGT_X86_H
 #define IGT_X86_H
 
+#include <stdint.h>
+
 #define MMX	0x1
 #define SSE	0x2
 #define SSE2	0x4
@@ -56,6 +58,9 @@ static inline char *igt_x86_features_to_string(unsigned features, char *line)
 }
 #endif
 
+#define GEN8_HIGH_ADDRESS_BIT 47
+uint64_t gen8_canonical_addr(uint64_t address);
+
 void igt_memcpy_from_wc(void *dst, const void *src, unsigned long len);
 
 #endif /* IGT_X86_H */
diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
index fdd9661d..61f8b755 100644
--- a/tests/i915/gem_exec_reloc.c
+++ b/tests/i915/gem_exec_reloc.c
@@ -23,6 +23,7 @@
 
 #include "igt.h"
 #include "igt_dummyload.h"
+#include "igt_x86.h"
 
 IGT_TEST_DESCRIPTION("Basic sanity check of execbuf-ioctl relocations.");
 
@@ -500,17 +501,6 @@ static void basic_reloc(int fd, unsigned before, unsigned after, unsigned flags)
 	gem_close(fd, obj.handle);
 }
 
-static inline uint64_t sign_extend(uint64_t x, int index)
-{
-	int shift = 63 - index;
-	return (int64_t)(x << shift) >> shift;
-}
-
-static uint64_t gen8_canonical_address(uint64_t address)
-{
-	return sign_extend(address, 47);
-}
-
 static void basic_range(int fd, unsigned flags)
 {
 	struct drm_i915_gem_relocation_entry reloc[128];
@@ -537,7 +527,7 @@ static void basic_range(int fd, unsigned flags)
 	for (int i = 0; i <= count; i++) {
 		obj[n].handle = gem_create(fd, 4096);
 		obj[n].offset = (1ull << (i + 12)) - 4096;
-		obj[n].offset = gen8_canonical_address(obj[n].offset);
+		obj[n].offset = gen8_canonical_addr(obj[n].offset);
 		obj[n].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
 		gem_write(fd, obj[n].handle, 0, &bbe, sizeof(bbe));
 		execbuf.buffers_ptr = to_user_pointer(&obj[n]);
@@ -557,7 +547,7 @@ static void basic_range(int fd, unsigned flags)
 	for (int i = 1; i < count; i++) {
 		obj[n].handle = gem_create(fd, 4096);
 		obj[n].offset = 1ull << (i + 12);
-		obj[n].offset = gen8_canonical_address(obj[n].offset);
+		obj[n].offset = gen8_canonical_addr(obj[n].offset);
 		obj[n].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
 		gem_write(fd, obj[n].handle, 0, &bbe, sizeof(bbe));
 		execbuf.buffers_ptr = to_user_pointer(&obj[n]);
diff --git a/tests/i915/gem_softpin.c b/tests/i915/gem_softpin.c
index b9ff532e..17bd40a4 100644
--- a/tests/i915/gem_softpin.c
+++ b/tests/i915/gem_softpin.c
@@ -27,22 +27,11 @@
  */
 
 #include "igt.h"
+#include "igt_x86.h"
 
 #define EXEC_OBJECT_PINNED	(1<<4)
 #define EXEC_OBJECT_SUPPORTS_48B_ADDRESS (1<<3)
 
-/* gen8_canonical_addr
- * Used to convert any address into canonical form, i.e. [63:48] == [47].
- * Based on kernel's sign_extend64 implementation.
- * @address - a virtual address
-*/
-#define GEN8_HIGH_ADDRESS_BIT 47
-static uint64_t gen8_canonical_addr(uint64_t address)
-{
-	__u8 shift = 63 - GEN8_HIGH_ADDRESS_BIT;
-	return (__s64)(address << shift) >> shift;
-}
-
 static void test_invalid(int fd)
 {
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[RFC PATCH i-g-t v3 2/4] lib: Add GEM minimum page size helper

[Janusz Krzysztofik]

Some tests assume 4kB page size while using softpin.  That assumption
may be wrong on future GEM backends with possibly larger minimum page
sizes.  As a result, those tests may either fail on softpin at offsets
which are incorrectly aligned, may silently skip such incorrectly
aligned addresses assuming them occupied by other users, or may always
succeed when examining invalid use patterns.

Provide a helper function that detects minimum page size and returns
the size order.  Tests may use it to calculate softpin offsets suitable
for actually used backing store.

Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
---
 lib/ioctl_wrappers.c | 82 ++++++++++++++++++++++++++++++++++++++++++++
 lib/ioctl_wrappers.h |  1 +
 2 files changed, 83 insertions(+)

diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
index 280fdd62..a4313832 100644
--- a/lib/ioctl_wrappers.c
+++ b/lib/ioctl_wrappers.c
@@ -54,6 +54,7 @@
 #include "intel_io.h"
 #include "igt_debugfs.h"
 #include "igt_sysfs.h"
+#include "igt_x86.h"
 #include "config.h"
 
 #ifdef HAVE_VALGRIND
@@ -1157,6 +1158,87 @@ bool gem_has_softpin(int fd)
 	return has_softpin;
 }
 
+static int __min_page_size_order(int fd, struct drm_i915_gem_exec_object2 *obj,
+				 struct drm_i915_gem_execbuffer2 *eb,
+				 uint64_t offset, int min_order, int max_order)
+{
+	static const uint32_t bbe = MI_BATCH_BUFFER_END;
+	uint64_t page_size = 1ull << max_order;
+	int order;
+
+	if (max_order > min_order) {
+		/* explore upper half of the max_order@offset area */
+		order = __min_page_size_order(fd, obj, eb, offset, min_order,
+					      max_order - 1);
+		if (order < max_order)
+			return order;
+	}
+
+	obj->offset = gen8_canonical_addr(offset - page_size);
+	gem_write(fd, obj->handle, 0, &bbe, sizeof(bbe));
+	if (!__gem_execbuf(fd, eb)) {
+		/* upper half not occupied, must be the minimum */
+		igt_debug("found min page size=%#llx, size order=%d\n",
+			  (long long)page_size, max_order);
+		return max_order;
+	}
+
+	if (max_order > min_order) {
+		/* explore lower half of in case the upper half was occupied */
+		page_size >>= 1;
+		order = __min_page_size_order(fd, obj, eb, offset - page_size,
+					      min_order, max_order - 1);
+		if (order < max_order)
+			return order;
+	}
+
+	return max_order + 1;
+}
+
+/**
+ * gem_min_page_size_order:
+ * @fd: open i915 drm file descriptor
+ *
+ * This function detects the minimum size of a gem object allocated from
+ * a default backing store.  It is useful for calculating correctly aligned
+ * softpin offsets.
+ * Since size order to size conversion (size = 1 << order) is less trivial
+ * than the opposite, the function returns the size order as more handy.
+ *
+ * Returns:
+ * Size order of the minimum page size
+ */
+int gem_min_page_size_order(int fd)
+{
+	struct drm_i915_gem_exec_object2 obj;
+	struct drm_i915_gem_execbuffer2 eb;
+	uint64_t gtt_size = gem_aperture_size(fd);
+	int min_order = 12;	/* current I915_GTT_PAGE_SIZE equivalent */
+	uint64_t page_size = 1ull << min_order;
+	int max_order = 21;	/* current I915_GTT_MAX_PAGE_SIZE equivalent */
+
+	/* no softpin => 4kB page size */
+	if (!gem_has_softpin(fd))
+		return min_order;
+
+	memset(&obj, 0, sizeof(obj));
+	memset(&eb, 0, sizeof(eb));
+
+	obj.handle = gem_create(fd, page_size);
+	obj.flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
+	eb.buffers_ptr = to_user_pointer(&obj);
+	eb.buffer_count = 1;
+
+	min_order = __min_page_size_order(fd, &obj, &eb, gtt_size, min_order,
+					  max_order);
+
+	gem_close(fd, obj.handle);
+
+	igt_require(min_order <= max_order);
+
+	return min_order;
+}
+
 /**
  * gem_has_exec_fence:
  * @fd: open i915 drm file descriptor
diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h
index 03211c97..91690847 100644
--- a/lib/ioctl_wrappers.h
+++ b/lib/ioctl_wrappers.h
@@ -138,6 +138,7 @@ uint64_t gem_aperture_size(int fd);
 uint64_t gem_global_aperture_size(int fd);
 uint64_t gem_mappable_aperture_size(void);
 bool gem_has_softpin(int fd);
+int gem_min_page_size_order(int fd);
 bool gem_has_exec_fence(int fd);
 
 /* check functions which auto-skip tests by calling igt_skip() */
-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [RFC PATCH i-g-t v3 2/4] lib: Add GEM minimum page size helper

[Janusz Krzysztofik]

Some tests assume 4kB page size while using softpin.  That assumption
may be wrong on future GEM backends with possibly larger minimum page
sizes.  As a result, those tests may either fail on softpin at offsets
which are incorrectly aligned, may silently skip such incorrectly
aligned addresses assuming them occupied by other users, or may always
succeed when examining invalid use patterns.

Provide a helper function that detects minimum page size and returns
the size order.  Tests may use it to calculate softpin offsets suitable
for actually used backing store.

Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
---
 lib/ioctl_wrappers.c | 82 ++++++++++++++++++++++++++++++++++++++++++++
 lib/ioctl_wrappers.h |  1 +
 2 files changed, 83 insertions(+)

diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
index 280fdd62..a4313832 100644
--- a/lib/ioctl_wrappers.c
+++ b/lib/ioctl_wrappers.c
@@ -54,6 +54,7 @@
 #include "intel_io.h"
 #include "igt_debugfs.h"
 #include "igt_sysfs.h"
+#include "igt_x86.h"
 #include "config.h"
 
 #ifdef HAVE_VALGRIND
@@ -1157,6 +1158,87 @@ bool gem_has_softpin(int fd)
 	return has_softpin;
 }
 
+static int __min_page_size_order(int fd, struct drm_i915_gem_exec_object2 *obj,
+				 struct drm_i915_gem_execbuffer2 *eb,
+				 uint64_t offset, int min_order, int max_order)
+{
+	static const uint32_t bbe = MI_BATCH_BUFFER_END;
+	uint64_t page_size = 1ull << max_order;
+	int order;
+
+	if (max_order > min_order) {
+		/* explore upper half of the max_order@offset area */
+		order = __min_page_size_order(fd, obj, eb, offset, min_order,
+					      max_order - 1);
+		if (order < max_order)
+			return order;
+	}
+
+	obj->offset = gen8_canonical_addr(offset - page_size);
+	gem_write(fd, obj->handle, 0, &bbe, sizeof(bbe));
+	if (!__gem_execbuf(fd, eb)) {
+		/* upper half not occupied, must be the minimum */
+		igt_debug("found min page size=%#llx, size order=%d\n",
+			  (long long)page_size, max_order);
+		return max_order;
+	}
+
+	if (max_order > min_order) {
+		/* explore lower half of in case the upper half was occupied */
+		page_size >>= 1;
+		order = __min_page_size_order(fd, obj, eb, offset - page_size,
+					      min_order, max_order - 1);
+		if (order < max_order)
+			return order;
+	}
+
+	return max_order + 1;
+}
+
+/**
+ * gem_min_page_size_order:
+ * @fd: open i915 drm file descriptor
+ *
+ * This function detects the minimum size of a gem object allocated from
+ * a default backing store.  It is useful for calculating correctly aligned
+ * softpin offsets.
+ * Since size order to size conversion (size = 1 << order) is less trivial
+ * than the opposite, the function returns the size order as more handy.
+ *
+ * Returns:
+ * Size order of the minimum page size
+ */
+int gem_min_page_size_order(int fd)
+{
+	struct drm_i915_gem_exec_object2 obj;
+	struct drm_i915_gem_execbuffer2 eb;
+	uint64_t gtt_size = gem_aperture_size(fd);
+	int min_order = 12;	/* current I915_GTT_PAGE_SIZE equivalent */
+	uint64_t page_size = 1ull << min_order;
+	int max_order = 21;	/* current I915_GTT_MAX_PAGE_SIZE equivalent */
+
+	/* no softpin => 4kB page size */
+	if (!gem_has_softpin(fd))
+		return min_order;
+
+	memset(&obj, 0, sizeof(obj));
+	memset(&eb, 0, sizeof(eb));
+
+	obj.handle = gem_create(fd, page_size);
+	obj.flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
+	eb.buffers_ptr = to_user_pointer(&obj);
+	eb.buffer_count = 1;
+
+	min_order = __min_page_size_order(fd, &obj, &eb, gtt_size, min_order,
+					  max_order);
+
+	gem_close(fd, obj.handle);
+
+	igt_require(min_order <= max_order);
+
+	return min_order;
+}
+
 /**
  * gem_has_exec_fence:
  * @fd: open i915 drm file descriptor
diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h
index 03211c97..91690847 100644
--- a/lib/ioctl_wrappers.h
+++ b/lib/ioctl_wrappers.h
@@ -138,6 +138,7 @@ uint64_t gem_aperture_size(int fd);
 uint64_t gem_global_aperture_size(int fd);
 uint64_t gem_mappable_aperture_size(void);
 bool gem_has_softpin(int fd);
+int gem_min_page_size_order(int fd);
 bool gem_has_exec_fence(int fd);
 
 /* check functions which auto-skip tests by calling igt_skip() */
-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[RFC PATCH i-g-t v3 3/4] tests/gem_exec_reloc: Calculate softpin offsets from actual page size

[Janusz Krzysztofik]

From: Janusz Krzysztofik <janusz.krzysztofik@intel.com>

The basic-range subtest assumes 4kB page size while calculating softpin
offsets.  On future backends with possibly larger minimum page sizes
a half of calculated offsets to be tested may be incorrectly detected
as occupied by other users and skiped, significantly distoring the
intended test pattern.

Replace hardcoded constants corresponding to the assumed 4kB page size
with variables initialized with actual minimum page size and order.

v2: Simplify the code by reversing the size->order conversion,
  - drop irrelevant modifications of requested object sizes.
v3: Initialize page size order with an actual minimum returned by a new
    helper (inspired by Chris).

Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_reloc.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
index 61f8b755..5e7df8ed 100644
--- a/tests/i915/gem_exec_reloc.c
+++ b/tests/i915/gem_exec_reloc.c
@@ -510,14 +510,16 @@ static void basic_range(int fd, unsigned flags)
 	uint64_t gtt_size = gem_aperture_size(fd);
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
 	igt_spin_t *spin = NULL;
+	int page_order = gem_min_page_size_order(fd);
+	uint64_t page_size = 1ull << page_order;
 	int count, n;
 
 	igt_require(gem_has_softpin(fd));
 
-	for (count = 12; gtt_size >> (count + 1); count++)
+	for (count = page_order; gtt_size >> (count + 1); count++)
 		;
 
-	count -= 12;
+	count -= page_order;
 
 	memset(obj, 0, sizeof(obj));
 	memset(reloc, 0, sizeof(reloc));
@@ -526,7 +528,7 @@ static void basic_range(int fd, unsigned flags)
 	n = 0;
 	for (int i = 0; i <= count; i++) {
 		obj[n].handle = gem_create(fd, 4096);
-		obj[n].offset = (1ull << (i + 12)) - 4096;
+		obj[n].offset = (1ull << (i + page_order)) - page_size;
 		obj[n].offset = gen8_canonical_addr(obj[n].offset);
 		obj[n].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
 		gem_write(fd, obj[n].handle, 0, &bbe, sizeof(bbe));
@@ -546,7 +548,7 @@ static void basic_range(int fd, unsigned flags)
 	}
 	for (int i = 1; i < count; i++) {
 		obj[n].handle = gem_create(fd, 4096);
-		obj[n].offset = 1ull << (i + 12);
+		obj[n].offset = 1ull << (i + page_order);
 		obj[n].offset = gen8_canonical_addr(obj[n].offset);
 		obj[n].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
 		gem_write(fd, obj[n].handle, 0, &bbe, sizeof(bbe));
-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [RFC PATCH i-g-t v3 3/4] tests/gem_exec_reloc: Calculate softpin offsets from actual page size

[Janusz Krzysztofik]

From: Janusz Krzysztofik <janusz.krzysztofik@intel.com>

The basic-range subtest assumes 4kB page size while calculating softpin
offsets.  On future backends with possibly larger minimum page sizes
a half of calculated offsets to be tested may be incorrectly detected
as occupied by other users and skiped, significantly distoring the
intended test pattern.

Replace hardcoded constants corresponding to the assumed 4kB page size
with variables initialized with actual minimum page size and order.

v2: Simplify the code by reversing the size->order conversion,
  - drop irrelevant modifications of requested object sizes.
v3: Initialize page size order with an actual minimum returned by a new
    helper (inspired by Chris).

Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_reloc.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
index 61f8b755..5e7df8ed 100644
--- a/tests/i915/gem_exec_reloc.c
+++ b/tests/i915/gem_exec_reloc.c
@@ -510,14 +510,16 @@ static void basic_range(int fd, unsigned flags)
 	uint64_t gtt_size = gem_aperture_size(fd);
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
 	igt_spin_t *spin = NULL;
+	int page_order = gem_min_page_size_order(fd);
+	uint64_t page_size = 1ull << page_order;
 	int count, n;
 
 	igt_require(gem_has_softpin(fd));
 
-	for (count = 12; gtt_size >> (count + 1); count++)
+	for (count = page_order; gtt_size >> (count + 1); count++)
 		;
 
-	count -= 12;
+	count -= page_order;
 
 	memset(obj, 0, sizeof(obj));
 	memset(reloc, 0, sizeof(reloc));
@@ -526,7 +528,7 @@ static void basic_range(int fd, unsigned flags)
 	n = 0;
 	for (int i = 0; i <= count; i++) {
 		obj[n].handle = gem_create(fd, 4096);
-		obj[n].offset = (1ull << (i + 12)) - 4096;
+		obj[n].offset = (1ull << (i + page_order)) - page_size;
 		obj[n].offset = gen8_canonical_addr(obj[n].offset);
 		obj[n].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
 		gem_write(fd, obj[n].handle, 0, &bbe, sizeof(bbe));
@@ -546,7 +548,7 @@ static void basic_range(int fd, unsigned flags)
 	}
 	for (int i = 1; i < count; i++) {
 		obj[n].handle = gem_create(fd, 4096);
-		obj[n].offset = 1ull << (i + 12);
+		obj[n].offset = 1ull << (i + page_order);
 		obj[n].offset = gen8_canonical_addr(obj[n].offset);
 		obj[n].flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
 		gem_write(fd, obj[n].handle, 0, &bbe, sizeof(bbe));
-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[RFC PATCH i-g-t v3 4/4] tests/gem_ctx_shared: Calculate object attributs from actual page size

[Janusz Krzysztofik]

exec-shared-gtt-* subtests use hardcoded values for object size and
softpin offset, based on 4kB page size assumption.  That may result in
those subtests failing when run on future backing stores with possibly
larger minimum page sizes.

Replace hardcoded constants with values derived from minimum page size
of actual backing store the test is running on.

Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_ctx_shared.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/tests/i915/gem_ctx_shared.c b/tests/i915/gem_ctx_shared.c
index f7852482..d386de65 100644
--- a/tests/i915/gem_ctx_shared.c
+++ b/tests/i915/gem_ctx_shared.c
@@ -195,6 +195,7 @@ static void exec_shared_gtt(int i915, unsigned int ring)
 	uint32_t scratch, *s;
 	uint32_t batch, cs[16];
 	uint64_t offset;
+	uint64_t page_size;
 	int i;
 
 	gem_require_ring(i915, ring);
@@ -203,7 +204,8 @@ static void exec_shared_gtt(int i915, unsigned int ring)
 	clone = gem_context_clone(i915, 0, I915_CONTEXT_CLONE_VM, 0);
 
 	/* Find a hole big enough for both objects later */
-	scratch = gem_create(i915, 16384);
+	page_size = 1ull << gem_min_page_size_order(i915);
+	scratch = gem_create(i915, 4 * page_size);
 	gem_write(i915, scratch, 0, &bbe, sizeof(bbe));
 	obj.handle = scratch;
 	gem_execbuf(i915, &execbuf);
@@ -246,7 +248,7 @@ static void exec_shared_gtt(int i915, unsigned int ring)
 	gem_write(i915, batch, 0, cs, sizeof(cs));
 
 	obj.handle = batch;
-	obj.offset += 8192; /* make sure we don't cause an eviction! */
+	obj.offset += 2 * page_size; /* make sure we don't cause an eviction! */
 	execbuf.rsvd1 = clone;
 	if (gen > 3 && gen < 6)
 		execbuf.flags |= I915_EXEC_SECURE;
-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [RFC PATCH i-g-t v3 4/4] tests/gem_ctx_shared: Calculate object attributs from actual page size

[Janusz Krzysztofik]

exec-shared-gtt-* subtests use hardcoded values for object size and
softpin offset, based on 4kB page size assumption.  That may result in
those subtests failing when run on future backing stores with possibly
larger minimum page sizes.

Replace hardcoded constants with values derived from minimum page size
of actual backing store the test is running on.

Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_ctx_shared.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/tests/i915/gem_ctx_shared.c b/tests/i915/gem_ctx_shared.c
index f7852482..d386de65 100644
--- a/tests/i915/gem_ctx_shared.c
+++ b/tests/i915/gem_ctx_shared.c
@@ -195,6 +195,7 @@ static void exec_shared_gtt(int i915, unsigned int ring)
 	uint32_t scratch, *s;
 	uint32_t batch, cs[16];
 	uint64_t offset;
+	uint64_t page_size;
 	int i;
 
 	gem_require_ring(i915, ring);
@@ -203,7 +204,8 @@ static void exec_shared_gtt(int i915, unsigned int ring)
 	clone = gem_context_clone(i915, 0, I915_CONTEXT_CLONE_VM, 0);
 
 	/* Find a hole big enough for both objects later */
-	scratch = gem_create(i915, 16384);
+	page_size = 1ull << gem_min_page_size_order(i915);
+	scratch = gem_create(i915, 4 * page_size);
 	gem_write(i915, scratch, 0, &bbe, sizeof(bbe));
 	obj.handle = scratch;
 	gem_execbuf(i915, &execbuf);
@@ -246,7 +248,7 @@ static void exec_shared_gtt(int i915, unsigned int ring)
 	gem_write(i915, batch, 0, cs, sizeof(cs));
 
 	obj.handle = batch;
-	obj.offset += 8192; /* make sure we don't cause an eviction! */
+	obj.offset += 2 * page_size; /* make sure we don't cause an eviction! */
 	execbuf.rsvd1 = clone;
 	if (gen > 3 && gen < 6)
 		execbuf.flags |= I915_EXEC_SECURE;
-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[igt-dev] ✗ Fi.CI.BAT: failure for Calculate softpin offsets from actual page size

[Patchwork]

== Series Details ==

Series: Calculate softpin offsets from actual page size
URL   : https://patchwork.freedesktop.org/series/68669/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7203 -> IGTPW_3624
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_3624 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_3624, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3624/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_3624:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live_active:
    - fi-skl-guc:         [PASS][1] -> [DMESG-FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7203/fi-skl-guc/igt@i915_selftest@live_active.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3624/fi-skl-guc/igt@i915_selftest@live_active.html

  
Known issues
------------

  Here are the changes found in IGTPW_3624 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_gem_contexts:
    - fi-bsw-n3050:       [PASS][3] -> [INCOMPLETE][4] ([fdo# 111542])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7203/fi-bsw-n3050/igt@i915_selftest@live_gem_contexts.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3624/fi-bsw-n3050/igt@i915_selftest@live_gem_contexts.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u2:          [PASS][5] -> [FAIL][6] ([fdo#103167])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7203/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3624/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html

  * igt@vgem_basic@setversion:
    - fi-icl-u3:          [PASS][7] -> [DMESG-WARN][8] ([fdo#107724])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7203/fi-icl-u3/igt@vgem_basic@setversion.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3624/fi-icl-u3/igt@vgem_basic@setversion.html

  
#### Possible fixes ####

  * igt@gem_exec_basic@basic-all:
    - fi-icl-u3:          [DMESG-WARN][9] ([fdo#107724]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7203/fi-icl-u3/igt@gem_exec_basic@basic-all.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3624/fi-icl-u3/igt@gem_exec_basic@basic-all.html

  * igt@i915_selftest@live_blt:
    - fi-hsw-peppy:       [DMESG-FAIL][11] ([fdo#112147]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7203/fi-hsw-peppy/igt@i915_selftest@live_blt.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3624/fi-hsw-peppy/igt@i915_selftest@live_blt.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][13] ([fdo#111045] / [fdo#111096]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7203/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3624/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo# 111542]: https://bugs.freedesktop.org/show_bug.cgi?id= 111542
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#112147]: https://bugs.freedesktop.org/show_bug.cgi?id=112147


Participating hosts (52 -> 44)
------------------------------

  Missing    (8): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-tgl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5248 -> IGTPW_3624

  CI-20190529: 20190529
  CI_DRM_7203: 912b87256ca0b04ed5f73682068bf6062dd93e6d @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3624: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3624/index.html
  IGT_5248: 81e55f1f97d73e48f00caa7e4fb98295023c5afa @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3624/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev