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From: Jean-Philippe Brucker <jean-philippe@linaro.org>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: will@kernel.org, robh+dt@kernel.org, lorenzo.pieralisi@arm.com,
	joro@8bytes.org, baolu.lu@linux.intel.com,
	linux-doc@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org,
	corbet@lwn.net, mark.rutland@arm.com, liviu.dudau@arm.com,
	sudeep.holla@arm.com, guohanjun@huawei.com, rjw@rjwysocki.net,
	lenb@kernel.org, robin.murphy@arm.com, dwmw2@infradead.org,
	amurray@thegoodpenguin.co.uk, frowand.list@gmail.com
Subject: Re: [PATCH 02/11] PCI: Add ats_supported host bridge flag
Date: Mon, 17 Feb 2020 16:40:12 +0100	[thread overview]
Message-ID: <20200217154012.GD1650092@myrica> (raw)
In-Reply-To: <20200215211047.GA124796@google.com>

On Sat, Feb 15, 2020 at 03:10:47PM -0600, Bjorn Helgaas wrote:
> On Thu, Feb 13, 2020 at 05:50:40PM +0100, Jean-Philippe Brucker wrote:
> > Each vendor has their own way of describing whether a host bridge
> > supports ATS.  The Intel and AMD ACPI tables selectively enable or
> > disable ATS per device or sub-tree, while Arm has a single bit for each
> > host bridge.  For those that need it, add an ats_supported bit to the
> > host bridge structure.
> > 
> > Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
> > ---
> >  drivers/pci/probe.c | 7 +++++++
> >  include/linux/pci.h | 1 +
> >  2 files changed, 8 insertions(+)
> > 
> > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> > index 512cb4312ddd..75c0a25af44e 100644
> > --- a/drivers/pci/probe.c
> > +++ b/drivers/pci/probe.c
> > @@ -598,6 +598,13 @@ static void pci_init_host_bridge(struct pci_host_bridge *bridge)
> >  	bridge->native_shpc_hotplug = 1;
> >  	bridge->native_pme = 1;
> >  	bridge->native_ltr = 1;
> > +
> > +	/*
> > +	 * Some systems may disable ATS at the host bridge (ACPI IORT,
> > +	 * device-tree), other filter it with a smaller granularity (ACPI DMAR
> > +	 * and IVRS).
> > +	 */
> > +	bridge->ats_supported = 1;
> 
> The cover letter says it's important to enable ATS only if the host
> bridge supports it.  From the other patches, it looks like we learn if
> the host bridge supports ATS from either a DT "ats-supported" property
> or an ACPI IORT table.  If that's the case, shouldn't the default here
> be "ATS is *not* supported"?

The ACPI IVRS table (AMD) doesn't have a property for the host bridge, it
can only deselect ATS for a sub-range of devices. Similarly the DMAR table
(Intel) declares that ATS is supported either by the whole PCIe domain or
for sub-ranges of devices. I selected ats_supported at the bridge by
default since IVRS needs it and DMAR has its own fine-grained ATS support
configuration.

I'm still not sure this is the right approach, given that the
ats_supported bridge property doesn't exactly correspond to a firmware
property on all platforms. Maybe the device-tree implementation should
follow the IORT one where each device carries a fwspec property stating
"root-complex supports ATS". But it isn't nice either so I tried a cleaner
implementation (as discussed with Robin back on the ATS-with-SMMUv3 series
[1]).

Thanks,
Jean

[1] https://lore.kernel.org/linux-iommu/c10c7adb-c7f6-f8c6-05cc-f4f143427a2d@arm.com/

WARNING: multiple messages have this Message-ID (diff)
From: Jean-Philippe Brucker <jean-philippe@linaro.org>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: mark.rutland@arm.com, linux-doc@vger.kernel.org,
	linux-pci@vger.kernel.org, liviu.dudau@arm.com,
	guohanjun@huawei.com, frowand.list@gmail.com, corbet@lwn.net,
	will@kernel.org, linux-acpi@vger.kernel.org, lenb@kernel.org,
	devicetree@vger.kernel.org, robh+dt@kernel.org,
	linux-arm-kernel@lists.infradead.org, dwmw2@infradead.org,
	rjw@rjwysocki.net, iommu@lists.linux-foundation.org,
	sudeep.holla@arm.com, robin.murphy@arm.com,
	amurray@thegoodpenguin.co.uk
Subject: Re: [PATCH 02/11] PCI: Add ats_supported host bridge flag
Date: Mon, 17 Feb 2020 16:40:12 +0100	[thread overview]
Message-ID: <20200217154012.GD1650092@myrica> (raw)
In-Reply-To: <20200215211047.GA124796@google.com>

On Sat, Feb 15, 2020 at 03:10:47PM -0600, Bjorn Helgaas wrote:
> On Thu, Feb 13, 2020 at 05:50:40PM +0100, Jean-Philippe Brucker wrote:
> > Each vendor has their own way of describing whether a host bridge
> > supports ATS.  The Intel and AMD ACPI tables selectively enable or
> > disable ATS per device or sub-tree, while Arm has a single bit for each
> > host bridge.  For those that need it, add an ats_supported bit to the
> > host bridge structure.
> > 
> > Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
> > ---
> >  drivers/pci/probe.c | 7 +++++++
> >  include/linux/pci.h | 1 +
> >  2 files changed, 8 insertions(+)
> > 
> > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> > index 512cb4312ddd..75c0a25af44e 100644
> > --- a/drivers/pci/probe.c
> > +++ b/drivers/pci/probe.c
> > @@ -598,6 +598,13 @@ static void pci_init_host_bridge(struct pci_host_bridge *bridge)
> >  	bridge->native_shpc_hotplug = 1;
> >  	bridge->native_pme = 1;
> >  	bridge->native_ltr = 1;
> > +
> > +	/*
> > +	 * Some systems may disable ATS at the host bridge (ACPI IORT,
> > +	 * device-tree), other filter it with a smaller granularity (ACPI DMAR
> > +	 * and IVRS).
> > +	 */
> > +	bridge->ats_supported = 1;
> 
> The cover letter says it's important to enable ATS only if the host
> bridge supports it.  From the other patches, it looks like we learn if
> the host bridge supports ATS from either a DT "ats-supported" property
> or an ACPI IORT table.  If that's the case, shouldn't the default here
> be "ATS is *not* supported"?

The ACPI IVRS table (AMD) doesn't have a property for the host bridge, it
can only deselect ATS for a sub-range of devices. Similarly the DMAR table
(Intel) declares that ATS is supported either by the whole PCIe domain or
for sub-ranges of devices. I selected ats_supported at the bridge by
default since IVRS needs it and DMAR has its own fine-grained ATS support
configuration.

I'm still not sure this is the right approach, given that the
ats_supported bridge property doesn't exactly correspond to a firmware
property on all platforms. Maybe the device-tree implementation should
follow the IORT one where each device carries a fwspec property stating
"root-complex supports ATS". But it isn't nice either so I tried a cleaner
implementation (as discussed with Robin back on the ATS-with-SMMUv3 series
[1]).

Thanks,
Jean

[1] https://lore.kernel.org/linux-iommu/c10c7adb-c7f6-f8c6-05cc-f4f143427a2d@arm.com/
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Jean-Philippe Brucker <jean-philippe@linaro.org>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: mark.rutland@arm.com, linux-doc@vger.kernel.org,
	linux-pci@vger.kernel.org, liviu.dudau@arm.com,
	guohanjun@huawei.com, frowand.list@gmail.com,
	lorenzo.pieralisi@arm.com, corbet@lwn.net, will@kernel.org,
	joro@8bytes.org, linux-acpi@vger.kernel.org, lenb@kernel.org,
	devicetree@vger.kernel.org, robh+dt@kernel.org,
	linux-arm-kernel@lists.infradead.org, dwmw2@infradead.org,
	rjw@rjwysocki.net, iommu@lists.linux-foundation.org,
	sudeep.holla@arm.com, baolu.lu@linux.intel.com,
	robin.murphy@arm.com, amurray@thegoodpenguin.co.uk
Subject: Re: [PATCH 02/11] PCI: Add ats_supported host bridge flag
Date: Mon, 17 Feb 2020 16:40:12 +0100	[thread overview]
Message-ID: <20200217154012.GD1650092@myrica> (raw)
In-Reply-To: <20200215211047.GA124796@google.com>

On Sat, Feb 15, 2020 at 03:10:47PM -0600, Bjorn Helgaas wrote:
> On Thu, Feb 13, 2020 at 05:50:40PM +0100, Jean-Philippe Brucker wrote:
> > Each vendor has their own way of describing whether a host bridge
> > supports ATS.  The Intel and AMD ACPI tables selectively enable or
> > disable ATS per device or sub-tree, while Arm has a single bit for each
> > host bridge.  For those that need it, add an ats_supported bit to the
> > host bridge structure.
> > 
> > Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
> > ---
> >  drivers/pci/probe.c | 7 +++++++
> >  include/linux/pci.h | 1 +
> >  2 files changed, 8 insertions(+)
> > 
> > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> > index 512cb4312ddd..75c0a25af44e 100644
> > --- a/drivers/pci/probe.c
> > +++ b/drivers/pci/probe.c
> > @@ -598,6 +598,13 @@ static void pci_init_host_bridge(struct pci_host_bridge *bridge)
> >  	bridge->native_shpc_hotplug = 1;
> >  	bridge->native_pme = 1;
> >  	bridge->native_ltr = 1;
> > +
> > +	/*
> > +	 * Some systems may disable ATS at the host bridge (ACPI IORT,
> > +	 * device-tree), other filter it with a smaller granularity (ACPI DMAR
> > +	 * and IVRS).
> > +	 */
> > +	bridge->ats_supported = 1;
> 
> The cover letter says it's important to enable ATS only if the host
> bridge supports it.  From the other patches, it looks like we learn if
> the host bridge supports ATS from either a DT "ats-supported" property
> or an ACPI IORT table.  If that's the case, shouldn't the default here
> be "ATS is *not* supported"?

The ACPI IVRS table (AMD) doesn't have a property for the host bridge, it
can only deselect ATS for a sub-range of devices. Similarly the DMAR table
(Intel) declares that ATS is supported either by the whole PCIe domain or
for sub-ranges of devices. I selected ats_supported at the bridge by
default since IVRS needs it and DMAR has its own fine-grained ATS support
configuration.

I'm still not sure this is the right approach, given that the
ats_supported bridge property doesn't exactly correspond to a firmware
property on all platforms. Maybe the device-tree implementation should
follow the IORT one where each device carries a fwspec property stating
"root-complex supports ATS". But it isn't nice either so I tried a cleaner
implementation (as discussed with Robin back on the ATS-with-SMMUv3 series
[1]).

Thanks,
Jean

[1] https://lore.kernel.org/linux-iommu/c10c7adb-c7f6-f8c6-05cc-f4f143427a2d@arm.com/

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2020-02-17 15:40 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-13 16:50 [PATCH 00/10] PCI/ATS: Device-tree support and other improvements Jean-Philippe Brucker
2020-02-13 16:50 ` Jean-Philippe Brucker
2020-02-13 16:50 ` Jean-Philippe Brucker
2020-02-13 16:50 ` [PATCH 01/11] dt-bindings: PCI: generic: Add ats-supported property Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-02-19 22:24   ` Rob Herring
2020-02-19 22:24     ` Rob Herring
2020-02-19 22:24     ` Rob Herring
2020-02-13 16:50 ` [PATCH 02/11] PCI: Add ats_supported host bridge flag Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-02-15 21:10   ` Bjorn Helgaas
2020-02-15 21:10     ` Bjorn Helgaas
2020-02-15 21:10     ` Bjorn Helgaas
2020-02-17 15:40     ` Jean-Philippe Brucker [this message]
2020-02-17 15:40       ` Jean-Philippe Brucker
2020-02-17 15:40       ` Jean-Philippe Brucker
2020-02-13 16:50 ` [PATCH 03/11] PCI: OF: Check whether the host bridge supports ATS Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-02-13 18:26   ` Rob Herring
2020-02-13 18:26     ` Rob Herring
2020-02-13 18:26     ` Rob Herring
2020-02-17 12:40     ` Jean-Philippe Brucker
2020-02-17 12:40       ` Jean-Philippe Brucker
2020-02-17 12:40       ` Jean-Philippe Brucker
2020-02-13 16:50 ` [PATCH 04/11] ACPI/IORT: Check ATS capability in root complex node Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-03-06  9:37   ` Hanjun Guo
2020-03-06  9:37     ` Hanjun Guo
2020-03-06  9:37     ` Hanjun Guo
2020-02-13 16:50 ` [PATCH 05/11] PCI/ATS: Gather checks into pci_ats_supported() Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-02-13 16:50 ` [PATCH 06/11] iommu/amd: Use pci_ats_supported() Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-02-13 16:50 ` [PATCH 07/11] iommu/arm-smmu-v3: " Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-02-13 16:50 ` [PATCH 08/11] iommu/vt-d: " Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-02-13 16:50 ` [PATCH 09/11] ACPI/IORT: Drop ATS fwspec flag Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-03-06  9:42   ` Hanjun Guo
2020-03-06  9:42     ` Hanjun Guo
2020-03-06  9:42     ` Hanjun Guo
2020-02-13 16:50 ` [PATCH 10/11] arm64: dts: fast models: Enable PCIe ATS for Base RevC FVP Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-02-13 16:50 ` [PATCH 11/11] Documentation: Generalize the "pci=noats" boot parameter Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-02-13 16:50   ` Jean-Philippe Brucker
2020-02-19 10:42 ` [PATCH 00/10] PCI/ATS: Device-tree support and other improvements Joerg Roedel
2020-02-19 10:42   ` Joerg Roedel
2020-02-19 10:42   ` Joerg Roedel
2020-03-06  9:32 ` Hanjun Guo
2020-03-06  9:32   ` Hanjun Guo
2020-03-06  9:32   ` Hanjun Guo

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