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From: David Miller <davem@davemloft.net>
To: martin.blumenstingl@googlemail.com
Cc: robh+dt@kernel.org, andrew@lunn.ch, f.fainelli@gmail.com,
	linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org,
	jianxin.pan@amlogic.com, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 0/8] dwmac-meson8b Ethernet RX delay configuration
Date: Wed, 13 May 2020 12:23:38 -0700 (PDT)	[thread overview]
Message-ID: <20200513.122338.1849377923675371554.davem@davemloft.net> (raw)
In-Reply-To: <20200512211103.530674-1-martin.blumenstingl@googlemail.com>

From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Tue, 12 May 2020 23:10:55 +0200

> The Ethernet TX performance has been historically bad on Meson8b and
> Meson8m2 SoCs because high packet loss was seen. I found out that this
> was related (yet again) to the RGMII TX delay configuration.
> In the process of discussing the big picture (and not just a single
> patch) [0] with Andrew I discovered that the IP block behind the
> dwmac-meson8b driver actually seems to support the configuration of the
> RGMII RX delay (at least on the Meson8b SoC generation).
> 
> Since I sent the first RFC I got additional documentation from Jianxin
> (many thanks!). Also I have discovered some more interesting details:
> - Meson8b Odroid-C1 requires an RX delay (by either the PHY or the MAC)
>   Based on the vendor u-boot code (not upstream) I assume that it will
>   be the same for all Meson8b and Meson8m2 boards
> - Khadas VIM2 seems to have the RX delay built into the PCB trace
>   length. When I enable the RX delay on the PHY or MAC I can't get any
>   data through. I expect that we will have the same situation on all
>   GXBB, GXM, AXG, G12A, G12B and SM1 boards. Further clarification is
>   needed here though (since I can't visually see these lengthened
>   traces on the PCB). This will be done before sending patches for
>   these boards.
 ...

Series applied to net-next, thanks Martin.

WARNING: multiple messages have this Message-ID (diff)
From: David Miller <davem@davemloft.net>
To: martin.blumenstingl@googlemail.com
Cc: andrew@lunn.ch, f.fainelli@gmail.com, jianxin.pan@amlogic.com,
	devicetree@vger.kernel.org, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org, robh+dt@kernel.org,
	linux-amlogic@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 0/8] dwmac-meson8b Ethernet RX delay configuration
Date: Wed, 13 May 2020 12:23:38 -0700 (PDT)	[thread overview]
Message-ID: <20200513.122338.1849377923675371554.davem@davemloft.net> (raw)
In-Reply-To: <20200512211103.530674-1-martin.blumenstingl@googlemail.com>

From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Tue, 12 May 2020 23:10:55 +0200

> The Ethernet TX performance has been historically bad on Meson8b and
> Meson8m2 SoCs because high packet loss was seen. I found out that this
> was related (yet again) to the RGMII TX delay configuration.
> In the process of discussing the big picture (and not just a single
> patch) [0] with Andrew I discovered that the IP block behind the
> dwmac-meson8b driver actually seems to support the configuration of the
> RGMII RX delay (at least on the Meson8b SoC generation).
> 
> Since I sent the first RFC I got additional documentation from Jianxin
> (many thanks!). Also I have discovered some more interesting details:
> - Meson8b Odroid-C1 requires an RX delay (by either the PHY or the MAC)
>   Based on the vendor u-boot code (not upstream) I assume that it will
>   be the same for all Meson8b and Meson8m2 boards
> - Khadas VIM2 seems to have the RX delay built into the PCB trace
>   length. When I enable the RX delay on the PHY or MAC I can't get any
>   data through. I expect that we will have the same situation on all
>   GXBB, GXM, AXG, G12A, G12B and SM1 boards. Further clarification is
>   needed here though (since I can't visually see these lengthened
>   traces on the PCB). This will be done before sending patches for
>   these boards.
 ...

Series applied to net-next, thanks Martin.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: David Miller <davem@davemloft.net>
To: martin.blumenstingl@googlemail.com
Cc: andrew@lunn.ch, f.fainelli@gmail.com, jianxin.pan@amlogic.com,
	devicetree@vger.kernel.org, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org, robh+dt@kernel.org,
	linux-amlogic@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 0/8] dwmac-meson8b Ethernet RX delay configuration
Date: Wed, 13 May 2020 12:23:38 -0700 (PDT)	[thread overview]
Message-ID: <20200513.122338.1849377923675371554.davem@davemloft.net> (raw)
In-Reply-To: <20200512211103.530674-1-martin.blumenstingl@googlemail.com>

From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Tue, 12 May 2020 23:10:55 +0200

> The Ethernet TX performance has been historically bad on Meson8b and
> Meson8m2 SoCs because high packet loss was seen. I found out that this
> was related (yet again) to the RGMII TX delay configuration.
> In the process of discussing the big picture (and not just a single
> patch) [0] with Andrew I discovered that the IP block behind the
> dwmac-meson8b driver actually seems to support the configuration of the
> RGMII RX delay (at least on the Meson8b SoC generation).
> 
> Since I sent the first RFC I got additional documentation from Jianxin
> (many thanks!). Also I have discovered some more interesting details:
> - Meson8b Odroid-C1 requires an RX delay (by either the PHY or the MAC)
>   Based on the vendor u-boot code (not upstream) I assume that it will
>   be the same for all Meson8b and Meson8m2 boards
> - Khadas VIM2 seems to have the RX delay built into the PCB trace
>   length. When I enable the RX delay on the PHY or MAC I can't get any
>   data through. I expect that we will have the same situation on all
>   GXBB, GXM, AXG, G12A, G12B and SM1 boards. Further clarification is
>   needed here though (since I can't visually see these lengthened
>   traces on the PCB). This will be done before sending patches for
>   these boards.
 ...

Series applied to net-next, thanks Martin.

_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

  parent reply	other threads:[~2020-05-13 19:23 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-12 21:10 [PATCH v3 0/8] dwmac-meson8b Ethernet RX delay configuration Martin Blumenstingl
2020-05-12 21:10 ` Martin Blumenstingl
2020-05-12 21:10 ` Martin Blumenstingl
2020-05-12 21:10 ` [PATCH v3 1/8] dt-bindings: net: meson-dwmac: Add the amlogic,rx-delay-ns property Martin Blumenstingl
2020-05-12 21:10   ` [PATCH v3 1/8] dt-bindings: net: meson-dwmac: Add the amlogic, rx-delay-ns property Martin Blumenstingl
2020-05-12 21:10   ` Martin Blumenstingl
2020-05-24 21:28   ` [PATCH v3 1/8] dt-bindings: net: meson-dwmac: Add the amlogic,rx-delay-ns property Pavel Machek
2020-05-24 21:28     ` Pavel Machek
2020-05-24 21:28     ` Pavel Machek
2020-05-24 22:05     ` Florian Fainelli
2020-05-24 22:05       ` Florian Fainelli
2020-05-24 22:05       ` Florian Fainelli
2020-05-25  9:07       ` Pavel Machek
2020-05-25  9:07         ` Pavel Machek
2020-05-25  9:07         ` Pavel Machek
2020-05-25 13:57         ` Andrew Lunn
2020-05-25 13:57           ` Andrew Lunn
2020-05-25 13:57           ` Andrew Lunn
2020-05-25 20:17           ` Pavel Machek
2020-05-25 20:17             ` Pavel Machek
2020-05-25 20:17             ` Pavel Machek
2020-05-12 21:10 ` [PATCH v3 2/8] dt-bindings: net: dwmac-meson: Document the "timing-adjustment" clock Martin Blumenstingl
2020-05-12 21:10   ` Martin Blumenstingl
2020-05-12 21:10   ` Martin Blumenstingl
2020-05-12 21:10 ` [PATCH v3 3/8] net: stmmac: dwmac-meson8b: use FIELD_PREP instead of open-coding it Martin Blumenstingl
2020-05-12 21:10   ` Martin Blumenstingl
2020-05-12 21:10   ` Martin Blumenstingl
2020-05-12 21:10 ` [PATCH v3 4/8] net: stmmac: dwmac-meson8b: Move the documentation for the TX delay Martin Blumenstingl
2020-05-12 21:10   ` Martin Blumenstingl
2020-05-12 21:10   ` Martin Blumenstingl
2020-05-12 21:11 ` [PATCH v3 5/8] net: stmmac: dwmac-meson8b: Add the PRG_ETH0_ADJ_* bits Martin Blumenstingl
2020-05-12 21:11   ` Martin Blumenstingl
2020-05-12 21:11   ` Martin Blumenstingl
2020-05-12 21:11 ` [PATCH v3 6/8] net: stmmac: dwmac-meson8b: Fetch the "timing-adjustment" clock Martin Blumenstingl
2020-05-12 21:11   ` Martin Blumenstingl
2020-05-12 21:11   ` Martin Blumenstingl
2020-05-12 21:11 ` [PATCH v3 7/8] net: stmmac: dwmac-meson8b: Make the clock enabling code re-usable Martin Blumenstingl
2020-05-12 21:11   ` Martin Blumenstingl
2020-05-12 21:11   ` Martin Blumenstingl
2020-05-12 21:11 ` [PATCH v3 8/8] net: stmmac: dwmac-meson8b: add support for the RX delay configuration Martin Blumenstingl
2020-05-12 21:11   ` Martin Blumenstingl
2020-05-12 21:11   ` Martin Blumenstingl
2020-05-13 19:23 ` David Miller [this message]
2020-05-13 19:23   ` [PATCH v3 0/8] dwmac-meson8b Ethernet " David Miller
2020-05-13 19:23   ` David Miller
2020-07-07 18:51 ` patchwork-bot+linux-amlogic

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