From: Chris Wilson <chris@chris-wilson.co.uk> To: linux-kernel@vger.kernel.org, intel-gfx@lists.freedesktop.org Cc: linux-mm@kvack.org, Chris Wilson <chris@chris-wilson.co.uk>, Pavel Machek <pavel@ucw.cz>, Joonas Lahtinen <joonas.lahtinen@linux.intel.com>, stable@vger.kernel.org Subject: [PATCH 4/4] drm/i915/gem: Replace reloc chain with terminator on error unwind Date: Fri, 21 Aug 2020 09:50:11 +0100 [thread overview] Message-ID: <20200821085011.28878-4-chris@chris-wilson.co.uk> (raw) In-Reply-To: <20200821085011.28878-1-chris@chris-wilson.co.uk> If we hit an error during construction of the reloc chain, we need to replace the chain into the next batch with the terminator so that upon flushing the relocations so far, we do not execute a hanging batch. Reported-by: Pavel Machek <pavel@ucw.cz> Fixes: 964a9b0f611e ("drm/i915/gem: Use chained reloc batches") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: <stable@vger.kernel.org> # v5.8+ --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 31 ++++++++++--------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c index 24a1486d2dc5..a09f04eee417 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c @@ -972,21 +972,6 @@ static int reloc_gpu_chain(struct reloc_cache *cache) if (err) goto out_pool; - GEM_BUG_ON(cache->rq_size + RELOC_TAIL > PAGE_SIZE / sizeof(u32)); - cmd = cache->rq_cmd + cache->rq_size; - *cmd++ = MI_ARB_CHECK; - if (cache->gen >= 8) - *cmd++ = MI_BATCH_BUFFER_START_GEN8; - else if (cache->gen >= 6) - *cmd++ = MI_BATCH_BUFFER_START; - else - *cmd++ = MI_BATCH_BUFFER_START | MI_BATCH_GTT; - *cmd++ = lower_32_bits(batch->node.start); - *cmd++ = upper_32_bits(batch->node.start); /* Always 0 for gen<8 */ - i915_gem_object_flush_map(cache->rq_vma->obj); - i915_gem_object_unpin_map(cache->rq_vma->obj); - cache->rq_vma = NULL; - err = intel_gt_buffer_pool_mark_active(pool, rq); if (err == 0) { i915_vma_lock(batch); @@ -999,15 +984,31 @@ static int reloc_gpu_chain(struct reloc_cache *cache) if (err) goto out_pool; + GEM_BUG_ON(cache->rq_size + RELOC_TAIL > PAGE_SIZE / sizeof(u32)); + cmd = cache->rq_cmd + cache->rq_size; + *cmd++ = MI_ARB_CHECK; + if (cache->gen >= 8) + *cmd++ = MI_BATCH_BUFFER_START_GEN8; + else if (cache->gen >= 6) + *cmd++ = MI_BATCH_BUFFER_START; + else + *cmd++ = MI_BATCH_BUFFER_START | MI_BATCH_GTT; + *cmd++ = lower_32_bits(batch->node.start); + *cmd++ = upper_32_bits(batch->node.start); /* Always 0 for gen<8 */ + cmd = i915_gem_object_pin_map(batch->obj, cache->has_llc ? I915_MAP_FORCE_WB : I915_MAP_FORCE_WC); if (IS_ERR(cmd)) { + /* We will replace the BBS with BBE upon flushing the rq */ err = PTR_ERR(cmd); goto out_pool; } + i915_gem_object_flush_map(cache->rq_vma->obj); + i915_gem_object_unpin_map(cache->rq_vma->obj); + /* Return with batch mapping (cmd) still pinned */ cache->rq_cmd = cmd; cache->rq_size = 0; -- 2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: Chris Wilson <chris@chris-wilson.co.uk> To: linux-kernel@vger.kernel.org, intel-gfx@lists.freedesktop.org Cc: linux-mm@kvack.org, stable@vger.kernel.org, Pavel Machek <pavel@ucw.cz>, Chris Wilson <chris@chris-wilson.co.uk> Subject: [Intel-gfx] [PATCH 4/4] drm/i915/gem: Replace reloc chain with terminator on error unwind Date: Fri, 21 Aug 2020 09:50:11 +0100 [thread overview] Message-ID: <20200821085011.28878-4-chris@chris-wilson.co.uk> (raw) In-Reply-To: <20200821085011.28878-1-chris@chris-wilson.co.uk> If we hit an error during construction of the reloc chain, we need to replace the chain into the next batch with the terminator so that upon flushing the relocations so far, we do not execute a hanging batch. Reported-by: Pavel Machek <pavel@ucw.cz> Fixes: 964a9b0f611e ("drm/i915/gem: Use chained reloc batches") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: <stable@vger.kernel.org> # v5.8+ --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 31 ++++++++++--------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c index 24a1486d2dc5..a09f04eee417 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c @@ -972,21 +972,6 @@ static int reloc_gpu_chain(struct reloc_cache *cache) if (err) goto out_pool; - GEM_BUG_ON(cache->rq_size + RELOC_TAIL > PAGE_SIZE / sizeof(u32)); - cmd = cache->rq_cmd + cache->rq_size; - *cmd++ = MI_ARB_CHECK; - if (cache->gen >= 8) - *cmd++ = MI_BATCH_BUFFER_START_GEN8; - else if (cache->gen >= 6) - *cmd++ = MI_BATCH_BUFFER_START; - else - *cmd++ = MI_BATCH_BUFFER_START | MI_BATCH_GTT; - *cmd++ = lower_32_bits(batch->node.start); - *cmd++ = upper_32_bits(batch->node.start); /* Always 0 for gen<8 */ - i915_gem_object_flush_map(cache->rq_vma->obj); - i915_gem_object_unpin_map(cache->rq_vma->obj); - cache->rq_vma = NULL; - err = intel_gt_buffer_pool_mark_active(pool, rq); if (err == 0) { i915_vma_lock(batch); @@ -999,15 +984,31 @@ static int reloc_gpu_chain(struct reloc_cache *cache) if (err) goto out_pool; + GEM_BUG_ON(cache->rq_size + RELOC_TAIL > PAGE_SIZE / sizeof(u32)); + cmd = cache->rq_cmd + cache->rq_size; + *cmd++ = MI_ARB_CHECK; + if (cache->gen >= 8) + *cmd++ = MI_BATCH_BUFFER_START_GEN8; + else if (cache->gen >= 6) + *cmd++ = MI_BATCH_BUFFER_START; + else + *cmd++ = MI_BATCH_BUFFER_START | MI_BATCH_GTT; + *cmd++ = lower_32_bits(batch->node.start); + *cmd++ = upper_32_bits(batch->node.start); /* Always 0 for gen<8 */ + cmd = i915_gem_object_pin_map(batch->obj, cache->has_llc ? I915_MAP_FORCE_WB : I915_MAP_FORCE_WC); if (IS_ERR(cmd)) { + /* We will replace the BBS with BBE upon flushing the rq */ err = PTR_ERR(cmd); goto out_pool; } + i915_gem_object_flush_map(cache->rq_vma->obj); + i915_gem_object_unpin_map(cache->rq_vma->obj); + /* Return with batch mapping (cmd) still pinned */ cache->rq_cmd = cmd; cache->rq_size = 0; -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-08-21 8:50 UTC|newest] Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-08-21 8:50 [PATCH 1/4] mm: Export flush_vm_area() to sync the PTEs upon construction Chris Wilson 2020-08-21 8:50 ` [Intel-gfx] " Chris Wilson 2020-08-21 8:50 ` [PATCH 2/4] drm/i915/gem: Sync the vmap " Chris Wilson 2020-08-21 8:50 ` [Intel-gfx] " Chris Wilson 2020-08-21 12:41 ` Linus Torvalds 2020-08-21 12:41 ` [Intel-gfx] " Linus Torvalds 2020-08-21 12:41 ` Linus Torvalds 2020-08-21 13:01 ` Chris Wilson 2020-08-21 13:01 ` [Intel-gfx] " Chris Wilson 2020-08-21 8:50 ` [PATCH 3/4] drm/i915/gem: Use set_pte_at() for assigning the vmapped PTE Chris Wilson 2020-08-21 8:50 ` [Intel-gfx] " Chris Wilson 2020-08-21 8:50 ` Chris Wilson [this message] 2020-08-21 8:50 ` [Intel-gfx] [PATCH 4/4] drm/i915/gem: Replace reloc chain with terminator on error unwind Chris Wilson 2020-08-21 9:14 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] mm: Export flush_vm_area() to sync the PTEs upon construction Patchwork 2020-08-21 9:16 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2020-08-21 9:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2020-08-21 9:51 ` [PATCH 1/4] " Joerg Roedel 2020-08-21 9:51 ` [Intel-gfx] " Joerg Roedel 2020-08-21 9:54 ` Chris Wilson 2020-08-21 9:54 ` [Intel-gfx] " Chris Wilson 2020-08-21 10:22 ` Joerg Roedel 2020-08-21 10:22 ` [Intel-gfx] " Joerg Roedel 2020-08-21 10:36 ` Chris Wilson 2020-08-21 10:36 ` [Intel-gfx] " Chris Wilson 2020-08-21 10:09 ` [PATCH] mm: Track page table modifications in __apply_to_page_range() construction Joerg Roedel 2020-08-21 10:09 ` [Intel-gfx] " Joerg Roedel 2020-08-21 10:13 ` Chris Wilson 2020-08-21 10:13 ` [Intel-gfx] " Chris Wilson 2020-08-21 10:23 ` Joerg Roedel 2020-08-21 10:23 ` [Intel-gfx] " Joerg Roedel 2020-08-21 10:39 ` Chris Wilson 2020-08-21 10:39 ` [Intel-gfx] " Chris Wilson 2020-08-21 11:38 ` Chris Wilson 2020-08-21 11:38 ` [Intel-gfx] " Chris Wilson 2020-08-21 12:18 ` Joerg Roedel 2020-08-21 12:18 ` [Intel-gfx] " Joerg Roedel 2020-08-21 10:53 ` Greg KH 2020-08-21 10:53 ` [Intel-gfx] " Greg KH 2020-08-21 10:27 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with mm: Track page table modifications in __apply_to_page_range() construction (rev2) Patchwork 2020-08-21 11:33 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] mm: Export flush_vm_area() to sync the PTEs upon construction Patchwork
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