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From: Thomas Huth <thuth@redhat.com>
To: kvm@vger.kernel.org
Cc: pbonzini@redhat.com, drjones@redhat.com, lvivier@redhat.com
Subject: [PATCH v2 5/7] arm/pmu: Fix inline assembly for Clang
Date: Thu,  1 Oct 2020 09:22:32 +0200	[thread overview]
Message-ID: <20201001072234.143703-6-thuth@redhat.com> (raw)
In-Reply-To: <20201001072234.143703-1-thuth@redhat.com>

Clang complains here:

arm/pmu.c:201:16: error: value size does not match register size specified by
 the constraint and modifier [-Werror,-Wasm-operand-widths]
        : [pmcr] "r" (pmcr)
                      ^
arm/pmu.c:194:18: note: use constraint modifier "w"
        "       msr     pmcr_el0, %[pmcr]\n"
                                  ^~~~~~~
                                  %w[pmcr]
arm/pmu.c:200:17: error: value size does not match register size specified by
 the constraint and modifier [-Werror,-Wasm-operand-widths]
        : [loop] "+r" (loop)
                       ^
arm/pmu.c:196:11: note: use constraint modifier "w"
        "1:     subs    %[loop], %[loop], #1\n"
                        ^~~~~~~
                        %w[loop]
arm/pmu.c:200:17: error: value size does not match register size specified by
 the constraint and modifier [-Werror,-Wasm-operand-widths]
        : [loop] "+r" (loop)
                       ^
arm/pmu.c:196:20: note: use constraint modifier "w"
        "1:     subs    %[loop], %[loop], #1\n"
                                 ^~~~~~~
                                 %w[loop]
arm/pmu.c:284:35: error: value size does not match register size specified
 by the constraint and modifier [-Werror,-Wasm-operand-widths]
        : [addr] "r" (addr), [pmcr] "r" (pmcr), [loop] "r" (loop)
                                         ^
arm/pmu.c:274:28: note: use constraint modifier "w"
        "       msr     pmcr_el0, %[pmcr]\n"
                                  ^~~~~~~
                                  %w[pmcr]
arm/pmu.c:284:54: error: value size does not match register size specified
 by the constraint and modifier [-Werror,-Wasm-operand-widths]
        : [addr] "r" (addr), [pmcr] "r" (pmcr), [loop] "r" (loop)
                                                            ^
arm/pmu.c:276:23: note: use constraint modifier "w"
        "       mov     x10, %[loop]\n"
                             ^~~~~~~
                             %w[loop]

pmcr should be 64-bit since it is a sysreg, but for loop we can use the
"w" modifier.

Suggested-by: Drew Jones <drjones@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
---
 arm/pmu.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/arm/pmu.c b/arm/pmu.c
index cece53e..831fb66 100644
--- a/arm/pmu.c
+++ b/arm/pmu.c
@@ -190,15 +190,16 @@ static inline uint8_t get_pmu_version(void)
  */
 static inline void precise_instrs_loop(int loop, uint32_t pmcr)
 {
+	uint64_t pmcr64 = pmcr;
 	asm volatile(
 	"	msr	pmcr_el0, %[pmcr]\n"
 	"	isb\n"
-	"1:	subs	%[loop], %[loop], #1\n"
+	"1:	subs	%w[loop], %w[loop], #1\n"
 	"	b.gt	1b\n"
 	"	msr	pmcr_el0, xzr\n"
 	"	isb\n"
 	: [loop] "+r" (loop)
-	: [pmcr] "r" (pmcr)
+	: [pmcr] "r" (pmcr64)
 	: "cc");
 }
 
@@ -268,8 +269,9 @@ static void test_event_introspection(void)
  * pmccntr read after this function returns the exact instructions executed
  * in the controlled block. Loads @loop times the data at @address into x9.
  */
-static void mem_access_loop(void *addr, int loop, uint32_t pmcr)
+static void mem_access_loop(void *addr, long loop, uint32_t pmcr)
 {
+	uint64_t pmcr64 = pmcr;
 asm volatile(
 	"       msr     pmcr_el0, %[pmcr]\n"
 	"       isb\n"
@@ -281,7 +283,7 @@ asm volatile(
 	"       msr     pmcr_el0, xzr\n"
 	"       isb\n"
 	:
-	: [addr] "r" (addr), [pmcr] "r" (pmcr), [loop] "r" (loop)
+	: [addr] "r" (addr), [pmcr] "r" (pmcr64), [loop] "r" (loop)
 	: "x9", "x10", "cc");
 }
 
-- 
2.18.2


  parent reply	other threads:[~2020-10-01  7:22 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-01  7:22 [PATCH v2 0/7] Update travis CI Thomas Huth
2020-10-01  7:22 ` [PATCH v2 1/7] travis.yml: Rework the x86 64-bit tests Thomas Huth
2020-10-01  7:22 ` [PATCH v2 2/7] travis.yml: Refresh the x86 32-bit test list Thomas Huth
2020-10-01  7:22 ` [PATCH v2 3/7] travis.yml: Add the selftest-setup ppc64 test Thomas Huth
2020-10-01  7:22 ` [PATCH v2 4/7] kbuild: fix asm-offset generation to work with clang Thomas Huth
2020-10-01  9:12   ` Andrew Jones
2020-10-01  7:22 ` Thomas Huth [this message]
2020-10-01  9:12   ` [PATCH v2 5/7] arm/pmu: Fix inline assembly for Clang Andrew Jones
2020-10-01  9:14     ` Andrew Jones
2020-10-01 10:50       ` Thomas Huth
2020-10-01 12:02         ` Andrew Jones
2020-10-01  7:22 ` [PATCH v2 6/7] lib/arm64/spinlock: " Thomas Huth
2020-10-01  9:12   ` Andrew Jones
2020-10-01  7:22 ` [PATCH v2 7/7] travis.yml: Rework the aarch64 jobs Thomas Huth
2020-10-01  9:18 ` [PATCH v2 0/7] Update travis CI Paolo Bonzini

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