From: Mario Limonciello <mario.limonciello@dell.com> To: Jeff Kirsher <jeffrey.t.kirsher@intel.com>, Tony Nguyen <anthony.l.nguyen@intel.com>, intel-wired-lan@lists.osuosl.org Cc: linux-kernel@vger.kernel.org, Linux PM <linux-pm@vger.kernel.org>, Netdev <netdev@vger.kernel.org>, Alexander Duyck <alexander.duyck@gmail.com>, Jakub Kicinski <kuba@kernel.org>, Sasha Netfin <sasha.neftin@intel.com>, Aaron Brown <aaron.f.brown@intel.com>, Stefan Assmann <sassmann@redhat.com>, David Miller <davem@davemloft.net>, darcari@redhat.com, Yijun.Shen@dell.com, Perry.Yuan@dell.com, anthony.wong@canonical.com, Vitaly Lifshits <vitaly.lifshits@intel.com> Subject: [PATCH v3 1/7] e1000e: fix S0ix flow to allow S0i3.2 subset entry Date: Fri, 4 Dec 2020 14:09:14 -0600 [thread overview] Message-ID: <20201204200920.133780-2-mario.limonciello@dell.com> (raw) In-Reply-To: <20201204200920.133780-1-mario.limonciello@dell.com> From: Vitaly Lifshits <vitaly.lifshits@intel.com> Changed a configuration in the flows to align with architecture requirements to achieve S0i3.2 substate. Also fixed a typo in the previous commit 632fbd5eb5b0 ("e1000e: fix S0ix flows for cable connected case"). Signed-off-by: Vitaly Lifshits <vitaly.lifshits@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> --- drivers/net/ethernet/intel/e1000e/netdev.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c index b30f00891c03..128ab6898070 100644 --- a/drivers/net/ethernet/intel/e1000e/netdev.c +++ b/drivers/net/ethernet/intel/e1000e/netdev.c @@ -6475,13 +6475,13 @@ static void e1000e_s0ix_entry_flow(struct e1000_adapter *adapter) /* Ungate PGCB clock */ mac_data = er32(FEXTNVM9); - mac_data |= BIT(28); + mac_data &= ~BIT(28); ew32(FEXTNVM9, mac_data); /* Enable K1 off to enable mPHY Power Gating */ mac_data = er32(FEXTNVM6); mac_data |= BIT(31); - ew32(FEXTNVM12, mac_data); + ew32(FEXTNVM6, mac_data); /* Enable mPHY power gating for any link and speed */ mac_data = er32(FEXTNVM8); @@ -6525,11 +6525,11 @@ static void e1000e_s0ix_exit_flow(struct e1000_adapter *adapter) /* Disable K1 off */ mac_data = er32(FEXTNVM6); mac_data &= ~BIT(31); - ew32(FEXTNVM12, mac_data); + ew32(FEXTNVM6, mac_data); /* Disable Ungate PGCB clock */ mac_data = er32(FEXTNVM9); - mac_data &= ~BIT(28); + mac_data |= BIT(28); ew32(FEXTNVM9, mac_data); /* Cancel not waking from dynamic -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Mario Limonciello <mario.limonciello@dell.com> To: intel-wired-lan@osuosl.org Subject: [Intel-wired-lan] [PATCH v3 1/7] e1000e: fix S0ix flow to allow S0i3.2 subset entry Date: Fri, 4 Dec 2020 14:09:14 -0600 [thread overview] Message-ID: <20201204200920.133780-2-mario.limonciello@dell.com> (raw) In-Reply-To: <20201204200920.133780-1-mario.limonciello@dell.com> From: Vitaly Lifshits <vitaly.lifshits@intel.com> Changed a configuration in the flows to align with architecture requirements to achieve S0i3.2 substate. Also fixed a typo in the previous commit 632fbd5eb5b0 ("e1000e: fix S0ix flows for cable connected case"). Signed-off-by: Vitaly Lifshits <vitaly.lifshits@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> --- drivers/net/ethernet/intel/e1000e/netdev.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c index b30f00891c03..128ab6898070 100644 --- a/drivers/net/ethernet/intel/e1000e/netdev.c +++ b/drivers/net/ethernet/intel/e1000e/netdev.c @@ -6475,13 +6475,13 @@ static void e1000e_s0ix_entry_flow(struct e1000_adapter *adapter) /* Ungate PGCB clock */ mac_data = er32(FEXTNVM9); - mac_data |= BIT(28); + mac_data &= ~BIT(28); ew32(FEXTNVM9, mac_data); /* Enable K1 off to enable mPHY Power Gating */ mac_data = er32(FEXTNVM6); mac_data |= BIT(31); - ew32(FEXTNVM12, mac_data); + ew32(FEXTNVM6, mac_data); /* Enable mPHY power gating for any link and speed */ mac_data = er32(FEXTNVM8); @@ -6525,11 +6525,11 @@ static void e1000e_s0ix_exit_flow(struct e1000_adapter *adapter) /* Disable K1 off */ mac_data = er32(FEXTNVM6); mac_data &= ~BIT(31); - ew32(FEXTNVM12, mac_data); + ew32(FEXTNVM6, mac_data); /* Disable Ungate PGCB clock */ mac_data = er32(FEXTNVM9); - mac_data &= ~BIT(28); + mac_data |= BIT(28); ew32(FEXTNVM9, mac_data); /* Cancel not waking from dynamic -- 2.25.1
next prev parent reply other threads:[~2020-12-04 20:21 UTC|newest] Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-12-04 20:09 [PATCH v3 0/7] Improve s0ix flows for systems i219LM Mario Limonciello 2020-12-04 20:09 ` [Intel-wired-lan] " Mario Limonciello 2020-12-04 20:09 ` Mario Limonciello [this message] 2020-12-04 20:09 ` [Intel-wired-lan] [PATCH v3 1/7] e1000e: fix S0ix flow to allow S0i3.2 subset entry Mario Limonciello 2020-12-08 17:24 ` Mario Limonciello 2020-12-08 17:24 ` [Intel-wired-lan] " Mario Limonciello 2020-12-08 18:18 ` Jakub Kicinski 2020-12-08 18:18 ` [Intel-wired-lan] " Jakub Kicinski 2020-12-04 20:09 ` [PATCH v3 2/7] e1000e: Move all S0ix related code into its own source file Mario Limonciello 2020-12-04 20:09 ` [Intel-wired-lan] " Mario Limonciello 2020-12-04 21:25 ` Alexander Duyck 2020-12-04 21:25 ` [Intel-wired-lan] " Alexander Duyck 2020-12-04 20:09 ` [PATCH v3 3/7] e1000e: Export S0ix flags to ethtool Mario Limonciello 2020-12-04 20:09 ` [Intel-wired-lan] " Mario Limonciello 2020-12-04 20:09 ` [PATCH v3 4/7] e1000e: Add Dell's Comet Lake systems into S0ix heuristics Mario Limonciello 2020-12-04 20:09 ` [Intel-wired-lan] " Mario Limonciello 2020-12-04 20:09 ` [PATCH v3 5/7] e1000e: Add more Dell CML " Mario Limonciello 2020-12-04 20:09 ` [Intel-wired-lan] " Mario Limonciello 2020-12-04 20:09 ` [PATCH v3 6/7] e1000e: Add Dell TGL desktop " Mario Limonciello 2020-12-04 20:09 ` [Intel-wired-lan] " Mario Limonciello 2020-12-04 20:09 ` [PATCH v3 7/7] e1000e: Add another Dell TGL notebook system " Mario Limonciello 2020-12-04 20:09 ` [Intel-wired-lan] " Mario Limonciello 2020-12-04 21:27 ` [PATCH v3 0/7] Improve s0ix flows for systems i219LM Alexander Duyck 2020-12-04 21:27 ` [Intel-wired-lan] " Alexander Duyck 2020-12-04 22:28 ` Limonciello, Mario 2020-12-04 22:28 ` [Intel-wired-lan] " Limonciello, Mario 2020-12-04 22:38 ` Alexander Duyck 2020-12-04 22:38 ` [Intel-wired-lan] " Alexander Duyck 2020-12-05 23:49 ` Jakub Kicinski 2020-12-05 23:49 ` [Intel-wired-lan] " Jakub Kicinski 2020-12-06 17:32 ` Alexander Duyck 2020-12-06 17:32 ` [Intel-wired-lan] " Alexander Duyck 2020-12-07 13:28 ` Hans de Goede 2020-12-07 13:28 ` [Intel-wired-lan] " Hans de Goede 2020-12-07 15:41 ` Limonciello, Mario 2020-12-07 15:41 ` [Intel-wired-lan] " Limonciello, Mario 2020-12-08 5:08 ` Neftin, Sasha 2020-12-08 5:08 ` [Intel-wired-lan] " Neftin, Sasha 2020-12-08 9:30 ` Hans de Goede 2020-12-08 9:30 ` [Intel-wired-lan] " Hans de Goede 2020-12-08 16:14 ` Alexander Duyck 2020-12-08 16:14 ` [Intel-wired-lan] " Alexander Duyck 2020-12-08 22:29 ` Limonciello, Mario 2020-12-08 22:29 ` [Intel-wired-lan] " Limonciello, Mario 2020-12-09 14:44 ` Hans de Goede 2020-12-09 14:44 ` [Intel-wired-lan] " Hans de Goede 2020-12-10 2:24 ` Alexander Duyck 2020-12-10 2:24 ` [Intel-wired-lan] " Alexander Duyck 2020-12-10 5:28 ` Neftin, Sasha 2020-12-10 5:28 ` [Intel-wired-lan] " Neftin, Sasha 2020-12-13 8:33 ` Neftin, Sasha 2020-12-13 8:33 ` [Intel-wired-lan] " Neftin, Sasha
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