From: Damien Le Moal <damien.lemoal@wdc.com> To: Palmer Dabbelt <palmer@dabbelt.com>, linux-riscv@lists.infradead.org, Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org, Stephen Boyd <sboyd@kernel.org>, linux-clk@vger.kernel.org, Linus Walleij <linus.walleij@linaro.org>, linux-gpio@vger.kernel.org, Philipp Zabel <p.zabel@pengutronix.de> Cc: Sean Anderson <seanga2@gmail.com> Subject: [PATCH v8 09/22] dt-bindings: reset: Document canaan,k210-rst bindings Date: Thu, 10 Dec 2020 23:03:00 +0900 [thread overview] Message-ID: <20201210140313.258739-10-damien.lemoal@wdc.com> (raw) In-Reply-To: <20201210140313.258739-1-damien.lemoal@wdc.com> Document the device tree bindings for the Canaan Kendryte K210 SoC reset controller driver in Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml. The header file include/dt-bindings/reset/k210-rst.h is added to define all possible reset lines of the SoC. Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> --- .../bindings/reset/canaan,k210-rst.yaml | 40 ++++++++++++++++++ include/dt-bindings/reset/k210-rst.h | 42 +++++++++++++++++++ 2 files changed, 82 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml create mode 100644 include/dt-bindings/reset/k210-rst.h diff --git a/Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml b/Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml new file mode 100644 index 000000000000..53e4ede9c0bd --- /dev/null +++ b/Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/canaan,k210-rst.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Canaan Kendryte K210 Reset Controller Device Tree Bindings + +maintainers: + - Damien Le Moal <damien.lemoal@wdc.com> + +description: | + Canaan Kendryte K210 reset controller driver which supports the SoC + system controller supplied reset registers for the various peripherals + of the SoC. The K210 reset controller node must be defined as a child + node of the K210 system controller node. + + See also: + - dt-bindings/reset/k210-rst.h + +properties: + compatible: + const: canaan,k210-rst + + '#reset-cells': + const: 1 + +required: + - '#reset-cells' + - compatible + +additionalProperties: false + +examples: + - | + #include <dt-bindings/reset/k210-rst.h> + sysrst: reset-controller { + compatible = "canaan,k210-rst"; + #reset-cells = <1>; + }; diff --git a/include/dt-bindings/reset/k210-rst.h b/include/dt-bindings/reset/k210-rst.h new file mode 100644 index 000000000000..883c1aed50e8 --- /dev/null +++ b/include/dt-bindings/reset/k210-rst.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2019 Sean Anderson <seanga2@gmail.com> + * Copyright (c) 2020 Western Digital Corporation or its affiliates. + */ +#ifndef RESET_K210_SYSCTL_H +#define RESET_K210_SYSCTL_H + +/* + * Kendryte K210 SoC system controller K210_SYSCTL_SOFT_RESET register bits. + * Taken from Kendryte SDK (kendryte-standalone-sdk). + */ +#define K210_RST_ROM 0 +#define K210_RST_DMA 1 +#define K210_RST_AI 2 +#define K210_RST_DVP 3 +#define K210_RST_FFT 4 +#define K210_RST_GPIO 5 +#define K210_RST_SPI0 6 +#define K210_RST_SPI1 7 +#define K210_RST_SPI2 8 +#define K210_RST_SPI3 9 +#define K210_RST_I2S0 10 +#define K210_RST_I2S1 11 +#define K210_RST_I2S2 12 +#define K210_RST_I2C0 13 +#define K210_RST_I2C1 14 +#define K210_RST_I2C2 15 +#define K210_RST_UART1 16 +#define K210_RST_UART2 17 +#define K210_RST_UART3 18 +#define K210_RST_AES 19 +#define K210_RST_FPIOA 20 +#define K210_RST_TIMER0 21 +#define K210_RST_TIMER1 22 +#define K210_RST_TIMER2 23 +#define K210_RST_WDT0 24 +#define K210_RST_WDT1 25 +#define K210_RST_SHA 26 +#define K210_RST_RTC 29 + +#endif /* RESET_K210_SYSCTL_H */ -- 2.29.2
WARNING: multiple messages have this Message-ID (diff)
From: Damien Le Moal <damien.lemoal@wdc.com> To: Palmer Dabbelt <palmer@dabbelt.com>, linux-riscv@lists.infradead.org, Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org, Stephen Boyd <sboyd@kernel.org>, linux-clk@vger.kernel.org, Linus Walleij <linus.walleij@linaro.org>, linux-gpio@vger.kernel.org, Philipp Zabel <p.zabel@pengutronix.de> Cc: Sean Anderson <seanga2@gmail.com> Subject: [PATCH v8 09/22] dt-bindings: reset: Document canaan, k210-rst bindings Date: Thu, 10 Dec 2020 23:03:00 +0900 [thread overview] Message-ID: <20201210140313.258739-10-damien.lemoal@wdc.com> (raw) In-Reply-To: <20201210140313.258739-1-damien.lemoal@wdc.com> Document the device tree bindings for the Canaan Kendryte K210 SoC reset controller driver in Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml. The header file include/dt-bindings/reset/k210-rst.h is added to define all possible reset lines of the SoC. Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> --- .../bindings/reset/canaan,k210-rst.yaml | 40 ++++++++++++++++++ include/dt-bindings/reset/k210-rst.h | 42 +++++++++++++++++++ 2 files changed, 82 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml create mode 100644 include/dt-bindings/reset/k210-rst.h diff --git a/Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml b/Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml new file mode 100644 index 000000000000..53e4ede9c0bd --- /dev/null +++ b/Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/canaan,k210-rst.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Canaan Kendryte K210 Reset Controller Device Tree Bindings + +maintainers: + - Damien Le Moal <damien.lemoal@wdc.com> + +description: | + Canaan Kendryte K210 reset controller driver which supports the SoC + system controller supplied reset registers for the various peripherals + of the SoC. The K210 reset controller node must be defined as a child + node of the K210 system controller node. + + See also: + - dt-bindings/reset/k210-rst.h + +properties: + compatible: + const: canaan,k210-rst + + '#reset-cells': + const: 1 + +required: + - '#reset-cells' + - compatible + +additionalProperties: false + +examples: + - | + #include <dt-bindings/reset/k210-rst.h> + sysrst: reset-controller { + compatible = "canaan,k210-rst"; + #reset-cells = <1>; + }; diff --git a/include/dt-bindings/reset/k210-rst.h b/include/dt-bindings/reset/k210-rst.h new file mode 100644 index 000000000000..883c1aed50e8 --- /dev/null +++ b/include/dt-bindings/reset/k210-rst.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2019 Sean Anderson <seanga2@gmail.com> + * Copyright (c) 2020 Western Digital Corporation or its affiliates. + */ +#ifndef RESET_K210_SYSCTL_H +#define RESET_K210_SYSCTL_H + +/* + * Kendryte K210 SoC system controller K210_SYSCTL_SOFT_RESET register bits. + * Taken from Kendryte SDK (kendryte-standalone-sdk). + */ +#define K210_RST_ROM 0 +#define K210_RST_DMA 1 +#define K210_RST_AI 2 +#define K210_RST_DVP 3 +#define K210_RST_FFT 4 +#define K210_RST_GPIO 5 +#define K210_RST_SPI0 6 +#define K210_RST_SPI1 7 +#define K210_RST_SPI2 8 +#define K210_RST_SPI3 9 +#define K210_RST_I2S0 10 +#define K210_RST_I2S1 11 +#define K210_RST_I2S2 12 +#define K210_RST_I2C0 13 +#define K210_RST_I2C1 14 +#define K210_RST_I2C2 15 +#define K210_RST_UART1 16 +#define K210_RST_UART2 17 +#define K210_RST_UART3 18 +#define K210_RST_AES 19 +#define K210_RST_FPIOA 20 +#define K210_RST_TIMER0 21 +#define K210_RST_TIMER1 22 +#define K210_RST_TIMER2 23 +#define K210_RST_WDT0 24 +#define K210_RST_WDT1 25 +#define K210_RST_SHA 26 +#define K210_RST_RTC 29 + +#endif /* RESET_K210_SYSCTL_H */ -- 2.29.2 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2020-12-10 14:06 UTC|newest] Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-12-10 14:02 [PATCH v8 00/22] RISC-V Kendryte K210 support improvements Damien Le Moal 2020-12-10 14:02 ` Damien Le Moal 2020-12-10 14:02 ` [PATCH v8 01/22] riscv: Fix kernel time_init() Damien Le Moal 2020-12-10 14:02 ` Damien Le Moal 2020-12-11 2:09 ` Palmer Dabbelt 2020-12-11 2:09 ` Palmer Dabbelt 2020-12-10 14:02 ` [PATCH v8 02/22] riscv: Fix sifive serial driver Damien Le Moal 2020-12-10 14:02 ` Damien Le Moal 2020-12-11 2:09 ` Palmer Dabbelt 2020-12-11 2:09 ` Palmer Dabbelt 2020-12-11 4:34 ` Damien Le Moal 2020-12-11 4:34 ` Damien Le Moal 2020-12-10 14:02 ` [PATCH v8 03/22] riscv: Enable interrupts during syscalls with M-Mode Damien Le Moal 2020-12-10 14:02 ` Damien Le Moal 2020-12-11 2:09 ` Palmer Dabbelt 2020-12-11 2:09 ` Palmer Dabbelt 2020-12-10 14:02 ` [PATCH v8 04/22] riscv: Fix builtin DTB handling Damien Le Moal 2020-12-10 14:02 ` Damien Le Moal 2020-12-10 14:02 ` [PATCH v8 05/22] riscv: Use vendor name for K210 SoC support Damien Le Moal 2020-12-10 14:02 ` Damien Le Moal 2020-12-10 14:02 ` [PATCH v8 06/22] riscv: cleanup Canaan Kendryte K210 sysctl driver Damien Le Moal 2020-12-10 14:02 ` Damien Le Moal 2020-12-10 14:02 ` [PATCH v8 07/22] dt-bindings: Add Canaan vendor prefix Damien Le Moal 2020-12-10 14:02 ` Damien Le Moal 2020-12-11 3:47 ` Rob Herring 2020-12-11 3:47 ` Rob Herring 2020-12-10 14:02 ` [PATCH v8 08/22] dt-binding: clock: Document canaan,k210-clk bindings Damien Le Moal 2020-12-10 14:02 ` [PATCH v8 08/22] dt-binding: clock: Document canaan, k210-clk bindings Damien Le Moal 2020-12-11 3:48 ` [PATCH v8 08/22] dt-binding: clock: Document canaan,k210-clk bindings Rob Herring 2020-12-11 3:48 ` Rob Herring 2020-12-10 14:03 ` Damien Le Moal [this message] 2020-12-10 14:03 ` [PATCH v8 09/22] dt-bindings: reset: Document canaan, k210-rst bindings Damien Le Moal 2020-12-11 3:48 ` [PATCH v8 09/22] dt-bindings: reset: Document canaan,k210-rst bindings Rob Herring 2020-12-11 3:48 ` Rob Herring 2020-12-10 14:03 ` [PATCH v8 10/22] dt-bindings: pinctrl: Document canaan,k210-fpioa bindings Damien Le Moal 2020-12-10 14:03 ` [PATCH v8 10/22] dt-bindings: pinctrl: Document canaan, k210-fpioa bindings Damien Le Moal 2020-12-11 3:51 ` [PATCH v8 10/22] dt-bindings: pinctrl: Document canaan,k210-fpioa bindings Rob Herring 2020-12-11 3:51 ` Rob Herring 2020-12-10 14:03 ` [PATCH v8 11/22] dt-binding: mfd: Document canaan,k210-sysctl bindings Damien Le Moal 2020-12-10 14:03 ` [PATCH v8 11/22] dt-binding: mfd: Document canaan, k210-sysctl bindings Damien Le Moal 2020-12-11 3:54 ` [PATCH v8 11/22] dt-binding: mfd: Document canaan,k210-sysctl bindings Rob Herring 2020-12-11 3:54 ` Rob Herring 2020-12-10 14:03 ` [PATCH v8 12/22] riscv: Add Canaan Kendryte K210 clock driver Damien Le Moal 2020-12-10 14:03 ` Damien Le Moal 2020-12-10 14:03 ` [PATCH v8 13/22] riscv: Add Canaan Kendryte K210 reset controller Damien Le Moal 2020-12-10 14:03 ` Damien Le Moal 2020-12-10 14:03 ` [PATCH v8 14/22] riscv: Add Canaan Kendryte K210 FPIOA driver Damien Le Moal 2020-12-10 14:03 ` Damien Le Moal 2020-12-10 14:03 ` [PATCH v8 15/22] riscv: Update Canaan Kendryte K210 device tree Damien Le Moal 2020-12-10 14:03 ` Damien Le Moal 2020-12-10 14:03 ` [PATCH v8 16/22] riscv: Add SiPeed MAIX BiT board " Damien Le Moal 2020-12-10 14:03 ` Damien Le Moal 2020-12-10 14:03 ` [PATCH v8 17/22] riscv: Add SiPeed MAIX DOCK " Damien Le Moal 2020-12-10 14:03 ` Damien Le Moal 2020-12-10 14:03 ` [PATCH v8 18/22] riscv: Add SiPeed MAIX GO " Damien Le Moal 2020-12-10 14:03 ` Damien Le Moal 2020-12-10 14:03 ` [PATCH v8 19/22] riscv: Add SiPeed MAIXDUINO " Damien Le Moal 2020-12-10 14:03 ` Damien Le Moal 2020-12-10 14:03 ` [PATCH v8 20/22] riscv: Add Kendryte KD233 " Damien Le Moal 2020-12-10 14:03 ` Damien Le Moal 2020-12-10 14:03 ` [PATCH v8 21/22] riscv: Update Canaan Kendryte K210 defconfig Damien Le Moal 2020-12-10 14:03 ` Damien Le Moal 2020-12-10 14:03 ` [PATCH v8 22/22] riscv: Add Canaan Kendryte K210 SD card defconfig Damien Le Moal 2020-12-10 14:03 ` Damien Le Moal 2020-12-13 6:04 ` [PATCH v8 00/22] RISC-V Kendryte K210 support improvements Stephen Boyd 2020-12-13 6:04 ` Stephen Boyd 2020-12-13 8:06 ` Damien Le Moal 2020-12-13 8:06 ` Damien Le Moal 2020-12-16 1:42 ` Palmer Dabbelt 2020-12-16 1:42 ` Palmer Dabbelt 2020-12-16 2:12 ` Damien Le Moal 2020-12-16 2:12 ` Damien Le Moal
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20201210140313.258739-10-damien.lemoal@wdc.com \ --to=damien.lemoal@wdc.com \ --cc=devicetree@vger.kernel.org \ --cc=linus.walleij@linaro.org \ --cc=linux-clk@vger.kernel.org \ --cc=linux-gpio@vger.kernel.org \ --cc=linux-riscv@lists.infradead.org \ --cc=p.zabel@pengutronix.de \ --cc=palmer@dabbelt.com \ --cc=robh+dt@kernel.org \ --cc=sboyd@kernel.org \ --cc=seanga2@gmail.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.