* [PATCH v3 0/2] brcmstb: initial work on BCM4908 @ 2020-12-10 18:04 ` Rafał Miłecki 0 siblings, 0 replies; 10+ messages in thread From: Rafał Miłecki @ 2020-12-10 18:04 UTC (permalink / raw) To: Lorenzo Pieralisi, Rob Herring Cc: Bjorn Helgaas, linux-pci, devicetree, Florian Fainelli, Nicolas Saenz Julienne, Philipp Zabel, linux-rpi-kernel, linux-arm-kernel, bcm-kernel-feedback-list, Rafał Miłecki From: Rafał Miłecki <rafal@milecki.pl> BCM4908 uses very similar hardware to the STB one. It still requires some tweaks but this initial work allows accessing hardware without: Internal error: synchronous external abort: 96000210 [#1] PREEMPT SMP Rafał Miłecki (2): dt-bindings: PCI: brcmstb: add BCM4908 binding PCI: brcmstb: support BCM4908 with external PERST# signal controller .../bindings/pci/brcm,stb-pcie.yaml | 37 ++++++++++++++----- drivers/pci/controller/Kconfig | 2 +- drivers/pci/controller/pcie-brcmstb.c | 32 ++++++++++++++++ 3 files changed, 61 insertions(+), 10 deletions(-) -- 2.26.2 ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v3 0/2] brcmstb: initial work on BCM4908 @ 2020-12-10 18:04 ` Rafał Miłecki 0 siblings, 0 replies; 10+ messages in thread From: Rafał Miłecki @ 2020-12-10 18:04 UTC (permalink / raw) To: Lorenzo Pieralisi, Rob Herring Cc: linux-arm-kernel, devicetree, Florian Fainelli, linux-pci, Rafał Miłecki, bcm-kernel-feedback-list, linux-rpi-kernel, Philipp Zabel, Bjorn Helgaas, Nicolas Saenz Julienne From: Rafał Miłecki <rafal@milecki.pl> BCM4908 uses very similar hardware to the STB one. It still requires some tweaks but this initial work allows accessing hardware without: Internal error: synchronous external abort: 96000210 [#1] PREEMPT SMP Rafał Miłecki (2): dt-bindings: PCI: brcmstb: add BCM4908 binding PCI: brcmstb: support BCM4908 with external PERST# signal controller .../bindings/pci/brcm,stb-pcie.yaml | 37 ++++++++++++++----- drivers/pci/controller/Kconfig | 2 +- drivers/pci/controller/pcie-brcmstb.c | 32 ++++++++++++++++ 3 files changed, 61 insertions(+), 10 deletions(-) -- 2.26.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v3 1/2] dt-bindings: PCI: brcmstb: add BCM4908 binding 2020-12-10 18:04 ` Rafał Miłecki @ 2020-12-10 18:04 ` Rafał Miłecki -1 siblings, 0 replies; 10+ messages in thread From: Rafał Miłecki @ 2020-12-10 18:04 UTC (permalink / raw) To: Lorenzo Pieralisi, Rob Herring Cc: Bjorn Helgaas, linux-pci, devicetree, Florian Fainelli, Nicolas Saenz Julienne, Philipp Zabel, linux-rpi-kernel, linux-arm-kernel, bcm-kernel-feedback-list, Rafał Miłecki From: Rafał Miłecki <rafal@milecki.pl> BCM4908 is a SoC family with PCIe controller sharing design with the one for STB. BCM4908 has different power management and memory controller so few tweaks are required. PERST# signal on BCM4908 is handled by an external MISC block so it needs specifying a reset phandle. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Florian Fainelli <f.fainelli@gmail.com> --- V3: Drop "reset-names" from the generic "properties" - it's now defined as "compatible" specific property Drop "$ref" from the "resets" - thanks Rob. --- .../bindings/pci/brcm,stb-pcie.yaml | 37 ++++++++++++++----- 1 file changed, 28 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml index 807694b4f41f..f90557f6deb8 100644 --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml @@ -14,6 +14,7 @@ properties: items: - enum: - brcm,bcm2711-pcie # The Raspberry Pi 4 + - brcm,bcm4908-pcie - brcm,bcm7211-pcie # Broadcom STB version of RPi4 - brcm,bcm7278-pcie # Broadcom 7278 Arm - brcm,bcm7216-pcie # Broadcom 7216 Arm @@ -63,15 +64,6 @@ properties: aspm-no-l0s: true - resets: - description: for "brcm,bcm7216-pcie", must be a valid reset - phandle pointing to the RESCAL reset controller provider node. - $ref: "/schemas/types.yaml#/definitions/phandle" - - reset-names: - items: - - const: rescal - brcm,scb-sizes: description: u64 giving the 64bit PCIe memory viewport size of a memory controller. There may be up to @@ -98,12 +90,39 @@ required: allOf: - $ref: /schemas/pci/pci-bus.yaml# + - if: + properties: + compatible: + contains: + const: brcm,bcm4908-pcie + then: + properties: + resets: + items: + - description: reset controller handling the PERST# signal + + reset-names: + items: + - const: perst + + required: + - resets + - reset-names - if: properties: compatible: contains: const: brcm,bcm7216-pcie then: + properties: + resets: + items: + - description: phandle pointing to the RESCAL reset controller + + reset-names: + items: + - const: rescal + required: - resets - reset-names -- 2.26.2 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3 1/2] dt-bindings: PCI: brcmstb: add BCM4908 binding @ 2020-12-10 18:04 ` Rafał Miłecki 0 siblings, 0 replies; 10+ messages in thread From: Rafał Miłecki @ 2020-12-10 18:04 UTC (permalink / raw) To: Lorenzo Pieralisi, Rob Herring Cc: linux-arm-kernel, devicetree, Florian Fainelli, linux-pci, Rafał Miłecki, bcm-kernel-feedback-list, linux-rpi-kernel, Philipp Zabel, Bjorn Helgaas, Nicolas Saenz Julienne From: Rafał Miłecki <rafal@milecki.pl> BCM4908 is a SoC family with PCIe controller sharing design with the one for STB. BCM4908 has different power management and memory controller so few tweaks are required. PERST# signal on BCM4908 is handled by an external MISC block so it needs specifying a reset phandle. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Florian Fainelli <f.fainelli@gmail.com> --- V3: Drop "reset-names" from the generic "properties" - it's now defined as "compatible" specific property Drop "$ref" from the "resets" - thanks Rob. --- .../bindings/pci/brcm,stb-pcie.yaml | 37 ++++++++++++++----- 1 file changed, 28 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml index 807694b4f41f..f90557f6deb8 100644 --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml @@ -14,6 +14,7 @@ properties: items: - enum: - brcm,bcm2711-pcie # The Raspberry Pi 4 + - brcm,bcm4908-pcie - brcm,bcm7211-pcie # Broadcom STB version of RPi4 - brcm,bcm7278-pcie # Broadcom 7278 Arm - brcm,bcm7216-pcie # Broadcom 7216 Arm @@ -63,15 +64,6 @@ properties: aspm-no-l0s: true - resets: - description: for "brcm,bcm7216-pcie", must be a valid reset - phandle pointing to the RESCAL reset controller provider node. - $ref: "/schemas/types.yaml#/definitions/phandle" - - reset-names: - items: - - const: rescal - brcm,scb-sizes: description: u64 giving the 64bit PCIe memory viewport size of a memory controller. There may be up to @@ -98,12 +90,39 @@ required: allOf: - $ref: /schemas/pci/pci-bus.yaml# + - if: + properties: + compatible: + contains: + const: brcm,bcm4908-pcie + then: + properties: + resets: + items: + - description: reset controller handling the PERST# signal + + reset-names: + items: + - const: perst + + required: + - resets + - reset-names - if: properties: compatible: contains: const: brcm,bcm7216-pcie then: + properties: + resets: + items: + - description: phandle pointing to the RESCAL reset controller + + reset-names: + items: + - const: rescal + required: - resets - reset-names -- 2.26.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v3 1/2] dt-bindings: PCI: brcmstb: add BCM4908 binding 2020-12-10 18:04 ` Rafał Miłecki @ 2020-12-11 3:56 ` Rob Herring -1 siblings, 0 replies; 10+ messages in thread From: Rob Herring @ 2020-12-11 3:56 UTC (permalink / raw) To: Rafał Miłecki Cc: Lorenzo Pieralisi, Philipp Zabel, linux-rpi-kernel, Bjorn Helgaas, Nicolas Saenz Julienne, Florian Fainelli, linux-pci, Rob Herring, bcm-kernel-feedback-list, linux-arm-kernel, Rafał Miłecki, devicetree On Thu, 10 Dec 2020 19:04:20 +0100, Rafał Miłecki wrote: > From: Rafał Miłecki <rafal@milecki.pl> > > BCM4908 is a SoC family with PCIe controller sharing design with the one > for STB. BCM4908 has different power management and memory controller so > few tweaks are required. > > PERST# signal on BCM4908 is handled by an external MISC block so it > needs specifying a reset phandle. > > Signed-off-by: Rafał Miłecki <rafal@milecki.pl> > Acked-by: Florian Fainelli <f.fainelli@gmail.com> > --- > V3: Drop "reset-names" from the generic "properties" - it's now defined as > "compatible" specific property > Drop "$ref" from the "resets" - thanks Rob. > --- > .../bindings/pci/brcm,stb-pcie.yaml | 37 ++++++++++++++----- > 1 file changed, 28 insertions(+), 9 deletions(-) > Reviewed-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3 1/2] dt-bindings: PCI: brcmstb: add BCM4908 binding @ 2020-12-11 3:56 ` Rob Herring 0 siblings, 0 replies; 10+ messages in thread From: Rob Herring @ 2020-12-11 3:56 UTC (permalink / raw) To: Rafał Miłecki Cc: linux-arm-kernel, devicetree, Florian Fainelli, linux-pci, Rob Herring, Rafał Miłecki, Lorenzo Pieralisi, bcm-kernel-feedback-list, linux-rpi-kernel, Philipp Zabel, Bjorn Helgaas, Nicolas Saenz Julienne On Thu, 10 Dec 2020 19:04:20 +0100, Rafał Miłecki wrote: > From: Rafał Miłecki <rafal@milecki.pl> > > BCM4908 is a SoC family with PCIe controller sharing design with the one > for STB. BCM4908 has different power management and memory controller so > few tweaks are required. > > PERST# signal on BCM4908 is handled by an external MISC block so it > needs specifying a reset phandle. > > Signed-off-by: Rafał Miłecki <rafal@milecki.pl> > Acked-by: Florian Fainelli <f.fainelli@gmail.com> > --- > V3: Drop "reset-names" from the generic "properties" - it's now defined as > "compatible" specific property > Drop "$ref" from the "resets" - thanks Rob. > --- > .../bindings/pci/brcm,stb-pcie.yaml | 37 ++++++++++++++----- > 1 file changed, 28 insertions(+), 9 deletions(-) > Reviewed-by: Rob Herring <robh@kernel.org> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v3 2/2] PCI: brcmstb: support BCM4908 with external PERST# signal controller 2020-12-10 18:04 ` Rafał Miłecki @ 2020-12-10 18:04 ` Rafał Miłecki -1 siblings, 0 replies; 10+ messages in thread From: Rafał Miłecki @ 2020-12-10 18:04 UTC (permalink / raw) To: Lorenzo Pieralisi, Rob Herring Cc: Bjorn Helgaas, linux-pci, devicetree, Florian Fainelli, Nicolas Saenz Julienne, Philipp Zabel, linux-rpi-kernel, linux-arm-kernel, bcm-kernel-feedback-list, Rafał Miłecki From: Rafał Miłecki <rafal@milecki.pl> BCM4908 uses external MISC block for controlling PERST# signal. Use it as a reset controller. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Florian Fainelli <f.fainelli@gmail.com> --- V2: Reorder BCM4908 in the enum pcie_type Use devm_reset_control_get_optional_exclusive() Don't move hw_rev read up in the code --- drivers/pci/controller/Kconfig | 2 +- drivers/pci/controller/pcie-brcmstb.c | 32 +++++++++++++++++++++++++++ 2 files changed, 33 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 64e2f5e379aa..d44c70bb88f6 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -273,7 +273,7 @@ config VMD config PCIE_BRCMSTB tristate "Broadcom Brcmstb PCIe host controller" - depends on ARCH_BRCMSTB || ARCH_BCM2835 || COMPILE_TEST + depends on ARCH_BRCMSTB || ARCH_BCM2835 || ARCH_BCM4908 || COMPILE_TEST depends on OF depends on PCI_MSI_IRQ_DOMAIN default ARCH_BRCMSTB diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c index 9c3d2982248d..98536cf3af58 100644 --- a/drivers/pci/controller/pcie-brcmstb.c +++ b/drivers/pci/controller/pcie-brcmstb.c @@ -96,6 +96,7 @@ #define PCIE_MISC_REVISION 0x406c #define BRCM_PCIE_HW_REV_33 0x0303 +#define BRCM_PCIE_HW_REV_3_20 0x0320 #define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT 0x4070 #define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_LIMIT_MASK 0xfff00000 @@ -190,6 +191,7 @@ struct brcm_pcie; static inline void brcm_pcie_bridge_sw_init_set_7278(struct brcm_pcie *pcie, u32 val); static inline void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val); +static inline void brcm_pcie_perst_set_4908(struct brcm_pcie *pcie, u32 val); static inline void brcm_pcie_perst_set_7278(struct brcm_pcie *pcie, u32 val); static inline void brcm_pcie_perst_set_generic(struct brcm_pcie *pcie, u32 val); @@ -206,6 +208,7 @@ enum { enum pcie_type { GENERIC, + BCM4908, BCM7278, BCM2711, }; @@ -230,6 +233,13 @@ static const struct pcie_cfg_data generic_cfg = { .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic, }; +static const struct pcie_cfg_data bcm4908_cfg = { + .offsets = pcie_offsets, + .type = BCM4908, + .perst_set = brcm_pcie_perst_set_4908, + .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic, +}; + static const int pcie_offset_bcm7278[] = { [RGR1_SW_INIT_1] = 0xc010, [EXT_CFG_INDEX] = 0x9000, @@ -282,6 +292,7 @@ struct brcm_pcie { const int *reg_offsets; enum pcie_type type; struct reset_control *rescal; + struct reset_control *perst_reset; int num_memc; u64 memc_size[PCIE_BRCM_MAX_MEMC]; u32 hw_rev; @@ -747,6 +758,17 @@ static inline void brcm_pcie_bridge_sw_init_set_7278(struct brcm_pcie *pcie, u32 writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie)); } +static inline void brcm_pcie_perst_set_4908(struct brcm_pcie *pcie, u32 val) +{ + if (WARN_ONCE(!pcie->perst_reset, "missing PERST# reset controller\n")) + return; + + if (val) + reset_control_assert(pcie->perst_reset); + else + reset_control_deassert(pcie->perst_reset); +} + static inline void brcm_pcie_perst_set_7278(struct brcm_pcie *pcie, u32 val) { u32 tmp; @@ -1206,6 +1228,7 @@ static int brcm_pcie_remove(struct platform_device *pdev) static const struct of_device_id brcm_pcie_match[] = { { .compatible = "brcm,bcm2711-pcie", .data = &bcm2711_cfg }, + { .compatible = "brcm,bcm4908-pcie", .data = &bcm4908_cfg }, { .compatible = "brcm,bcm7211-pcie", .data = &generic_cfg }, { .compatible = "brcm,bcm7278-pcie", .data = &bcm7278_cfg }, { .compatible = "brcm,bcm7216-pcie", .data = &bcm7278_cfg }, @@ -1262,6 +1285,11 @@ static int brcm_pcie_probe(struct platform_device *pdev) clk_disable_unprepare(pcie->clk); return PTR_ERR(pcie->rescal); } + pcie->perst_reset = devm_reset_control_get_optional_exclusive(&pdev->dev, "perst"); + if (IS_ERR(pcie->perst_reset)) { + clk_disable_unprepare(pcie->clk); + return PTR_ERR(pcie->perst_reset); + } ret = reset_control_deassert(pcie->rescal); if (ret) @@ -1279,6 +1307,10 @@ static int brcm_pcie_probe(struct platform_device *pdev) goto fail; pcie->hw_rev = readl(pcie->base + PCIE_MISC_REVISION); + if (pcie->type == BCM4908 && pcie->hw_rev >= BRCM_PCIE_HW_REV_3_20) { + dev_err(pcie->dev, "hardware revision with unsupported PERST# setup\n"); + goto fail; + } msi_np = of_parse_phandle(pcie->np, "msi-parent", 0); if (pci_msi_enabled() && msi_np == pcie->np) { -- 2.26.2 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3 2/2] PCI: brcmstb: support BCM4908 with external PERST# signal controller @ 2020-12-10 18:04 ` Rafał Miłecki 0 siblings, 0 replies; 10+ messages in thread From: Rafał Miłecki @ 2020-12-10 18:04 UTC (permalink / raw) To: Lorenzo Pieralisi, Rob Herring Cc: linux-arm-kernel, devicetree, Florian Fainelli, linux-pci, Rafał Miłecki, bcm-kernel-feedback-list, linux-rpi-kernel, Philipp Zabel, Bjorn Helgaas, Nicolas Saenz Julienne From: Rafał Miłecki <rafal@milecki.pl> BCM4908 uses external MISC block for controlling PERST# signal. Use it as a reset controller. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Florian Fainelli <f.fainelli@gmail.com> --- V2: Reorder BCM4908 in the enum pcie_type Use devm_reset_control_get_optional_exclusive() Don't move hw_rev read up in the code --- drivers/pci/controller/Kconfig | 2 +- drivers/pci/controller/pcie-brcmstb.c | 32 +++++++++++++++++++++++++++ 2 files changed, 33 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 64e2f5e379aa..d44c70bb88f6 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -273,7 +273,7 @@ config VMD config PCIE_BRCMSTB tristate "Broadcom Brcmstb PCIe host controller" - depends on ARCH_BRCMSTB || ARCH_BCM2835 || COMPILE_TEST + depends on ARCH_BRCMSTB || ARCH_BCM2835 || ARCH_BCM4908 || COMPILE_TEST depends on OF depends on PCI_MSI_IRQ_DOMAIN default ARCH_BRCMSTB diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c index 9c3d2982248d..98536cf3af58 100644 --- a/drivers/pci/controller/pcie-brcmstb.c +++ b/drivers/pci/controller/pcie-brcmstb.c @@ -96,6 +96,7 @@ #define PCIE_MISC_REVISION 0x406c #define BRCM_PCIE_HW_REV_33 0x0303 +#define BRCM_PCIE_HW_REV_3_20 0x0320 #define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT 0x4070 #define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_LIMIT_MASK 0xfff00000 @@ -190,6 +191,7 @@ struct brcm_pcie; static inline void brcm_pcie_bridge_sw_init_set_7278(struct brcm_pcie *pcie, u32 val); static inline void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val); +static inline void brcm_pcie_perst_set_4908(struct brcm_pcie *pcie, u32 val); static inline void brcm_pcie_perst_set_7278(struct brcm_pcie *pcie, u32 val); static inline void brcm_pcie_perst_set_generic(struct brcm_pcie *pcie, u32 val); @@ -206,6 +208,7 @@ enum { enum pcie_type { GENERIC, + BCM4908, BCM7278, BCM2711, }; @@ -230,6 +233,13 @@ static const struct pcie_cfg_data generic_cfg = { .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic, }; +static const struct pcie_cfg_data bcm4908_cfg = { + .offsets = pcie_offsets, + .type = BCM4908, + .perst_set = brcm_pcie_perst_set_4908, + .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic, +}; + static const int pcie_offset_bcm7278[] = { [RGR1_SW_INIT_1] = 0xc010, [EXT_CFG_INDEX] = 0x9000, @@ -282,6 +292,7 @@ struct brcm_pcie { const int *reg_offsets; enum pcie_type type; struct reset_control *rescal; + struct reset_control *perst_reset; int num_memc; u64 memc_size[PCIE_BRCM_MAX_MEMC]; u32 hw_rev; @@ -747,6 +758,17 @@ static inline void brcm_pcie_bridge_sw_init_set_7278(struct brcm_pcie *pcie, u32 writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie)); } +static inline void brcm_pcie_perst_set_4908(struct brcm_pcie *pcie, u32 val) +{ + if (WARN_ONCE(!pcie->perst_reset, "missing PERST# reset controller\n")) + return; + + if (val) + reset_control_assert(pcie->perst_reset); + else + reset_control_deassert(pcie->perst_reset); +} + static inline void brcm_pcie_perst_set_7278(struct brcm_pcie *pcie, u32 val) { u32 tmp; @@ -1206,6 +1228,7 @@ static int brcm_pcie_remove(struct platform_device *pdev) static const struct of_device_id brcm_pcie_match[] = { { .compatible = "brcm,bcm2711-pcie", .data = &bcm2711_cfg }, + { .compatible = "brcm,bcm4908-pcie", .data = &bcm4908_cfg }, { .compatible = "brcm,bcm7211-pcie", .data = &generic_cfg }, { .compatible = "brcm,bcm7278-pcie", .data = &bcm7278_cfg }, { .compatible = "brcm,bcm7216-pcie", .data = &bcm7278_cfg }, @@ -1262,6 +1285,11 @@ static int brcm_pcie_probe(struct platform_device *pdev) clk_disable_unprepare(pcie->clk); return PTR_ERR(pcie->rescal); } + pcie->perst_reset = devm_reset_control_get_optional_exclusive(&pdev->dev, "perst"); + if (IS_ERR(pcie->perst_reset)) { + clk_disable_unprepare(pcie->clk); + return PTR_ERR(pcie->perst_reset); + } ret = reset_control_deassert(pcie->rescal); if (ret) @@ -1279,6 +1307,10 @@ static int brcm_pcie_probe(struct platform_device *pdev) goto fail; pcie->hw_rev = readl(pcie->base + PCIE_MISC_REVISION); + if (pcie->type == BCM4908 && pcie->hw_rev >= BRCM_PCIE_HW_REV_3_20) { + dev_err(pcie->dev, "hardware revision with unsupported PERST# setup\n"); + goto fail; + } msi_np = of_parse_phandle(pcie->np, "msi-parent", 0); if (pci_msi_enabled() && msi_np == pcie->np) { -- 2.26.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v3 0/2] brcmstb: initial work on BCM4908 2020-12-10 18:04 ` Rafał Miłecki @ 2021-01-19 11:59 ` Lorenzo Pieralisi -1 siblings, 0 replies; 10+ messages in thread From: Lorenzo Pieralisi @ 2021-01-19 11:59 UTC (permalink / raw) To: Rafał Miłecki, Rob Herring Cc: Lorenzo Pieralisi, Bjorn Helgaas, bcm-kernel-feedback-list, devicetree, linux-pci, Philipp Zabel, linux-rpi-kernel, Florian Fainelli, Nicolas Saenz Julienne, linux-arm-kernel, Rafał Miłecki On Thu, 10 Dec 2020 19:04:19 +0100, Rafał Miłecki wrote: > BCM4908 uses very similar hardware to the STB one. It still requires > some tweaks but this initial work allows accessing hardware without: > > Internal error: synchronous external abort: 96000210 [#1] PREEMPT SMP > > Rafał Miłecki (2): > dt-bindings: PCI: brcmstb: add BCM4908 binding > PCI: brcmstb: support BCM4908 with external PERST# signal controller > > [...] Applied to pci/brcmstb, thanks! [1/2] dt-bindings: PCI: brcmstb: add BCM4908 binding https://git.kernel.org/lpieralisi/pci/c/f435ce7ebf [2/2] PCI: brcmstb: support BCM4908 with external PERST# signal controller https://git.kernel.org/lpieralisi/pci/c/0cdfaceb98 Thanks, Lorenzo ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3 0/2] brcmstb: initial work on BCM4908 @ 2021-01-19 11:59 ` Lorenzo Pieralisi 0 siblings, 0 replies; 10+ messages in thread From: Lorenzo Pieralisi @ 2021-01-19 11:59 UTC (permalink / raw) To: Rafał Miłecki, Rob Herring Cc: linux-arm-kernel, devicetree, Lorenzo Pieralisi, linux-pci, Rafał Miłecki, Florian Fainelli, bcm-kernel-feedback-list, linux-rpi-kernel, Philipp Zabel, Bjorn Helgaas, Nicolas Saenz Julienne On Thu, 10 Dec 2020 19:04:19 +0100, Rafał Miłecki wrote: > BCM4908 uses very similar hardware to the STB one. It still requires > some tweaks but this initial work allows accessing hardware without: > > Internal error: synchronous external abort: 96000210 [#1] PREEMPT SMP > > Rafał Miłecki (2): > dt-bindings: PCI: brcmstb: add BCM4908 binding > PCI: brcmstb: support BCM4908 with external PERST# signal controller > > [...] Applied to pci/brcmstb, thanks! [1/2] dt-bindings: PCI: brcmstb: add BCM4908 binding https://git.kernel.org/lpieralisi/pci/c/f435ce7ebf [2/2] PCI: brcmstb: support BCM4908 with external PERST# signal controller https://git.kernel.org/lpieralisi/pci/c/0cdfaceb98 Thanks, Lorenzo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2021-01-19 14:57 UTC | newest] Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-12-10 18:04 [PATCH v3 0/2] brcmstb: initial work on BCM4908 Rafał Miłecki 2020-12-10 18:04 ` Rafał Miłecki 2020-12-10 18:04 ` [PATCH v3 1/2] dt-bindings: PCI: brcmstb: add BCM4908 binding Rafał Miłecki 2020-12-10 18:04 ` Rafał Miłecki 2020-12-11 3:56 ` Rob Herring 2020-12-11 3:56 ` Rob Herring 2020-12-10 18:04 ` [PATCH v3 2/2] PCI: brcmstb: support BCM4908 with external PERST# signal controller Rafał Miłecki 2020-12-10 18:04 ` Rafał Miłecki 2021-01-19 11:59 ` [PATCH v3 0/2] brcmstb: initial work on BCM4908 Lorenzo Pieralisi 2021-01-19 11:59 ` Lorenzo Pieralisi
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